Patents by Inventor Yoichi Nogami
Yoichi Nogami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11527629Abstract: A field-effect transistor includes a gate electrode formed on an electron supply layer thereon, a source electrode and a drain electrode thereon; and also the field-effect transistor includes an insulation film for covering the electron supply layer, and an opening portion of the insulation film, having trapezoidal prism's oblique contour faces, being provided in a region to form the gate electrode in the insulation film. It is so arranged that the gate electrode is made to have a Schottky junction with respect to a region where the electron supply layer is exposed through the opening portion, and also that the trapezoidal prism's oblique contour faces each formed by the opening portion have inclination angles in a range from 25 degrees to 75 degrees with respect to a surface of the electron supply layer.Type: GrantFiled: April 13, 2018Date of Patent: December 13, 2022Assignee: Mitsubishi Electric CorporationInventor: Yoichi Nogami
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Publication number: 20220285242Abstract: A semiconductor chip (2) is provided on an upper surface (1a) of a heat sink (1). A lead terminal (5,6) is electrically connected to the semiconductor chip (2), does not extend above a first side surface (1c) of the heat sink (1) but extends above a second side surface (1d) of the heat sink (1). Mold resin (10) covers the upper surface (1a), the first side surface (1c), and the second side surface (1d) of the heat sink (1), the semiconductor chip (2), and a part of the lead terminal (5,6). A lower surface (1b) of the heat sink (1) is exposed from the mold resin (10). An anchor structure (11) in which a lower portion of the first side surface (1c) of the heat sink (1) is recessed and is filled with the mold resin (10) is provided. The anchor structure (11) does not exist on the second side surface (1d) of the heat sink (1). The heat sink (1) does not protrude from a side surface (10a) of the mold resin (10).Type: ApplicationFiled: October 15, 2019Publication date: September 8, 2022Applicant: Mitsubishi Electric CorporationInventor: Yoichi NOGAMI
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Patent number: 11195807Abstract: Reduction in impedance in a lead connected to a semiconductor element is achieved while achieving anchor effect. The semiconductor device includes a heatsink, a semiconductor element, a lead disposed on an upper side of the heatsink, and a molding material formed to cover the lead, the heatsink, and the semiconductor element. Formed on an edge portion of a lower surface in a position, in the heatsink, overlapping with the lead in a plan view is a first convex portion protruding more than an edge portion of an upper surface in the position, and formed on an edge portion of an upper surface in a position, in the heatsink, which does not overlap with the lead in a plan view is a second convex portion protruding more than an edge portion of a lower surface in the position.Type: GrantFiled: September 28, 2017Date of Patent: December 7, 2021Assignee: Mitsubishi Electric CorporationInventors: Tomoyuki Asada, Yoichi Nogami, Kenichi Horiguchi, Shigeo Yamabe, Satoshi Miho, Kenji Mukai
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Publication number: 20210043743Abstract: A field-effect transistor includes a gate electrode formed on an electron supply layer thereon, a source electrode and a drain electrode thereon; and also the field-effect transistor includes an insulation film for covering the electron supply layer, and an opening portion of the insulation film, having trapezoidal prism's oblique contour faces, being provided in a region to form the gate electrode in the insulation film. It is so arranged that the gate electrode is made to have a Schottky junction with respect to a region where the electron supply layer is exposed through the opening portion, and also that the trapezoidal prism's oblique contour faces each formed by the opening portion have inclination angles in a range from 25 degrees to 75 degrees with respect to a surface of the electron supply layer.Type: ApplicationFiled: April 13, 2018Publication date: February 11, 2021Applicant: Mitsubishi Electric CorporationInventor: Yoichi NOGAMI
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Publication number: 20200227363Abstract: Reduction in impedance in a lead connected to a semiconductor element is achieved while achieving anchor effect. The semiconductor device includes a heatsink, a semiconductor element, a lead disposed on an upper side of the heatsink, and a molding material formed to cover the lead, the heatsink, and the semiconductor element. Formed on an edge portion of a lower surface in a position, in the heatsink, overlapping with the lead in a plan view is a first convex portion protruding more than an edge portion of an upper surface in the position, and formed on an edge portion of an upper surface in a position, in the heatsink, which does not overlap with the lead in a plan view is a second convex portion protruding more than an edge portion of a lower surface in the position.Type: ApplicationFiled: September 28, 2017Publication date: July 16, 2020Applicant: Mitsubishi Electric CorporationInventors: Tomoyuki ASADA, Yoichi NOGAMI, Kenichi HORIGUCHI, Shigeo YAMABE, Satoshi MIHO, Kenji MUKAI
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Patent number: 10242928Abstract: A semiconductor device includes: a semiconductor substrate having a main plane; a semiconductor element provided on the main plane of the semiconductor substrate; an electrode pad provided on the main plane of the semiconductor substrate and connected to the semiconductor element; a guard ring surrounding the semiconductor element and the electrode pad, and provided on the main plane of the semiconductor substrate; and an insulating film covering all region of a semiconductor of the main plane of the semiconductor substrate exposed inside the guard ring, wherein the insulating film is made of a water impermeable material.Type: GrantFiled: July 10, 2015Date of Patent: March 26, 2019Assignee: Mitsubishi Electric CorporationInventor: Yoichi Nogami
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Patent number: 10147661Abstract: A semiconductor device includes: a semiconductor substrate having a main plane; a semiconductor element provided on the main plane of the semiconductor substrate; an electrode pad provided on the main plane of the semiconductor substrate and connected to the semiconductor element; a guard ring surrounding the semiconductor element and the electrode pad, and provided on the main plane of the semiconductor substrate; and an insulating film covering all region of a semiconductor of the main plane of the semiconductor substrate exposed inside the guard ring, wherein the insulating film is made of a water impermeable material.Type: GrantFiled: July 12, 2017Date of Patent: December 4, 2018Assignee: Mitsubishi Electric CorporationInventor: Yoichi Nogami
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Publication number: 20170309535Abstract: A semiconductor device includes: a semiconductor substrate having a main plane; a semiconductor element provided on the main plane of the semiconductor substrate; an electrode pad provided on the main plane of the semiconductor substrate and connected to the semiconductor element; a guard ring surrounding the semiconductor element and the electrode pad, and provided on the main plane of the semiconductor substrate; and an insulating film covering all region of a semiconductor of the main plane of the semiconductor substrate exposed inside the guard ring, wherein the insulating film is made of a water impermeable material.Type: ApplicationFiled: July 12, 2017Publication date: October 26, 2017Applicant: Mitsubishi Electric CorporationInventor: Yoichi NOGAMI
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Patent number: 9741634Abstract: A semiconductor device includes: a semiconductor substrate having a main plane; a semiconductor element provided on the main plane of the semiconductor substrate; an electrode pad provided on the main plane of the semiconductor substrate and connected to the semiconductor element; a guard ring surrounding the semiconductor element and the electrode pad, and provided on the main plane of the semiconductor substrate; and an insulating film covering all region of a semiconductor of the main plane of the semiconductor substrate exposed inside the guard ring, wherein the insulating film is made of a water impermeable material.Type: GrantFiled: July 27, 2016Date of Patent: August 22, 2017Assignee: Mitsubishi Electric CorporationInventor: Yoichi Nogami
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Patent number: 9716185Abstract: A field effect transistor includes: a semiconductor substrate having a main surface; a plurality of source electrodes and a plurality of drain electrodes alternately disposed and ohmic-connected with the main surface of the semiconductor substrate; a plurality of gate electrodes Schottky-connected with the main surface of the semiconductor substrate and respectively disposed between the plurality of source electrodes and the plurality of drain electrodes; and a Schottky electrode Schottky-connected with the main surface of the semiconductor substrate, wherein each of the plurality of drain electrodes has first and second portions separated from each other, a sum of widths of the first and second portions of each drain electrode is smaller than a width of one source electrode, the Schottky electrode is disposed between the first portion and the second portion of the drain electrode.Type: GrantFiled: January 21, 2016Date of Patent: July 25, 2017Assignee: Mitsubishi Electric CorporationInventors: Yoichi Nogami, Kenichi Horiguchi, Norio Higashisaka, Shinsuke Watanabe, Toshiaki Kitano
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Patent number: 9508564Abstract: A plurality of semiconductor element is formed on a substrate. A plurality of sealing windows and a support portion supporting the plurality of sealing windows are formed on a SOI substrate. The SOI substrate is pressured against the substrate by using a pressurizing member and the plurality of sealing windows of the SOI substrate is bonded to the substrate via a low melting point glass member arranged around the plurality of semiconductor elements. The support portion is separated from the plurality of sealing windows bonded to the substrate.Type: GrantFiled: July 19, 2013Date of Patent: November 29, 2016Assignee: Mitsubishi Electric CorporationInventors: Yoshinori Yokoyama, Kazuyo Endo, Jun Fujita, Shinnosuke Soda, Kazuyasu Nishikawa, Yoichi Nogami, Yoshitsugu Yamamoto, Akira Inoue
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Publication number: 20160336250Abstract: A semiconductor device includes: a semiconductor substrate having a main plane; a semiconductor element provided on the main plane of the semiconductor substrate; an electrode pad provided on the main plane of the semiconductor substrate and connected to the semiconductor element; a guard ring surrounding the semiconductor element and the electrode pad, and provided on the main plane of the semiconductor substrate; and an insulating film covering all region of a semiconductor of the main plane of the semiconductor substrate exposed inside the guard ring, wherein the insulating film is made of a water impermeable material.Type: ApplicationFiled: July 27, 2016Publication date: November 17, 2016Applicant: Mitsubishi Electric CorporationInventor: Yoichi NOGAMI
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Publication number: 20160322487Abstract: A field effect transistor includes: a semiconductor substrate having a main surface; a plurality of source electrodes and a plurality of drain electrodes alternately disposed and ohmic-connected with the main surface of the semiconductor substrate; a plurality of gate electrodes Schottky-connected with the main surface of the semiconductor substrate and respectively disposed between the plurality of source electrodes and the plurality of drain electrodes; and a Schottky electrode Schottky-connected with the main surface of the semiconductor substrate, wherein each of the plurality of drain electrodes has first and second portions separated from each other, a sum of widths of the first and second portions of each drain electrode is smaller than a width of one source electrode, the Schottky electrode is disposed between the first portion and the second portion of the drain electrode.Type: ApplicationFiled: January 21, 2016Publication date: November 3, 2016Applicant: Mitsubishi Electric CorporationInventors: Yoichi NOGAMI, Kenichi HORIGUCHI, Norio HIGASHISAKA, Shinsuke WATANABE, Toshiaki KITANO
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Publication number: 20160099193Abstract: A semiconductor device includes: a semiconductor substrate having a main plane; a semiconductor element provided on the main plane of the semiconductor substrate; an electrode pad provided on the main plane of the semiconductor substrate and connected to the semiconductor element; a guard ring surrounding the semiconductor element and the electrode pad, and provided on the main plane of the semiconductor substrate; and an insulating film covering all region of a semiconductor of the main plane of the semiconductor substrate exposed inside the guard ring, wherein the insulating film is made of a water impermeable material.Type: ApplicationFiled: July 10, 2015Publication date: April 7, 2016Applicant: MITSUBISHI ELECTRIC CORPORATIONInventor: Yoichi NOGAMI
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Publication number: 20150243530Abstract: A plurality of semiconductor element is formed on a substrate. A plurality of sealing windows and a support portion supporting the plurality of sealing windows are formed on a SOI substrate. The SOI substrate is pressured against the substrate by using a pressurizing member and the plurality of sealing windows of the SOI substrate is bonded to the substrate via a low melting point glass member arranged around the plurality of semiconductor elements. The support portion is separated from the plurality of sealing windows bonded to the substrate.Type: ApplicationFiled: July 19, 2013Publication date: August 27, 2015Applicant: Mitsubishi Electric CorporationInventors: Yoshinori Yokoyama, Kazuyo Endo, Jun Fujita, Shinnosuke Soda, Kazuyasu Nishikawa, Yoichi Nogami, Yoshitsugu Yamamoto, Akira Inoue
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Patent number: 9117896Abstract: A semiconductor device includes: a Si substrate having first and second major surfaces facing in opposite directions; a buffer layer of AlxGa1-xN (0?x?1) on the first major surface of the Si substrate; an epitaxially grown crystalline layer of AlyGa1-yN (0?y?1, x?y) on the buffer layer; a transistor on the epitaxially grown crystalline layer; and a filler of AlxGa1-xN and having the same x as the buffer layer. A through hole in the Si substrate extends from the second major surface to the buffer layer, and the through hole is filled with the filler.Type: GrantFiled: June 4, 2014Date of Patent: August 25, 2015Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Hiroyuki Okazaki, Yoshitaka Kamo, Yoichi Nogami, Hidetoshi Koyama, Shinichi Miyakuni
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Publication number: 20150084103Abstract: A semiconductor device includes: a Si substrate having first and second major surfaces facing in opposite directions; a buffer layer of AlxGa1-xN (0?x?1) on the first major surface of the Si substrate; an epitaxially grown crystalline layer of AlyGa1-yN (0?y?1, x?y) on the buffer layer; a transistor on the epitaxially grown crystalline layer; and a filler of AlxGa1-xN and having the same x as the buffer layer. A through hole in the Si substrate extends from the second major surface to the buffer layer, and the through hole is filled with the filler.Type: ApplicationFiled: June 4, 2014Publication date: March 26, 2015Applicant: Mitsubishi Electric CorporationInventors: Hiroyuki Okazaki, Yoshitaka Kamo, Yoichi Nogami, Hidetoshi Koyama, Shinichi Miyakuni
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Patent number: 8816493Abstract: A semiconductor device includes: a substrate; a semiconductor element on the substrate; an interconnection on the substrate and electrically connected to the semiconductor element; a window frame member on the substrate, surrounding the semiconductor element, and in contact with the interconnection; and a sealing window bonded to the window frame member and encapsulating the semiconductor element. The window frame member is a low melting glass and has a sheet resistance of 106-1010 ?/?.Type: GrantFiled: June 19, 2013Date of Patent: August 26, 2014Assignee: Mitsubishi Electric CorporationInventors: Yoichi Nogami, Yoshitsugu Yamamoto, Akira Inoue, Yoshinori Yokoyama, Jun Fujita, Kazuyo Endo, Shinnosuke Soda, Kazuyasu Nishikawa
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Publication number: 20140175615Abstract: A method for manufacturing a semiconductor device includes: forming a semiconductor element on a main surface of a substrate; forming a low melting glass film having a melting point of 450° C. or less on the main surface and the semiconductor element; heat treating the substrate while pressing the low melting glass film toward the main surface of the substrate with a pressurizing jig that is insulating or semi-insulating, and sintering the low melting glass film; and leaving the pressurizing jig on the low melting glass film after sintering the low melting glass film.Type: ApplicationFiled: September 25, 2013Publication date: June 26, 2014Applicant: Mitsubishi Electric CorporationInventors: Yoichi Nogami, Yoshitsugu Yamamoto, Yoshinori Yokoyama, Shinnosuke Soda
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Publication number: 20140077280Abstract: A semiconductor device includes: a substrate; a semiconductor element on the substrate; an interconnection on the substrate and electrically connected to the semiconductor element; a window frame member on the substrate, surrounding the semiconductor element, and in contact with the interconnection; and a sealing window bonded to the window frame member and encapsulating the semiconductor element. The window frame member is a low melting glass and has a sheet resistance of 106-1010 ?/?.Type: ApplicationFiled: June 19, 2013Publication date: March 20, 2014Inventors: Yoichi Nogami, Yoshitsugu Yamamoto, Akira Inoue, Yoshinori Yokoyama, Jun Fujita, Kazuyo Endo, Shinnosuke Soda, Kazuyasu Nishikawa