Patents by Inventor Yoko Kawano
Yoko Kawano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9588567Abstract: A control apparatus that causes data in a first storage unit to be written in a second storage unit, with power supplied from a sub power supply, when supply of power from a main power supply is discontinued, the control apparatus includes a remaining feed duration obtaining unit that obtains remaining feed duration during which the sub power supply can supply the power; and a retry count setting unit that sets a maximum retry count for writing the data from the first storage unit to the second storage unit, based on the remaining feed duration obtained by the remaining feed duration obtaining unit, when an error occurs while the data is being written.Type: GrantFiled: November 26, 2014Date of Patent: March 7, 2017Assignee: FUJITSU LIMITEDInventors: Yoko Kawano, Terumasa Haneda, Atsushi Uchida, Toshihiro Tomozaki
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Publication number: 20150324248Abstract: An information processing device includes: a processor; a first storage device configured to hold data that is read and written by the processor; and a controller configured to control data transfer between the processor and the first storage device, wherein the controller: reads out first data from the first storage device through a path without a data protection function; generates error check information for checking an error of the first data; writes the error check information as first error check information in a storage area bypassing the path; writes the error check information as second error check information in the first storage device through the path; compares the first error check information and the second error check information to each other; and determines, when the first error check information and the second error check information do not match each other, that an error has occurred in the path.Type: ApplicationFiled: March 11, 2015Publication date: November 12, 2015Applicant: Fujitsu LimitedInventors: Toshihiro TOMOZAKI, Terumasa Haneda, Yoko Kawano
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Publication number: 20150200685Abstract: A recording and reproducing device includes a plurality of data storing units, a control unit, a first error detection-and-correction unit, and a second error detection-and-correction unit. The control unit creates stripe data with a predetermined write capacity, creates a redundant group, associates a plurality of pieces of stripe data, and controls the writing of the associated data into each of the plurality of the data storing units. The first error detection-and-correction unit detects whether an error is present in each of the pieces of the stripe data, and corrects the stripe data. The second error detection-and-correction unit groups the second error correction code and the pieces of the stripe data, creates a plurality of error correction groups, detects whether an error is present in each of the pieces of the split stripe data in the same error correction group, and corrects the split stripe data.Type: ApplicationFiled: March 25, 2015Publication date: July 16, 2015Applicant: Fujitsu LimitedInventors: YOKO KAWANO, Terumasa Haneda
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Patent number: 9063880Abstract: A write DMA includes a write unit, a read unit and a parity generation unit. The read unit reads parity data from one of two NAND flashes storing the parity data therein. The parity generation unit generates parity data based on the read parity data and a plurality of stripes obtained by dividing user data. The write unit writes a stripe into any of a plurality of NAND flashes storing stripes therein, and writes generated parity data into the other NAND flash from which parity data is not read.Type: GrantFiled: October 5, 2012Date of Patent: June 23, 2015Assignee: FUJITSU LIMITEDInventors: Yoko Kawano, Terumasa Haneda, Atsushi Uchida
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Publication number: 20150169040Abstract: A control apparatus that causes data in a first storage unit to be written in a second storage unit, with power supplied from a sub power supply, when supply of power from a main power supply is discontinued, the control apparatus includes a remaining feed duration obtaining unit that obtains remaining feed duration during which the sub power supply can supply the power; and a retry count setting unit that sets a maximum retry count for writing the data from the first storage unit to the second storage unit, based on the remaining feed duration obtained by the remaining feed duration obtaining unit, when an error occurs while the data is being written.Type: ApplicationFiled: November 26, 2014Publication date: June 18, 2015Inventors: YOKO KAWANO, Terumasa Haneda, ATSUSHI UCHIDA, Toshihiro Tomozaki
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Patent number: 9047232Abstract: A storage apparatus includes a storage medium configured to store data and a control unit configured to control access to the storage medium. The control unit includes first storage configured to store data to be stored in the storage medium, a second storage configured to store data, a control information generator configured to generate control information indicating a storage state of the data in the first storage and a transfer controller configured to control transfer of the data stored in the first storage to the second storage on the basis of the control information generated by the control information generator when the supply of power to the control unit is stopped.Type: GrantFiled: September 8, 2011Date of Patent: June 2, 2015Assignee: FUJITSU LIMITEDInventors: Emi Cho, Yuji Hanaoka, Atsushi Uchida, Yoko Kawano
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Patent number: 8862808Abstract: A control apparatus includes a capacitor to store electric power supplied from the power supply unit and to supply the stored electric power to the control apparatus when the power supply from the power supply unit is stopped, a first nonvolatile memory, a second nonvolatile memory, a first controller, and a second controller. The first controller writes the data, stored in the cache memory, into the first nonvolatile memory when the external power supply is stopped verifies whether the data stored in the first nonvolatile memory is normal, and sends information of area where the data in the first nonvolatile memory is not normal when the verification indicates that the writing is not normal. And the second controller writes the information sent from the first controller into the second nonvolatile memory.Type: GrantFiled: February 22, 2012Date of Patent: October 14, 2014Assignee: Fujitsu LimitedInventors: Nina Tsukamoto, Yuji Hanaoka, Terumasa Haneda, Atsushi Uchida, Yoko Kawano
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Patent number: 8839072Abstract: An access control apparatus for controlling an access to a storage device, the access control apparatus includes a measuring unit configured to measure the time to erase data stored in the storage device, and a determination unit configured to determine a data size of an error correcting code added to data stored in the storage device in accordance with the time measured by the measuring unit. The access control apparatus includes a generation unit configured to generate the error correcting code having the data size determined by the determination unit, and an access controller configured to write the data and the error correcting code generated by the generation unit into the storage device.Type: GrantFiled: November 16, 2011Date of Patent: September 16, 2014Assignee: Fujitsu LimitedInventors: Atsushi Uchida, Terumasa Haneda, Yoko Kawano, Emi Cho
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Patent number: 8732414Abstract: A control device including: a storage device that includes a first storage area including a plurality of blocks into which data can be written more than once and a second storage area into which data can be written only once, wherein the first storage area further stores a flag for each of the blocks, the flag indicating whether or not the block is allowed to be used; a flag management information creation unit configured to create, on the basis of the flag, a flag management information for managing whether or not data can be stored in each block of the storage device; and a management information controller configured to cause the flag management information to be stored in the second storage area.Type: GrantFiled: June 28, 2011Date of Patent: May 20, 2014Assignee: Fujitsu LimitedInventors: Yoko Kawano, Yuji Hanaoka, Atsushi Uchida
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Patent number: 8516208Abstract: An information processing apparatus includes, a first storage unit, a second storage unit in which data stored in the first storage unit is backed up, and a memory controller that controls data backup operation. The memory controller divides a transfer source storage area into portions, and provides two transfer destination areas, each of the two transfer destination areas being divided into portions, backs up data in a direction from a beginning address of each divided area of the transfer source storage area to an end address thereof in one of the transfer destination areas provided for each divided area of the transfer source storage area, and backs up data in a direction from the end address of each divided area of the transfer source storage area to the beginning address thereof in the other transfer destination storage area.Type: GrantFiled: March 11, 2010Date of Patent: August 20, 2013Assignee: Fujitsu LimitedInventors: Yoko Kawano, Yuji Hanaoka, Terumasa Haneda, Atsushi Uchida
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Patent number: 8473784Abstract: A storage apparatus includes a backup processing unit that stores data stored in a first memory into a second memory as backup data upon occurrence of a power failure, a restore processing unit that upon recovery from the power failure restores the backup data backed up in the second memory to the first memory and erases the backup data, and an erasure processing termination unit that terminates the erasure processing upon a power failure occurring during erasure processing for erasing the backup data stored in the second memory, and a re-backup processing unit that re-backs up data in the first memory corresponding to the backup data erased from the second memory before the erasure processing is terminated by the erasure processing termination unit to a location in the second memory subsequent to a last location that contains the backup data which has not been erased.Type: GrantFiled: May 19, 2010Date of Patent: June 25, 2013Assignee: Fujitsu LimitedInventors: Yuji Hanaoka, Terumasa Haneda, Atsushi Uchida, Yoko Kawano, Emi Narita
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Patent number: 8370564Abstract: An access control device which writes data to each of predetermined storage block sets in a storage device of which a storage area has been divided into a plurality of storage blocks. The control device includes a management information storage section and an access processing section. The management information storage section stores, for each of said storage blocks, record enable/disable information indicating whether said storage block is a non-defective block in which the data can be recorded or a defective block in which the data cannot be recorded. If the data is written to each of said storage block sets, the access processing section writes the data only to non-defective blocks in said storage block set based on the record enable/disable information stored in said management information storage section.Type: GrantFiled: February 17, 2010Date of Patent: February 5, 2013Assignee: Fujitsu LimitedInventors: Terumasa Haneda, Yoko Kawano
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Patent number: 8356203Abstract: An asynchronous interface circuit for transferring a data stream between different clock domains, the asynchronous interface circuits includes a data holding circuit for sequentially receiving and transferring data of the data stream in synchronism with a first clock signal, and holding the received data until an input of a next data, an asynchronous memory for sequentially receiving the data held in the data holding circuit in synchronism with the first clock signal and for outputting the data in the order of inputting in synchronism with a second clock signal. The asynchronous interface circuit further includes a monitor for detecting an operating state of the asynchronous memory, and a selector for selecting one of the data output from the asynchronous memory and the data output from the data holding circuit on the basis of a detecting result of the monitor.Type: GrantFiled: May 25, 2010Date of Patent: January 15, 2013Assignee: Fujitsu LimitedInventors: Atsushi Uchida, Yuji Hanaoka, Terumasa Haneda, Yoko Kawano, Emi Narita
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Patent number: 8286028Abstract: A backup method makes a backup of cache data to a nonvolatile memory by using a controller, the cache data being stored in the volatile memory. The backup method includes writing the cache data stored in the volatility memory in a selected area of the nonvolatile memory, generating party data by operating the parity operations between each of the predetermined parts of the cache data in the volatile memory, verifying whether an error found in the part of the cache data in the nonvolatile memory can be recovered by using the parity data, and rewriting the part of the cache data when the error found in the part of the cache data in the nonvolatile memory cannot be recovered by using the parity data in an area of the nonvolatile memory different from the selected area.Type: GrantFiled: August 3, 2010Date of Patent: October 9, 2012Assignee: Fujitsu LimitedInventors: Shinnosuke Matsuda, Sadayuki Ohyama, Kentaro Yuasa, Takanori Ishii, Yoko Kawano, Yuji Hanaoka, Nina Tsukamoto, Tomoharu Muro
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Publication number: 20120254636Abstract: A control apparatus includes a capacitor to store electric power supplied from the power supply unit and to supply the stored electric power to the control apparatus when the power supply from the power supply unit is stopped, a first nonvolatile memory, a second nonvolatile memory, a first controller, and a second controller. The first controller writes the data, stored in the cache memory, into the first nonvolatile memory when the external power supply is stopped verifies whether the data stored in the first nonvolatile memory is normal, and sends information of area where the data in the first nonvolatile memory is not normal when the verification indicates that the writing is not normal. And the second controller writes the information sent from the first controller into the second nonvolatile memory.Type: ApplicationFiled: February 22, 2012Publication date: October 4, 2012Applicant: FUJITSU LIMITEDInventors: Nina TSUKAMOTO, Yuji Hanaoka, Terumasa Haneda, Atsushi Uchida, Yoko Kawano
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Publication number: 20120144268Abstract: An access control apparatus for controlling an access to a storage device, the access control apparatus includes a measuring unit configured to measure the time to erase data stored in the storage device, and a determination unit configured to determine a data size of an error correcting code added to data stored in the storage device in accordance with the time measured by the measuring unit. The access control apparatus includes a generation unit configured to generate the error correcting code having the data size determined by the determination unit, and an access controller configured to write the data and the error correcting code generated by the generation unit into the storage device.Type: ApplicationFiled: November 16, 2011Publication date: June 7, 2012Applicant: FUJITSU LIMITEDInventors: Atsushi UCHIDA, Terumasa Haneda, Yoko Kawano, Emi Cho
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Publication number: 20120072684Abstract: A storage apparatus includes a storage medium configured to store data and a control unit configured to control access to the storage medium. The control unit includes first storage configured to store data to be stored in the storage medium, a second storage configured to store data, a control information generator configured to generate control information indicating a storage state of the data in the first storage and a transfer controller configured to control transfer of the data stored in the first storage to the second storage on the basis of the control information generated by the control information generator when the supply of power to the control unit is stopped.Type: ApplicationFiled: September 8, 2011Publication date: March 22, 2012Applicant: Fujitsu LimitedInventors: Emi Cho, Yuji Hanaoka, Atsushi Uchida, Yoko Kawano
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Publication number: 20120005436Abstract: A control device including: a storage device that includes a first storage area including a plurality of blocks into which data can be written more than once and a second storage area into which data can be written only once, wherein the first storage area further stores a flag for each of the blocks, the flag indicating whether or not the block is allowed to be used; a flag management information creation unit configured to create, on the basis of the flag, a flag management information for managing whether or not data can be stored in each block of the storage device; and a management information controller configured to cause the flag management information to be stored in the second storage area.Type: ApplicationFiled: June 28, 2011Publication date: January 5, 2012Applicant: FUJITSU LIMITEDInventors: Yoko KAWANO, Yuji Hanaoka, Atsushi Uchida
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Publication number: 20110314236Abstract: In a control apparatus, a write control unit controls operation of writing data to a non-volatile storage unit. The write control unit is configurable with given control data. A control data storage unit stores first control data for the write control unit. An input reception unit receives second control data for the write control unit. A configuration unit configures the write control unit with the first control data stored in the control data storage unit when the first control data has a newer version number than that of the second control data received by the input reception unit, and with the second control data when the second control data has a newer version number than that of the first control data.Type: ApplicationFiled: May 11, 2011Publication date: December 22, 2011Applicant: FUJITSU LIMITEDInventors: Atsushi Uchida, Yuji Hanaoka, Yoko Kawano, Nina Tsukamoto
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Patent number: 8074104Abstract: A controlling apparatus for controlling a disk array unit includes a cache memory for caching data of the disk array unit; a nonvolatile memory for storing the data in the cache memory; and a control unit for detecting a defective location in the nonvolatile memory where the data is stored defectively and updating information indicating the defection location, for generating an error detection code of the updated information, for writing the generated information and the associated error detection code into an area of the nonvolatile memory different from any area where any information indicating any defective location previously detected and stored into the nonvolatile memory, and for controlling writing the data in the cache memory into a location of the nonvolatile memory designated by any selected one of the information stored in the nonvolatile memory.Type: GrantFiled: August 3, 2010Date of Patent: December 6, 2011Assignee: Fujitsu LimitedInventors: Tomoharu Muro, Nina Tsukamoto, Yuji Hanaoka, Yoko Kawano