Abstract: A semiconductor device having a recessed active edge is provided. The semiconductor devices include an isolation layer disposed in a substrate to define an active region. A gate electrode is disposed to cross over the active region. A source region and a drain region are disposed in the active region on both sides of the gate electrode. A recessed region is disposed under the gate electrode and on an edge of the active region adjacent to the isolation layer. A bottom of the recessed region may be sloped down toward the isolation layer. The gate electrode may further extend into and fill the recessed region. That is, a gate extension may be disposed in the recessed region. A method of fabricating the semiconductor device is also provided.

Abstract: A fuel injector with various embodiments of a annular damper member that reduces noise generated between a valve group subassembly and a power group subassembly during operation of the fuel injector. A mass annular damper member is also shown and described. A method of reducing sound in the valve group subassembly is also disclosed.

Abstract: A safety bio-molecular sampling and transport system utilizing a docking connector mechanism includes a elongate enclosure having open ends along with a collection sponge slidably disposed within the enclosure. A sponge moving piston is provided within the enclosure and is engagable with a plunger handle which is configured for removably engaging the piston and enabling manual sliding of the collection sponge between the position inside of the elongate structure and a position exterior another end of the enclosure. A specimen capsule configured for removably docking to the enclosure is provided for receiving specimen and is sealable for safe and laborless transport thereof.

Abstract: The present invention relates to a non-volatile memory device having conductive sidewall spacers and a method for fabricating the same. The non-volatile memory device includes: a substrate; a gate insulation layer formed on the substrate; a gate structure formed on the gate insulation layer; a pair of sidewall spacers formed on sidewalls of the gate structure; a pair of conductive sidewall spacers for trapping/detrapping charges formed on the pair of sidewall spacers; a pair of lightly doped drain regions formed in the substrate disposed beneath the sidewalls of the gate structure; and a pair of source/drain regions formed in the substrate disposed beneath edge portions of the pair of conductive sidewall spacers.

Abstract: A variety of elastomeric-based microfluidic devices and methods for using and manufacturing such devices are provided. Certain of the devices have arrays of reaction sites to facilitate high throughput analyses. Some devices also include reaction sites located at the end of blind channels at which reagents have been previously deposited during manufacture. The reagents become suspended once sample is introduced into the reaction site. The devices can be utilized with a variety of heating devices and thus can be used in a variety of analyses requiring temperature control, including thermocycling applications such as nucleic acid amplification reactions, genotyping and gene expression analyses.

Abstract: A phantom for Diffusion Tensor Imaging (DTI) to measure the main physical quantities of diffusion tensors, such as diffusion anisotrophy, a diffusion principal axis and a route of the diffusion principal axis, and to evaluate the accuracy of DTI are provided. The phantom for diffusion tensor imaging includes: an outer container providing a space; materials for diffusion measurement located in the space of the outer container and formed of bunches of microtubes; and materials for fixing located in the space of the outer container to fix the materials for diffusion measurement to a specific location.

Abstract: In a phase change memory, an interlayer insulating layer is disposed on a substrate. A heater plug includes a lower portion disposed in a contact hole penetrating the interlayer insulating layer and an upper portion protruding upward over the top surface of the interlayer insulating layer. A phase change pattern is disposed on the interlayer insulating layer to cover the top surface and the side surface of the protruding portion of the heater plug. An insulating spacer is interposed between the phase change pattern and the side surface of the protruding portion of the heater plug. A capping electrode is disposed on the phase change pattern.

Abstract: A dual in-line memory module (DIMM) for use in test includes a memory array with a plurality of memories, a test signal input/output unit, and a normal data input/output unit. The test signal input/output unit is provided in the respective memories to perform an input/output operation of a test signal with an external test mode controller for a test mode operation. The normal data input/output unit is provided in the respective memories to perform an input/output operation of a normal data with an external memory controller for a normal mode operation.

Abstract: A method of forming a field programmable gate array (FPGA) structure of a semiconductor device capable of reducing manufacturing cost through simpler processes includes forming a contact parallel connection structure in which contacts connected to a gate electrode and a source/drain by way of a first amorphous silicon pattern are connected in parallel with each other; forming a via parallel connection structure in which vias, connected to neighboring metal interconnections by a second amorphous silicon pattern, are connected in parallel with each other at a position not overlapping the contact parallel connection structure; and forming a connection means for connecting the contact parallel connection structure to the via parallel connection structure.

Abstract: In a method of driving a nonvolatile memory device a first data state is determined from among the plurality of data states. The number of simultaneously programmed bits is set according to the determined first data state and a scanning operation is performed on data input from an external device to search data bits to be programmed. The searched data bits are programmed in response to the number of simultaneously programmed bits. The number of simultaneously programmed bits corresponding to the first data state is different from a number of simultaneously programmed bits corresponding to at least a second of the plurality of data states.

Abstract: Disclosed is an imaging apparatus for infrared nonlinear molecular vibrational microscopy.

Abstract: A page buffer circuit of a memory device including a plurality of Multi-Level Cells (MLCs) connected to at least a pair of bit lines includes a Most Significant Bit (MSB) latch, a Least Significant Bit (LSB) latch, a data I/O circuit, an inverted output circuit, a MSB verification circuit, and a LSB verification circuit. The MSB latch is configured to sense a voltage of a sensing node in response to a control signal and store an upper sensing data, and output an inverted upper sensing data, or store an input data and output an inverted input data. The LSB latch is configured to sense a voltage of the sensing node in response to the control signal, and store and output a lower sensing data, or store and output an input data received through the MSB latch. The data I/O circuit is connected to the MSB latch and a data I/O line, and is configured to perform the input and output of a sensing data or the input and output of a program data.

Abstract: A conventional image sensor has a narrow dynamic range, so that the conventional image sensor has the limitation of not representing very dark portions or very bright portions depending on the exposure time when representing an image having such dark and bright portions. The present invention provides an image sensor including at least two storage units for respectively storing at least two image signals; a first switch unit for performing switching applied image signals to be respectively stored in the at least two storage units; and a second switch unit respectively connected to the at least two storage units and for equalizing the image signals stored in the at least two storage units.

Abstract: A phase-change memory device more precisely controls electrical current required to accomplish a phase change by using contact holes that extend between phase change layers that are sized differently from each other.

Abstract: Method and system for equivalence checking of a low power design are disclosed. The method includes receiving a register-transfer level (RTL) netlist representation of a circuit, receiving a power specification file for describing power requirements of the circuit, creating a low power gate netlist for representing a design implementation of the circuit using the RTL netlist and the power specification file, creating a reference low power RTL netlist for representing a design specification of the circuit using the RTL netlist and the power specification file, and performing equivalence checking between the low power gate netlist and the reference low power RTL netlist. The method further includes annotating low power information described in the power specification file into the reference low power RTL netlist, and creating low power logic in the reference low power RTL netlist.

Abstract: A method for fabricating a semiconductor memory device includes forming a first layer, injecting a tungsten source gas and a silicon source gas simultaneously to form a tungsten silicide layer over the first layer, forming a tungsten nitride layer over the tungsten silicide layer without a post purge process of additionally supplying the silicon source gas, and forming a second layer over the tungsten nitride layer.

Abstract: Electron multipliers and techniques for manufacturing electron multipliers are provided. In one embodiment, an electron multiplier includes at least two electrodes, a plurality of electron emission tips for emitting electrons formed on one of the at least two electrodes, and at least one porous structure having a plurality of pores for multiplying the electrons emitted from the plurality of electron emission tips. The porous structure includes a metal core and a layer of insulator material coated on an outer surface of the metal core, and is disposed between the at least two electrodes.

Abstract: The present invention identifies a novel family of kinases regulated by brassinosteroids, referred to as BRKs (brassinosteroid regulated kinases) or BSKs (brassinosteroid signaling kinases). The present invention provides methods for modulating the response of a plant cell to a brassinosteroid using BRKs.

Abstract: A control system for a motor-driven washing machine. The control system includes an electrical motor; a driving unit that applies an input voltage to the motor to drive the motor; a voltmeter that measures a reverse voltage generated by the motor for each predetermined period; and a microprocessor reducing a speed of the motor if the measured reverse voltage is less than or equal to a predetermined voltage level.

Abstract: Pluggable fiber optic modules having a receive printed circuit board and a transmit printed circuit board perpendicular with an interface printed circuit board with an edge connection. The edge connection of the interface printed circuit board to plug into and out from an edge connector of a host printed circuit board. A transmitter optoelectronic device is coupled to the transmit printed circuit board. A receiver optoelectronic device is coupled to the receive printed circuit board. The pluggable fiber optic modules may further include a support base, a nose receptacle, and an alignment plate.