Abstract: A display device, includes: a display area including an upper side, a lower side, a left side, a right side, and inclined corner portions where the upper, lower, left, and right sides meet; a demultiplexing circuit unit adjacent to the lower side of the display area and the corner portion connected thereto; and a scan transmission line which extends toward the display area from an outer side of the left side and overlaps with the demultiplexing circuit unit outside the corner portion, wherein the demultiplexing circuit unit includes a demultiplexer transistor, and the scan transmission line is formed of a different conductive layer from an electrode of a demultiplexer transistor.

Abstract: A display panel includes a first panel region (FPR) including (n?1)-th and n-th pixel rows ((n?1)PR and nPR), and a second panel region (SPR) dividing the nPR to propagate an optical signal. The display panel includes a circuit element layer (CEL) and a display element layer (DEL). The CEL includes a signal line (SL), a pixel driving circuit (PDC), and first to third regions. The SL and the PDC are in the first region. The second region (SR) corresponds to the SPR. The SL and the PDC are not in the SR. The third region (TR) corresponds to the SPR and is along a periphery of the SR. The SL is in the TR, and includes an (n?1)-th scan line ((n?1)SL) connected to the (n?1)PR, an n-th reset line (nRL) connected to the nPR, and a first row connection line in the TR and connecting the (n?1)SL and the nRL.

Abstract: A display device may includes: a substrate including a pixel area and a peripheral area; pixels provided in the pixel area of the substrate, each of the pixels including a light-emitting element provided with a pixel electrode; scan lines and data lines coupled to the pixels; a power line configured to supply driving power to the light-emitting elements, and extending in one direction; and an initialization power line configured to supply initialization power to the light-emitting elements. The power line and the initialization power line may be provided on different layers. The initialization power line may include: first conductive lines extending in a direction oblique to the scan lines and the data lines; and conductive lines intersecting the first conductive lines. The first and second conductive lines may be disposed in areas between the pixel electrodes of adjacent light-emitting elements.

Abstract: A chip antenna includes: a hexahedral-shaped body portion having a permittivity, and including a first surface and a second surface opposite to the first surface; a hexahedral-shaped radiation portion coupled to the first surface of the body portion; and a hexahedral-shaped ground portion coupled to the second surface of the body portion, wherein a width of each of the radiation portion and the ground portion is in a range of 100 ?m to 500 ?m.

Abstract: The present invention relates a vertex optimization method and system using a depth image in workspace modeling, the method including generating a workspace model by scanning a workspace and modeling the workspace; generating a vertex image by projecting vertices in the workspace model generated in the scanning of the workspace; generating a depth image by expanding the vertices in the vertex image generated in the generating of the vertex image; and resampling the workspace model generated in the generating of the workspace model using the depth image generated in the generating of the depth image. Accordingly, the depth image can be generated from a vertex image obtained by projecting spatial data scanned through a 3D scanner onto a virtual wall, thereby uniformly aligning non-uniform vertices and filling gaps in which no vertices are generated.

Abstract: An antenna module includes: a board having a first surface including a ground region and a feed region; and chip antennas mounted on the first surface, each of the chip antennas including a first antenna and a second antenna. The first antenna and the second antenna each include a ground portion bonded to the ground region, and a radiation portion bonded to the feed region. A length of a radiating surface of the first antenna is greater than a mounting height of the first antenna, and a mounting height of the second antenna is greater than a length of a radiating surface of the second antenna. A horizontal spacing distance between the radiation portion of the first antenna and the ground region is greater than a horizontal spacing distance between the radiation portion of the second antenna and the ground region.

Abstract: A display device includes: a plurality of pixels substantially in a matrix form including a plurality of pixel columns in a first direction and a plurality of pixel rows in a second direction intersecting the first direction; a plurality of data lines connected to the pixel columns, respectively; a plurality of scan lines extending in the second direction; and a power line which supplies a driving power voltage to the pixels. Each of the data lines includes a first sub-data line disposed at a side of a corresponding pixel column, and a second sub-data line disposed at an opposite side of the corresponding pixel column, and each of the pixels includes a first transistor and a display element connected to the first transistor, where the power line overlaps with at least a portion of the first transistor.

Abstract: A display device, includes: a display area including an upper side, a lower side, a left side, a right side, and inclined corner portions where the upper, lower, left, and right sides meet; a demultiplexing circuit unit adjacent to the lower side of the display area and the corner portion connected thereto; and a scan transmission line which extends toward the display area from an outer side of the left side and overlaps with the demultiplexing circuit unit outside the corner portion, wherein the demultiplexing circuit unit includes a demultiplexer transistor, and the scan transmission line is formed of a different conductive layer from an electrode of a demultiplexer transistor.

Abstract: A display device includes: pixel columns including pixels arranged along a first direction; pixel rows including pixels arranged along a second direction crossing the first direction; data lines connected to respective pixel columns, each of the data lines including a first sub-data line provided at one side of a corresponding pixel column and a second sub-data line provided at another side of the corresponding pixel column; scan lines extending along the second direction and connected to respective pixel rows; and a power line to supply driving power to the pixels, one of the pixels of the pixel columns is connected to the first sub-data line, and a pixel adjacent to the pixel connected to the first sub-data line is connected to the second sub-data line, and the first sub-data line and the second sub-data line in the same pixel column are on different layers from each other.

Abstract: An electronic apparatus includes a display panel including a base substrate including an active area and a peripheral area adjacent to the active area, pixels on the active area, pads on the peripheral area and arranged in a first direction, signal lines connecting the pixels to the pads, and a vernier mark on the peripheral area and spaced apart from the pads and the signal lines, a circuit board on the display panel and including a base film, and leads on the base film and overlapping with the pads in a plan view, and a conductive adhesive member extending in the first direction and between the display panel and the circuit board to connect the pads to the leads. The conductive adhesive member overlaps with the vernier mark when viewed in a second direction intersecting the first direction.

Abstract: A chip antenna includes a radiation portion having a block shape and a first surface and a second surface opposing each other, and configured to receive and radiate a feed signal as an electromagnetic wave; a first block made of a dielectric material and coupled to the first surface of the radiation portion; a second block made of a dielectric material and coupled to the second surface of the radiation portion; a ground portion having a block shape and coupled to the first block, and configured to reflect the electromagnetic wave radiated by the radiation portion back toward the radiation portion; and a director having a block shape and coupled to the second block, wherein an overall width of the ground portion, the first block, and the radiation portion is 2 mm or less, and the first block has a dielectric constant of 3.5 or more to 25 or less.

Abstract: The present invention provides a method for generating hydroxyl radicals and removing organic pollutants in water by utilizing an organic membrane. The inventive method generates hydroxyl radicals by adopting a nitrocellulose membrane as a photocatalytic material, placing the nitrocellulose membrane in water, illuminating with the sun or a sunlamp having a wavelength above 280 nm as a light source, and causing the nitrocellulose membrane to undergo a photochemical reaction at the membrane surface, and the generation rate of hydroxyl radicals can be achieved by adjusting the surface area of the membrane and a light intensity. The generated hydroxyl radicals can remove phenol, bisphenol A, thiamphenicol and other typical organic pollutants in water very well.

Abstract: A storage device includes nonvolatile memory devices that store data, a storage controller, and an adaptive power supply circuit. The storage controller controls the nonvolatile memory devices. The adaptive power supply circuit generates at least one operation voltage based on at least one power supply voltage, and provides the at least one operation voltage to the nonvolatile memory devices and the storage controller. The at least one power supply voltage is provided to the adaptive power supply circuit through a portion of power lines connected to a host. Under control of the storage controller, the adaptive power supply circuit adaptively activates a power disable function associated with a provision of the at least one operation voltage according to a level of a third power supply voltage provided through a third power line of the plurality of power lines. The third power supply voltage is provided by the host.

Abstract: The present invention relates a vertex optimization method and system using a depth image in workspace modeling, the method including generating a workspace model by scanning a workspace and modeling the workspace; generating a vertex image by projecting vertices in the workspace model generated in the scanning of the workspace; generating a depth image by expanding the vertices in the vertex image generated in the generating of the vertex image; and resampling the workspace model generated in the generating of the workspace model using the depth image generated in the generating of the depth image. Accordingly, the depth image can be generated from a vertex image obtained by projecting spatial data scanned through a 3D scanner onto a virtual wall, thereby uniformly aligning non-uniform vertices and filling gaps in which no vertices are generated.

Abstract: The present invention relates a haptic tool system, the system including: a computer device portion providing a content image including a target object for user testing or learning through a haptic feedback simulation function; and a haptic drill tool having an capacitive touch pen that makes contact with the target object and providing a haptic feedback simulating use of an actual drill to the user on the basis of load cell displacement information on a force applied according to the contact of the capacitive touch pen and physical property information on the target object. According to the haptic tool system, it is possible to provide the haptic feedback similar to a force and a motion sensation that the user feels when using an actual electric drill.

Abstract: An antenna module includes a substrate having a first surface including a ground region and a feeder region; chip antennas mounted on the first surface of the substrate; and at least one patch antenna disposed inside of the substrate or at least partially disposed on a second surface of the substrate. The chip antennas include a body portion, a ground portion bonded to a first surface of the body portion, and a radiation portion bonded to a second surface of a body portion. The ground portion of each chip antenna is mounted on the ground region and the radiation portion of each chip antenna is mounted on the feeder region.

Abstract: A display device, includes: a display area including an upper side, a lower side, a left side, a right side, and inclined corner portions where the upper, lower, left, and right sides meet; a demultiplexing circuit unit adjacent to the lower side of the display area and the corner portion connected thereto; and a scan transmission line which extends toward the display area from an outer side of the left side and overlaps with the demultiplexing circuit unit outside the corner portion, wherein the demultiplexing circuit unit includes a demultiplexer transistor, and the scan transmission line is formed of a different conductive layer from an electrode of a demultiplexer transistor.

Abstract: There is provided a display device including a display panel including a first display area and a second display area that include a plurality of pixels, a scan driver configured to provide a scan signal to the pixels, the scan driver being at least partially between the first display area and the second display area, a data driver configured to provide a data signal to the pixels, an emission controller configured to provide an emission control signal to the pixels, the emission controller being at a side of the first display area and at a side of the second display area, and a timing controller configured to generate a control signal that controls the scan driver, the data driver, and the emission controller.

Abstract: Power management apparatuses are provided. A power management apparatus includes a secondary power device that includes at least one capacitor. The power management apparatus includes a charging circuit that includes a direct current (DC)-DC converter and that is configured to supply power to the secondary power device. Moreover, the power management apparatus includes a measuring circuit that is configured to measure a switching profile of the DC-DC converter, and to determine a state of the secondary power device by comparing at least one time period of the switching profile with a reference time. Related memory systems and methods of operation are also provided.