Patents by Inventor Yong-Bae Kim

Yong-Bae Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8299304
    Abstract: This invention provides alignment materials for liquid crystal display device of vertical alignment mode and methods for the preparation of the same, and more particularly, it provides diaminobenzene derivatives represented by the following formula 1 (shown in description), capable of aligning liquid crystal in uniform and vertical way and remarkably improving clarity and solubility against organic solvents, methods for the preparation of the same and liquid crystal alignment films using the same.
    Type: Grant
    Filed: February 9, 2007
    Date of Patent: October 30, 2012
    Assignee: Dongjin Semichem Co., Ltd.
    Inventors: Jin wook Choi, Dal bong Seo, Jae cheol Park, Yong bae Kim
  • Publication number: 20110105698
    Abstract: This invention provides alignment materials for liquid crystal display device of vertical alignment mode and methods for the preparation of the same, and more particularly, it provides diaminobenzene derivatives represented by the following formula 1 (shown in description), capable of aligning liquid crystal in uniform and vertical way and remarkably improving clarity and solubility against organic solvents, methods for the preparation of the same and liquid crystal alignment films using the same.
    Type: Application
    Filed: February 9, 2007
    Publication date: May 5, 2011
    Applicant: DONGJIN SEMICHEM Co., Ltd.
    Inventors: Jin wook Choi, Dal bong Seo, Jae cheol Park, Yong bae Kim
  • Publication number: 20090041955
    Abstract: This invention provides alignment materials for liquid crystal display device of vertical alignment mode and methods for the preparation of the same, and more particularly, it provides diaminobenzene derivatives represented by the following formula 1: wherein n is an integer of 1 to 5 and R is an alkyl or alkoxy group of 3 to 5 carbon atoms, which align liquid crystal in uniform and vertical way, have not only excellent mechanical properties such as heat resistance and surface strength but also high pretilt angles of liquid crystal and in particular, can make response rate of liquid crystal fast, methods for the preparation of the same and liquid crystal alignment films using the same.
    Type: Application
    Filed: February 9, 2007
    Publication date: February 12, 2009
    Applicant: Dongjin Semichem Co., Ltd.
    Inventors: Jin wook Choi, Eung jae Park, Jae cheol Park, Yong bae Kim
  • Patent number: 7306002
    Abstract: A system and method for cleaning a substrate, such as a semiconductor wafer, utilizes a rotatable wafer supporting assembly with a cylindrical body to provide stability for the substrate being cleaned, even at high rotational speeds. The rotatable wafer supporting assembly may include wafer holding mechanisms with pivotable confining members that are configured to hold the substrate using centrifugal force when the wafer supporting assembly is rotated. In an embodiment, the cleaning system may include a positioning system operatively connected to an acoustic transducer to provide meaningful control of the acoustic energy applied to a surface of the substrate by selectively changing the distance between the acoustic transducer and the substrate surface so that the substrate can be cleaned more effectively.
    Type: Grant
    Filed: January 4, 2003
    Date of Patent: December 11, 2007
    Inventors: Yong Bae Kim, Jungyup Kim, Yong Ho Lee, In Kwon Jeong
  • Patent number: 7258124
    Abstract: An apparatus and method for treating surfaces of semiconductor wafers with a reactive gas, such as ozone, utilizes streams of gaseous material ejected from a gas nozzle structure to create depressions on or holes through a boundary layer of processing fluid formed on a semiconductor wafer surface to increase the amount of reactive gas that reaches the wafer surface through the boundary layer. The apparatus and method may be used to clean a semiconductor wafer surface and/or grow an oxide layer on the wafer surface by oxidation.
    Type: Grant
    Filed: January 20, 2006
    Date of Patent: August 21, 2007
    Inventors: In Kwon Jeong, Yong Bae Kim, Jungyup Kim
  • Patent number: 7071113
    Abstract: A process for removal of a photoresist mask used to etch openings in low k carbon-doped silicon oxide dielectric material of an integrated circuit structure, and for removing etch residues remaining from either the etching of the openings or removal of the resist mask, while inhibiting damage to the low k dielectric material comprises. The structure is exposed to a reducing plasma to remove a portion of the photoresist mask, and to remove a portion of the residues remaining from formation of the openings in the layer of low k dielectric material. The structure is then exposed to an oxidizing plasma to remove any remaining etch residues from the openings in the layer of low k dielectric material or removal of the resist mask.
    Type: Grant
    Filed: July 14, 2003
    Date of Patent: July 4, 2006
    Assignee: LSI Logic Corporation
    Inventors: Yong-Bae Kim, Philippe Schoenborn
  • Patent number: 7051743
    Abstract: An apparatus and method for cleaning surfaces of semiconductor wafers utilizes streams of gaseous material ejected from a gas nozzle structure to create depressions on or holes through a boundary layer of cleaning fluid formed on a semiconductor wafer surface to increase the amount of gaseous material that reaches the wafer surface through the boundary layer.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: May 30, 2006
    Inventors: Yong Bae Kim, In Kwon Jeong, Jungyup Kim
  • Patent number: 7022193
    Abstract: An apparatus and method for treating surfaces of semiconductor wafers with a reactive gas, such as ozone, utilizes streams of gaseous material ejected from a gas nozzle structure to create depressions on or holes through a boundary layer of processing fluid formed on a semiconductor wafer surface to increase the amount of reactive gas that reaches the wafer surface through the boundary layer. The apparatus and method may be used to clean a semiconductor wafer surface and/or grow an oxide layer on the wafer surface by oxidation.
    Type: Grant
    Filed: January 23, 2003
    Date of Patent: April 4, 2006
    Inventors: In Kwon Jeong, Yong Bae Kim, Jungyup Kim
  • Patent number: 6836929
    Abstract: An accessory tool mounting device is provided for a vacuum cleaner by means of which accessory tools can be detachably mounted on the vacuum cleaner. The vacuum cleaner includes a suction device, a plurality of wheels, and exhaust portions for filtering out foreign substances contained in air drawn in by the suction device and exhausted as filtered air. The accessory tool mounting device includes wheel fender portions that extend outwardly from a main body of the vacuum cleaner, exhaust-portion forming extensions that extend outwardly from the main body and are formed adjacent to the wheel fender portions, a fastening box member an upper end of which is open and which is formed between the wheel fender portion and the exhaust-portion forming extension, and an accessory mounting member comprising a U-shaped elastic fastening end which is insertable downwardly into the fastening box member.
    Type: Grant
    Filed: April 19, 2002
    Date of Patent: January 4, 2005
    Assignee: LG Electronics Inc.
    Inventor: Yong-Bae Kim
  • Patent number: 6794314
    Abstract: A method is disclosed for forming an ultrathin oxide layer of uniform thickness. The method is particularly advantageous for producing uniformly thin interfacial oxides beneath materials of high dielectric permitivity, or uniformly thin passivation oxides. Hydrofluoric (HF) etching of a silicon surface, for example, is followed by termination of the silicon surface with ligands larger than H or F, particularly hydroxyl, alkoxy or carboxylic tails. The substrate is oxidized with the surface termination in place. The surface termination and relatively low temperatures moderate the rate of oxidation, such that a controllable thickness of oxide is formed. In some embodiments, the ligand termination is replaced with OH prior to further deposition. The deposition preferably includes alternating, self-limiting chemistries in an atomic layer deposition process, though any other suitable deposition process can be used.
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: September 21, 2004
    Assignee: ASM International N.V.
    Inventors: Ivo Raaijmakers, Yong-Bae Kim, Marko Tuominen, Suvi P. Haukka
  • Publication number: 20040132318
    Abstract: A system and method for cleaning a substrate, such as a semiconductor wafer, utilizes a rotatable wafer supporting assembly with a cylindrical body to provide stability for the substrate being cleaned, even at high rotational speeds. The rotatable wafer supporting assembly may include wafer holding mechanisms with pivotable confining members that are configured to hold the substrate using centrifugal force when the wafer supporting assembly is rotated. In an embodiment, the cleaning system may include a positioning system operatively connected to an acoustic transducer to provide meaningful control of the acoustic energy applied to a surface of the substrate by selectively changing the distance between the acoustic transducer and the substrate surface so that the substrate can be cleaned more effectively.
    Type: Application
    Filed: January 4, 2003
    Publication date: July 8, 2004
    Inventors: Yong Bae Kim, Jungyup Kim, Yong Ho Lee, In Kwon Jeong
  • Publication number: 20040079396
    Abstract: An apparatus and method for treating surfaces of semiconductor wafers with a reactive gas, such as ozone, utilizes streams of gaseous material ejected from a gas nozzle structure to create depressions on or holes through a boundary layer of processing fluid formed on a semiconductor wafer surface to increase the amount of reactive gas that reaches the wafer surface through the boundary layer. The apparatus and method may be used to clean a semiconductor wafer surface and/or grow an oxide layer on the wafer surface by oxidation.
    Type: Application
    Filed: January 23, 2003
    Publication date: April 29, 2004
    Inventors: In Kwon Jeong, Yong Bae Kim, Jungyup Kim
  • Publication number: 20040079395
    Abstract: An apparatus and method for cleaning surfaces of semiconductor wafers utilizes streams of gaseous material ejected from a gas nozzle structure to create depressions on or holes through a boundary layer of cleaning fluid formed on a semiconductor wafer surface to increase the amount of gaseous material that reaches the wafer surface through the boundary layer.
    Type: Application
    Filed: October 29, 2002
    Publication date: April 29, 2004
    Inventors: Yong Bae Kim, In Kwon Jeong, Jungyup Kim
  • Patent number: 6723653
    Abstract: Removal of rough edges in punctured or ruptured pores on the walls of an opening, such as a via and/or trench opening, in a layer of porous dielectric material, in an integrated circuit structure, is carried out to permit satisfactory lining of all exposed surfaces of the porous dielectric material with a barrier layer which prevents contact between a copper filler and the porous dielectric material, and facilitates filling of the completely lined punctured/ruptured pore with such copper filler to eliminate void formation. The rough edges of the punctured/ruptured pores are removed by an isotropic etch of the exposed walls of the opening. Preferably, the dielectric material in the porous dielectric material is a low k dielectric material.
    Type: Grant
    Filed: August 17, 2001
    Date of Patent: April 20, 2004
    Assignee: LSI Logic Corporation
    Inventor: Yong-Bae Kim
  • Publication number: 20040072440
    Abstract: A process for removal of a photoresist mask used to etch openings in low k carbon-doped silicon oxide dielectric material of an integrated circuit structure, and for removing etch residues remaining from either the etching of the openings or removal of the resist mask, while inhibiting damage to the low k dielectric material comprises. The structure is exposed to a reducing plasma to remove a portion of the photoresist mask, and to remove a portion of the residues remaining from formation of the openings in the layer of low k dielectric material. The structure is then exposed to an oxidizing plasma to remove any remaining etch residues from the openings in the layer of low k dielectric material or removal of the resist mask.
    Type: Application
    Filed: July 14, 2003
    Publication date: April 15, 2004
    Inventors: Yong-Bae Kim, Philippe Schoenborn
  • Publication number: 20040062874
    Abstract: A system and method for wet cleaning a semiconductor wafer utilizes a nozzle assembly to combine two or more input fluids to form a cleaning fluid at the point-of-use. The input fluids are received at the nozzle assembly and combined in a chamber of the nozzle assembly to form the cleaning fluid. The nozzle assembly may include an acoustic transducer to generate an acoustic energy, one or more valves, e.g., three-way valves, to control the receipt of input fluids and/or a flow control mechanism, e.g., a pressure spring valve, to control dispensing of the cleaning fluid onto a surface of the semiconductor wafer.
    Type: Application
    Filed: August 14, 2002
    Publication date: April 1, 2004
    Inventors: Yong Bae Kim, Kent Child, Yong Ho Lee, In Kwon Jeong, Jungyup Kim
  • Patent number: 6673721
    Abstract: A process for removal of a photoresist mask used to etch openings in low k carbon-doped silicon oxide dielectric material of an integrated circuit structure, and for removing etch residues remaining from either the etching of the openings or removal of the resist mask, while inhibiting damage to the low k dielectric material comprises. The structure is exposed to a reducing plasma to remove a portion of the photoresist mask, and to remove a portion of the residues remaining from formation of the openings in the layer of low k dielectric material. The structure is then exposed to an oxidizing plasma to remove any remaining etch residues from the openings in the layer of low k dielectric material or removal of the resist mask.
    Type: Grant
    Filed: July 2, 2001
    Date of Patent: January 6, 2004
    Assignee: LSI Logic Corporation
    Inventors: Yong-Bae Kim, Philippe Schoenborn
  • Publication number: 20030106181
    Abstract: The present invention relates to an accessory tool mounting device for a vacuum cleaner by which accessory tools S can be detachably mounted on a main body 50 of the vacuum cleaner. The accessory tool mounting device according to the present invention is used with a vacuum cleaner including a suction means installed therein, a plurality of wheels installed at an end of the bottom thereof, and exhaust portions for filtering out foreign substances contained in air drawn by the suction means and exhausting the filtered air.
    Type: Application
    Filed: April 19, 2002
    Publication date: June 12, 2003
    Applicant: LG Electronics Inc.
    Inventor: Yong-Bae Kim
  • Publication number: 20030084918
    Abstract: An apparatus and method for removing materials, such as photoresist, on surfaces of objects, such as semiconductor wafers, utilizes one or more integrated dry-wet processing modules to selectively perform plasma ashing and wet-chemical cleaning processes. Thus, a customized combination of plasma ashing and wet-chemical cleaning processes can be performed on a single platform to achieve desired processing results on the objects. In an embodiment, the apparatus may also include a critical dimension inspection unit to inspect the objects that are being processed by the apparatus.
    Type: Application
    Filed: September 10, 2002
    Publication date: May 8, 2003
    Inventor: Yong Bae Kim
  • Patent number: 6559048
    Abstract: Via poisoning of vias formed in low k carbon-containing silicon oxide dielectric material is suppressed by forming the via in a layer of such dielectric material with a smooth inwardly sloped sidewall. Such a sloped sidewall via can be etched in a low k dielectric layer by first forming a via resist mask over the upper surface of such a dielectric layer, then heat treating the mask sufficiently to deform the sidewall geometry of the resist mask to form a sloped sidewall on the opening or openings in the heat treated resist mask. The resulting erosion of such a resist mask, during a subsequent etch step to form the via in the low k dielectric material through such a sloped sidewall resist mask, imparts a tapered or sloped sidewall geometry to the via which is then formed in the underlying layer of low k dielectric material.
    Type: Grant
    Filed: May 30, 2001
    Date of Patent: May 6, 2003
    Assignee: LSI Logic Corporation
    Inventors: Yong-Bae Kim, Philippe Schoenborn, Kai Zhang