Patents by Inventor Yong Cai
Yong Cai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10586614Abstract: A computer-assisted method to timely provide notifications of treatments, the method including receiving de-identified longitudinal medical records, each de-identified longitudinal medical record representing a record of a different anonymized patient and encoding information identifying a treatment received by the anonymized patient and receiving notification data including notification records, each notification record encoding information identifying a channel through which the notification was provided. The method includes determining a first channel impact model representing an impact of a notification provided through a first channel on a treatment being received, a second channel impact model representing an impact of a notification provided through a second channel on a treatment being received, and determining a multi-channel impact model representing an impact of notifications being provided through both the first channel and the second channel on a treatment being received.Type: GrantFiled: April 22, 2016Date of Patent: March 10, 2020Assignee: IQVIA Inc.Inventors: Yong Cai, Bob Doyle, Dong Dai, Wenzhe Lu, Emily Zhao, Steven Rosztoczy
-
Publication number: 20200038804Abstract: Provided are a gas phase oxidation/decomposition and absorption integrated device and application thereof in a gas-liquid system. The device comprises a housing (100), a motor (102), and a boost regulator (103); the housing (100) is internally provided with a rotating chamber (120) and a discharge chamber (122); the rotating chamber (120) comprises a rotating shaft (119), a turntable (124), a liquid distributor (123), packing layers (110), a guiding round table (111), a liquid inlet (108), a liquid outlet (112), and a first gas outlet (109); the discharge chamber (122) is located under the rotating chamber (120) and comprises a discharge chamber housing (121) and a plasma generator.Type: ApplicationFiled: April 16, 2018Publication date: February 6, 2020Applicant: BEIJING UNIVERSITY OF CHEMICAL TECHNOLOGYInventors: Guangwen CHU, Yong CAI, Jianfeng CHEN, Yong LUO, Haikui ZOU, Baochang SUN
-
Patent number: 10357854Abstract: A combined cam shaft assembling method comprises the following steps: A, grinding the outer diameter of a steel pipe (2) to specified precision, and machining an inner hole of a cam sheet (1) and a signal disc to specified precision; B, pre-installing the cam sheet (1) and the signal disc onto the steel pipe (2) according to a specified sequence, distance and angle; C, utilizing a tension part (3) to penetrate through the steel pipe (2), ensuring the steel pipe (2) to be expanded, so as to fix the cam sheet (1) and the signal disc onto the steel pipe (2) and reach a specified torque. The method is carried out through a combined cam shaft assembling device. By adopting the tension part (3) to expand the steel pipe (2), the steel pipe (2) and the cam sheet (1) can be rapidly combined, the cam sheet (1) and the signal disc can be clamped onto the steel pipe (2) in a more reliable manner, and the strength of the entire cam shaft is relatively high.Type: GrantFiled: August 18, 2015Date of Patent: July 23, 2019Assignees: Mianyang Brilliance Ruian Automotive Components Co., Ltd.Inventors: Zuan Qin, Xianqing Xie, Wanqiang Shu, Yong Cai
-
Publication number: 20180214996Abstract: A combined cam shaft assembling method comprises the following steps: A, grinding the outer diameter of a steel pipe (2) to specified precision, and machining an inner hole of a cam sheet (1) and a signal disc to specified precision; B, pre-installing the cam sheet (1) and the signal disc onto the steel pipe (2) according to a specified sequence, distance and angle; C, utilizing a tension part (3) to penetrate through the steel pipe (2), ensuring the steel pipe (2) to be expanded, so as to fix the cam sheet (1) and the signal disc onto the steel pipe (2) and reach a specified torque. The method is carried out through a combined cam shaft assembling device. By adopting the tension part (3) to expand the steel pipe (2), the steel pipe (2) and the cam sheet (1) can be rapidly combined, the cam sheet (1) and the signal disc can be clamped onto the steel pipe (2) in a more reliable manner, and the strength of the entire cam shaft is relatively high.Type: ApplicationFiled: August 18, 2015Publication date: August 2, 2018Inventors: Zuan QIN, Xianqing XIE, Wanqiang SHU, Yong CAI
-
Publication number: 20180179108Abstract: A dispersion of (meth)acrylate copolymer containing a hydroxyalkyl (meth)acrylate comonomer unit, which is obtained from polymerization of monomers comprising or consisting of, based on the total monomer weight, (a) from 25 to 45% by weight of at least one monovinyl aromatic monomer and/or methyl methacrylate; (b) from 50 to 70% by weight of at least one C4-8 alkyl (meth)acrylate; (c) from 2 to 7% by weight of at least one hydroxyalkyl (meth)acrylate; (d) from 0 to 1% by weight of at least one ?,?-monoethylenically unsaturated C3-6 monocarboxylic or dicarboxylic acid; and (e) from 0 to 0.65% by weight of (meth)acrylamide, N-hydroxyalkyl (meth)acrylamide, 2-acrylamido-2-methylpropane sulfonic acid or a combination thereof. A powder of (meth)acrylate copolymer containing a hydroxyalkyl (meth)acrylate comonomer unit obtained by drying the dispersion. A flexible cementitious waterproofing material including the dispersion or the powder.Type: ApplicationFiled: June 30, 2015Publication date: June 28, 2018Applicant: BASF SEInventors: Ming Hua YU, Sheng Xian WANG, Hai Hong FANG, Mei Jia ZHENG, Yong CAI
-
Patent number: 9780276Abstract: The present invention discloses a wafer-level semiconductor device and a manufacturing method thereof. The wafer-level semiconductor device comprises a wafer-level substrate; a plurality of serial groups formed on a surface of the substrate and are disposed in parallel, each serial group comprising a plurality of parallel groups disposed in series, each parallel groups comprising a plurality of unit cells disposed in parallel, wherein each unit cell is an independent functional unit which is formed by processing a semiconductor layer directly grown on a surface of the substrate; and a lead, which is at least electrically connected between two selected parallel groups in each serial group to make ON-voltages of all the serial groups substantially consistent. The device of the present invention, with a simple structure, a simple and convenient manufacturing process, and a high efficiency to produce qualified products, can be put into large-scale production and application.Type: GrantFiled: January 16, 2015Date of Patent: October 3, 2017Assignee: Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of SciencesInventors: Yong Cai, Yibin Zhang, Fei Xu
-
Publication number: 20160336500Abstract: The present invention discloses a wafer-level semiconductor device and a manufacturing method thereof. The wafer-level semiconductor device comprises a wafer-level substrate; a plurality of serial groups formed on a surface of the substrate and are disposed in parallel, each serial group comprising a plurality of parallel groups disposed in series, each parallel groups comprising a plurality of unit cells disposed in parallel, wherein each unit cell is an independent functional unit which is formed by processing a semiconductor layer directly grown on a surface of the substrate; and a lead, which is at least electrically connected between two selected parallel groups in each serial group to make ON-voltages of all the serial groups substantially consistent. The device of the present invention, with a simple structure, a simple and convenient manufacturing process, and a high efficiency to produce qualified products, can be put into large-scale production and application.Type: ApplicationFiled: January 16, 2015Publication date: November 17, 2016Inventors: Yong Cai, Yibin Zhang, Fei Xu
-
Publication number: 20160233379Abstract: The present invention provides a terahertz source chip, a source device, a source assembly and manufacturing methods thereof. The source chip comprises: a two-dimensional electron gas mesa; an electrode formed on the two-dimensional electron gas mesa for exciting a plasma wave; a terahertz resonant cavity formed below the two-dimensional electron gas mesa, the terahertz resonant cavity having a total reflector on a bottom surface thereof; and a grating formed on the two-dimensional electron gas mesa for coupling a plasma wave pattern with a cavity mode of the terahertz resonant cavity to generate terahertz radiation. In the present invention, a plasmon polariton is formed by strongly coupling the cavity mode of the terahertz resonant cavity with the plasma wave mode in the two-dimensional electron gas below the grating, and the terahertz wave emission is realized by electrical excitation of the plasmon polariton.Type: ApplicationFiled: September 18, 2014Publication date: August 11, 2016Inventors: Hua Qin, Jiandong Sun, Yongdan Huang, Zhongxin Zheng, Dongmin Wu, Yong Cai, Baoshun Zhang
-
Patent number: 9257039Abstract: A method for detecting a time synchronization ability of the real-time measuring device based on a time variable is provided. On a premise that the real-time measuring device correctly receives time service signals, the method aims at detecting time synchronization signal application ability of the real-time measuring device, and involves a purely resistive loop comprising a value transferring device and a time controllable switch. The method, via a time synchronization performance thereof, relatively completely reflects the time synchronization signal application ability of the device within a value transfer requirement. The method is a development upon power station time synchronization time service signals and transmission accuracy detection and an improvement of power station time synchronization detection procedures. The method facilitates improving real-time analysis and monitoring abilities of a power station and a power grid to a primary device and a primary system.Type: GrantFiled: November 23, 2012Date of Patent: February 9, 2016Assignees: STATE GRID CORPORATION OF CHINA, STATE GRID HUBEI ELECTRIC POWER RESEARCH INSTITUTEInventors: Hong Chen, Yongjun Xia, Yuehai Yu, Gang Hu, Yong Cai, Jin Wang, Qian Tao
-
Patent number: 9070756Abstract: A group III nitride high electron mobility transistor (HEMT) device comprises a source electrode (112), a drain electrode (111), a main gate (116), a top gate (118), an insulating dielectric layer (117) and a heterostructure, wherein the source electrode (112) and the drain electrode (111) are electrically connected via two-dimensional electron gas (2DEG) formed in the heterostructure; the heterostructure comprises a first semiconductor (113) and a second semiconductor (114); the first semiconductor (113) is disposed between the source electrode (112) and drain electrode (111); the second semiconductor (114) is formed on the surface of the first semiconductor (113) and is provided with a band gap wider than the first semiconductor (113); the main gate (116) is disposed at the side of the surface of the second semiconductor (114) adjacent to the source electrode (112), and is in Schottky contact with the second semiconductor (114); the dielectric layer (117) is disposed on the surfaces of the second semiconducType: GrantFiled: November 16, 2012Date of Patent: June 30, 2015Assignee: Suzhou Institute of Nano-Tech and Nano-Bionics of Chinese Academy of SciencesInventors: Yong Cai, Guohao Yu, Zhihua Dong, Baoshun Zhang
-
Publication number: 20150058028Abstract: The disclosure generally describes computer-implemented methods, software, and systems for identifying the role of Integrated Delivery Networks (IDNs) in determining prescriber behavior, using an analytical and reporting infrastructure. The disclosure also describes determining a model role for the prescribing behavior of the prescribers affiliated with an IDN to establish a performance level of a drug.Type: ApplicationFiled: August 23, 2013Publication date: February 26, 2015Applicant: IMS HEALTH INCORPORATEDInventors: Lingyun Su, Yong Cai, Yuan Ren, Jeff Tomlinson, Daniel Barton, Angeliki Cooney
-
Publication number: 20140319584Abstract: A group III nitride high electron mobility transistor (HEMT) device comprises a source electrode (112), a drain electrode (111), a main gate (116), a top gate (118), an insulating dielectric layer (117) and a heterostructure, wherein the source electrode (112) and the drain electrode (111) are electrically connected via two-dimensional electron gas (2DEG) formed in the heterostructure; the heterostructure comprises a first semiconductor (113) and a second semiconductor (114); the first semiconductor (113) is disposed between the source electrode (112) and drain electrode (111); the second semiconductor (114) is formed on the surface of the first semiconductor (113) and is provided with a band gap wider than the first semiconductor (113); the main gate (116) is disposed at the side of the surface of the second semiconductor (114) adjacent to the source electrode (112), and is in Schottky contact with the second semiconductor (114); the dielectric layer (117) is disposed on the surfaces of the second semiconducType: ApplicationFiled: November 16, 2012Publication date: October 30, 2014Inventors: Yong Cai, Guohao Yu, Zhihua Dong, Baoshun Zhang
-
Publication number: 20140240145Abstract: A method for detecting a time synchronization ability of the real-time measuring device based on a time variable is provided. On a premise that the real-time measuring device correctly receives time service signals, the method aims at detecting time synchronization signal application ability of the real-time measuring device, and involves a purely resistive loop comprising a value transferring device and a time controllable switch. The method, via a time synchronization performance thereof, relatively completely reflects the time synchronization signal application ability of the device within a value transfer requirement. The method is a development upon power station time synchronization time service signals and transmission accuracy detection and an improvement of power station time synchronization detection procedures. The method facilitates improving real-time analysis and monitoring abilities of a power station and a power grid to a primary device and a primary system.Type: ApplicationFiled: November 23, 2012Publication date: August 28, 2014Applicants: STATE GRID HUBEI ELECTRIC POWER RESEARCH INSTITUTE, STATE GRID CORPORATION OF CHINAInventors: Hong Chen, Yongjun Xia, Yuehai Yu, Gang Hu, Yong Cai, Jin Wang, Qian Tao
-
Patent number: 8415186Abstract: The present invention provides a method of super flat chemical mechanical polishing (SF-CMP) technology, which is a method characterized in replacing laser lift-off in a semiconductor fabricating process. SF-CMP has a main step of planting a plurality of polishing stop points before polishing the surface, which is characterized by hardness of the polishing stop points material being larger than hardness of the surface material. Therefore, the present method can achieve super flat polishing surface without removing polishing stop points.Type: GrantFiled: August 10, 2007Date of Patent: April 9, 2013Assignee: Hong Kong Applied Science and Technology Research Institute Co. Ltd.Inventors: Yong Cai, Hung-Shen Chu
-
Patent number: 8187900Abstract: The present invention provides a method of fabricating vertical LED structures in which the substrate used for epitaxial layer growth is removed through polishing. The polishing technique used in an exemplary embodiment is chemical mechanical polishing using polish stops to provide a sufficiently level plane. Polish stops are provided in the multilayer structure before polishing the surface, the hardness of the polish stop material being greater than the hardness of the material that needs to be removed. Consequently, vertical LEDs can be produced at a lower cost and higher yield compared to either laser lift-off or conventional polishing. Exemplary vertical LEDs are GaN LEDs. The polish stops may be removed by saw dicing, laser dicing or plasma etching.Type: GrantFiled: October 26, 2010Date of Patent: May 29, 2012Assignee: Hong Kong Applied Science and Technology Research Institute Company LimitedInventors: Li Min Lin, Ka Wah Chan, Sheng Mei Zheng, Yong Cai
-
Patent number: 7985971Abstract: A method of making a thin gallium-nitride (GaN)-based semiconductor structure is provided. According to one embodiment of the invention, the method includes the steps of providing a substrate; sequentially forming one or more semiconductor layers on the substrate; etching a pattern in the one or more semiconductor layers; depositing a dielectrics layer; forming a photoresist on a portion of the dielectrics layer, wherein the portion of the dielectrics layer is deposited on the one or more semiconductor layers; depositing a primer; removing the photoresist layer, wherein the primer on the photoresist is also removed; depositing a superhard material, wherein the superhard material forms in the pattern; and removing the substrate. Accordingly, the superhard material may be selectively deposited in only areas where the superhard material is desired. Vertical GaN-based light emitting devices may then be formed by cutting the semiconductor structure.Type: GrantFiled: March 31, 2009Date of Patent: July 26, 2011Assignee: Hong Kong Applied Science and Technology Research Institute Co. Ltd.Inventors: Yong Cai, Hung Shen Chu, Shengmei Zheng, Ka Wah Chan
-
Patent number: 7972915Abstract: A method for and devices utilizing monolithic integration of enhancement-mode and depletion-mode AlGaN/GaN heterojunction field-effect transistors (HFETs) is disclosed. Source and drain ohmic contacts of HFETs are first defined. Gate electrodes of the depletion-mode HFETs are then defined. Gate electrodes of the enhancement-mode HFETs are then defined using fluoride-based plasma treatment and high temperature post-gate annealing of the sample. Device isolation is achieved by either mesa etching or fluoride-based plasma treatment. This method provides a complete planar process for GaN-based integrated circuits favored in high-density and high-speed applications.Type: GrantFiled: November 29, 2006Date of Patent: July 5, 2011Assignee: The Hong Kong University of Science and TechnologyInventors: Jing Chen, Yong Cai, Kei May Lau
-
Patent number: 7932539Abstract: A method of fabricating AlGaN/GaN enhancement-mode heterostructure field-effect transistors (HFET) using fluorine-based plasma immersion or ion implantation. The method includes: 1) generating gate patterns; 2) exposing the AlGaN/GaN heterostructure in the gate region to fluorine-based plasma treatment with photoresist as the treatment mask in a self-aligned manner; 3) depositing the gate metal to the plasma treated AlGaN/GaN heterostructure surface; 4) lifting off the metal except the gate electrode; and 5) high temperature post-gate annealing of the sample. This method can be used to shift the threshold voltage of a HFET toward a more positive value, and ultimately convert a depletion-mode HFET to an enhancement-mode HFET (E-HFET).Type: GrantFiled: November 29, 2006Date of Patent: April 26, 2011Assignee: The Hong Kong University of Science and TechnologyInventors: Jing Chen, Yong Cai, Kei May Lau
-
Publication number: 20110037051Abstract: The present invention provides a method of fabricating vertical LED structures in which the substrate used for epitaxial layer growth is removed through polishing. The polishing technique used in an exemplary embodiment is chemical mechanical polishing using polish stops to provide a sufficiently level plane. Polish stops are provided in the multilayer structure before polishing the surface, the hardness of the polish stop material being greater than the hardness of the material that needs to be removed. Consequently, vertical LEDs can be produced at a lower cost and higher yield compared to either laser lift-off or conventional polishing. Exemplary vertical LEDs are GaN LEDs. The polish stops may be removed by saw dicing, laser dicing or plasma etching.Type: ApplicationFiled: October 26, 2010Publication date: February 17, 2011Applicant: Hong Kong Applied Science and Technology Research Institute Company LimitedInventors: Li Min Lin, Ka Wah Chan, Sheng Mei Zheng, Yong Cai
-
Patent number: D746041Type: GrantFiled: February 6, 2014Date of Patent: December 29, 2015Assignee: Zhejiang Zhengte Group Co., Ltd.Inventors: Cong Lin, Caihua Shan, Xiaobo Wang, Yong Cai