Abstract: An N-type Lateral Diffused Metal-Oxide-Semiconductor (NLDMOS) transistor is provided. The NLDMOS transistor comprises a P-type substrate; and a semiconductor layer having a deep N-type well region formed on the P-type substrate. Further, the NLDMOS transistor also includes at least a P-type body region and an N-type drift region formed in the deep N-type well region; and an N-type heavily doped drain region formed in the N-type drift region. Further, the NLDMOS transistor includes a P-type doped reverse type region formed below the N-type drift region in the deep N-type well region, being physically connected with the first P-type body region, and preventing carriers from escaping between the N-type source region and external devices.

Abstract: A method for detecting paths and amount of loss of desulfurization organic components in a flue gas desulfurization system includes preparing a to-be-measured solution and a base standard solution, and diluting the base standard solution with water to a plurality of standard solutions containing different concentrations of desulfurization organic components; adjusting the to-be-measured solution and standard solutions to have a strong acidity, respectively, such that each of desulfurization organic components in the to-be-measured solution and standard solutions exists in ion forms; heating and oscillating the to-be-measured solution and standard solutions, respectively; respectively detecting carbon elements in the standard solutions, to form a linear relationship between concentrations of the desulfurization organic components in the standard solutions and detected carbon element data; and detecting carbon elements in the to-be-measured solution, and obtaining a total concentration of the desulfurization or

Abstract: A transistor device may include a substrate that has a recess and a substrate surface, wherein the recess is recessed with respect to the substrate surface. The transistor device may further include a source and a drain that overlap the substrate. The transistor device may further include a gate structure that has a first gate structure portion and a second gate structure portion, wherein the first gate structure portion is positioned inside the recess, and wherein the second gate structure portion is connected to the first gate structure and is positioned outside the first recess.

Abstract: A LDMOS transistor includes a semiconductor substrate with a first doping type; a plurality of first trenches formed in the semiconductor substrate; a wave-shaped drift region with an increased conductive path and a second doping type formed on the semiconductor substrate between adjacent first trenches and the semiconductor substrate exposed by side and bottom surfaces of the first trenches; a first shallow trench isolation (STI) structure formed in each of the first trenches; a body region with the first doping type formed in semiconductor substrate at one side of the drift region; a gate structure formed over portions of the body region, the drift region and the first STI structure most close to the body region; a source region formed in the body region; and a drain region formed in the drift region at one side of the first STI structure most far away from the body region.

Abstract: A method for manufacturing a semiconductor device may include the following steps: preparing a semiconductor substrate that includes a first substrate region, a second substrate region, and a third substrate region; providing a first mask that overlaps the semiconductor substrate; etching, using the first mask, the first semiconductor substrate to form a trench in each of the substrate regions; providing a second mask that overlaps the semiconductor substrate and includes three openings corresponding to the substrate regions; performing first ion implantation through the three openings to form a P-doped region in each of the substrate regions; performing second ion implantation through the three openings to form an N-doped region in each of the substrate regions; and performing third ion implantation through the three openings to form another N-doped region in each of the substrate regions; and forming an isolation member in each of the trenches.

Abstract: A transistor device may include a substrate that has a recess and a substrate surface, wherein the recess is recessed with respect to the substrate surface. The transistor device may further include a source and a drain that overlap the substrate. The transistor device may further include a gate structure that has a first gate structure portion and a second gate structure portion, wherein the first gate structure portion is positioned inside the recess, and wherein the second gate structure portion is connected to the first gate structure and is positioned outside the first recess.

Abstract: A method performed by a computer processing system includes receiving a design pattern for an integrated circuit, applying a function to the design pattern to generate a model contour, generating a plurality of Optical Proximity Correction (OPC) target points along the model contour, adjusting the design pattern to create an adjusted pattern, and performing a simulation on the adjusted pattern to create a simulated contour.

Abstract: A method for manufacturing a semiconductor device may include the following steps: preparing a semiconductor substrate that includes a first substrate region, a second substrate region, and a third substrate region; providing a first mask that overlaps the semiconductor substrate; etching, using the first mask, the first semiconductor substrate to form a trench in each of the substrate regions; providing a second mask that overlaps the semiconductor substrate and includes three openings corresponding to the substrate regions; performing first ion implantation through the three openings to form a P-doped region in each of the substrate regions; performing second ion implantation through the three openings to form an N-doped region in each of the substrate regions; and performing third ion implantation through the three openings to form another N-doped region in each of the substrate regions; and forming an isolation member in each of the trenches.

Abstract: A crystalline silicon ingot and a method of manufacturing the same are provided. Using a crystalline silicon seed layer, the crystalline silicon ingot is formed by a directional solidification process. The crystalline silicon seed layer is formed of multiple primary monocrystalline silicon seeds and multiple secondary monocrystalline silicon seeds. Each of the primary monocrystalline silicon seeds has a first crystal orientation different from (100). Each of the secondary monocrystalline silicon seeds has a second crystal orientation different from the first crystal orientation. Each of the primary monocrystalline silicon seeds is adjacent to at least one of the secondary monocrystalline silicon seeds, and separate from the others of the primary monocrystalline silicon seeds.

Abstract: Starch spherulites are produced by debranching of amylopectin-containing starch into short linear ?-1,4-linked glucans (e.g., short-chain amylose, SCA). The debranched linear glucans are directly converted into spherulites by heating the debranched starch mixture followed by cooling and crystallization to form well-developed spherulites. The spherulites exhibit controlled enzyme digestibility.

Abstract: A semiconductor device may include a first-type substrate. The semiconductor device may further include a second-type well configured to form a PN junction with the first-type substrate. The semiconductor device may further include a diode component configured to form a diode with the second-type well. The diode may be connected to the PN junction in a reverse series connection. The second-type may be N-type if the first-type is P-type, and wherein the second-type may be P-type if the first-type is N-type.

Abstract: A process for separating Co from Ni in an aqueous solution comprises subjecting the solution to extraction and using kinetic differences between Ni and Co in the extraction for achieving at least a partial separation of Co from Ni. This is effected by controlling the duration of the extraction so that a major portion of Co and a minor portion of Ni is extracted from the solution to produce a loaded extractant, enriched in Co and depleted in Ni compared to the feed solution, and a Co-depleted raffinate containing Ni. In a further embodiment, the invention utilizes kinetic differences between Ni and Co during striping for effecting separation of Ni and Co. The loaded extractant can be subjected to a bulk stripping or a selective stripping operation to obtain Co and Ni solutions from which Ni and Co can be recovered. The process may be incorporated in a hydrometallurgical process for the extraction of Ni and/or Co from an ore or concentrate containing Ni and Co.

Abstract: A method performed by a computer processing system includes receiving a design pattern for an integrated circuit, applying a function to the design pattern to generate a model contour, generating a plurality of Optical Proximity Correction (OPC) target points along the model contour, adjusting the design pattern to create an adjusted pattern, and performing a simulation on the adjusted pattern to create a simulated contour.

Abstract: A process for separating Co from Ni in an aqueous solution comprises subjecting the solution to extraction and using kinetic differences between Ni and Co in the extraction for achieving at least a partial separation of Co from Ni. This is effected by controlling the duration of the extraction so that a major portion of Co and a minor portion of Ni is extracted from the solution to produce a loaded extractant, enriched in Co and depleted in Ni compared to the feed solution, and a Co-depleted raffinate containing Ni. In a further embodiment, the invention utilizes kinetic differences between Ni and Co during striping for effecting separation of Ni and Co. The loaded extractant can be subjected to a bulk stripping or a selective stripping operation to obtain Co and Ni solutions from which Ni and Co can be recovered. The process may be incorporated in a hydrometallurgical process for the extraction of Ni and/or Co from an ore or concentrate containing Ni and Co.

Abstract: A method for detecting symmetry of optical fibers and a device thereof are provided. The method includes: receiving, by a boundary clock, a first timestamp message carrying a first timestamp via a slave port, and a second timestamp message carrying a second timestamp via a passive port; and determining, by the boundary clock, symmetry of optical fibers according to at least the first timestamp and the second timestamp. The method and device for detecting symmetry of optical fibers provided by the present disclosure reduce the cost of detecting symmetry of optical fibers in the conventional technology, and improve the efficiency of detecting symmetry of optical fibers in the conventional technology.

Abstract: A method for detecting paths and amount of loss of desulfurization organic components in a flue gas desulfurization system includes preparing a to-be-measured solution and a base standard solution, and diluting the base standard solution with water to a plurality of standard solutions containing different concentrations of desulfurization organic components; adjusting the to-be-measured solution and standard solutions to have a strong acidity, respectively, such that each of desulfurization organic components in the to-be-measured solution and standard solutions exists in ion forms; heating and oscillating the to-be-measured solution and standard solutions, respectively; respectively detecting carbon elements in the standard solutions, to form a linear relationship between concentrations of the desulfurization organic components in the standard solutions and detected carbon element data; and detecting carbon elements in the to-be-measured solution, and obtaining a total concentration of the desulfurization or

Abstract: A method and an apparatus for tracking a clock source are disclosed. The method includes determining a best clock source to be tracked by a device according to a best clock source tracked by a slave candidate port in the device and distributing the best clock source tracked by the device through a master candidate port in a master state. Through the embodiments of the present disclosure, the clock source selection of the device converges quickly. Moreover, because the slave candidate port is determined according to the network planning, the planning of the transport network is observed.

Abstract: Embodiments of the present invention provide a communications method, a communications system, an access network device, a terminal, and a core network device. For all UEs accessing the access network device, before relay node selection is performed, it is determined which UEs are capable of serving as candidate relay nodes, so as to perform a relay node selection operation only on the UEs that are capable of serving as candidate relay nodes when performing the relay node selection, thereby saving operation overhead, reducing time and resources overhead during the relay node selection, and improving transmission efficiency.

Abstract: Disclosed is dried fruit or vegetable pulp preparation comprising dried fruit or vegetable pulp and at least one density modifying ingredient. The density modifying ingredient may be selected from the group consisting of complex carbohydrates or humectants.

Abstract: An apparatus and a system for transmitting channel state information acquires channel state information of a channel between a mobile terminal and two or more cooperative base stations. The apparatus quantizes the channel state information separately by using a preset single-cell codebook used for quantizing the channel between the mobile terminal and each one of the two or more cooperative base stations. The apparatus acquires united codeword indexes of the quantized channel state information in the single-cell codebook; and transmits the united codeword indexes of the quantized channel state information in the single-cell codebook.