Abstract: A pixel circuit and an organic light-emitting diode (OLED) display using the pixel circuit is provided. The pixel circuit includes: an OLED; a third N-channel metal-oxide semiconductor (NMOS) transistor coupled to a data line and a first scan line and configured to apply a data signal to a first node; a storage capacitor having one terminal coupled to the first node and the other terminal coupled to a second node; a fourth NMOS transistor coupled between a first power and the second node and configured to apply a voltage of the first power to the second node; a first NMOS transistor having a first electrode, a second electrode, and a gate electrode coupled to the second node; and a second NMOS transistor coupled between the second node and the first electrode of the first NMOS transistor and configured to diode-connect the first NMOS transistor.

Abstract: A driving circuit includes: an input terminal; an output terminal; a first transistor having a source electrode coupled to the input terminal, a drain electrode coupled to the output terminal, and a gate electrode; a second transistor having a source electrode, a drain electrode, and a gate electrode respectively coupled to the source electrode, the drain electrode, and the gate electrode of the first transistor; a first capacitor having a first electrode coupled to the input terminal and a second electrode coupled to the output terminal; and a second capacitor coupled in parallel with the first capacitor and having a first electrode coupled to the first electrode of the first capacitor and a second electrode that is floated.

Abstract: A display device according to the present invention includes: a display unit including a plurality of pixels coupled to a plurality of scan lines; a plurality of scan driving blocks coupled to the plurality of scan lines and adapted to apply a plurality of scan signals; an electrostatic discharge (ESD) unit adapted to protect the plurality of scan driving blocks from static charges; an AC power source unit for supplying a first power source voltage of which a level is changed between a logic high level and a logic low level, to the plurality of scan driving blocks through a first power source voltage wire during a pixel test of the plurality of pixels; and a DC power source unit for supplying a second power source voltage of the logic high level to the ESD unit through a second power source voltage wire.

Abstract: An organic light emitting display device capable of displaying an image of uniform brightness. A scan driver drives scan lines and light emitting control lines that are formed parallel to each other. A data driver drives data lines formed at a direction intersecting the scan lines and the light emitting control lines, and pixels are disposed to be coupled with the scan lines, the light emitting control lines, and the data lines. An auxiliary line is formed parallel to the data lines. One side of the auxiliary line is coupled with a reference power supply and another side of the auxiliary line is coupled with a current source. Connectors are disposed at crossing areas of the auxiliary line and the scan lines. A voltage transfer unit is coupled with the connectors and transfers a voltage supplied to the connectors to the data driver.

Abstract: The present invention relates to a laminated body for forming a printed circuit board comprising: a separation member in which first conductive layers and second conductive layers separable from each other are sequentially provided on each of upper and lower surfaces of a separating-insulation member; a laminating-insulation member sequentially laminated on each of the upper and lower surfaces of the separation member; and a conductive layer sequentially laminated on each of upper and lower surfaces of the insulation member, a printed circuit board comprising the laminated body, and a method of manufacturing the same. The present invention provides the new multi-layer printed circuit board to which various designs, such as a double-sided structure or an unbalanced structure, are applicable while overcoming an application limitation of a single-sided printed circuit board structure in the related art, thereby improving productivity and economic feasibility.

Abstract: A stage circuit is capable of concurrently or progressively supplying scan signals. The stage circuit includes a progressive driver including a first transistor and a second transistor, and a concurrent driver including an 11th transistor and a 12th transistor. When the first transistor, the second transistor, the 11th transistor, and the 12th transistor are turned off, lower voltages than voltages applied to source electrodes are applied to gate electrodes such that the transistors can be stably turned off.

Abstract: A scan driver includes scan driving blocks, each including: a first transistor including a gate coupled to a first node and receiving a first clock signal, a first electrode receiving an output control signal, and a second electrode coupled to a scan line at first output; a second transistor including a gate coupled to a second node receiving an input signal according to a second clock signal, and first and second electrodes respectively coupled to a third clock input and the first output; a third transistor including a gate coupled to the first node, a first electrode receiving the output control signal, and a second electrode coupled to an input terminal of a next scan driving block at a second output; and a fourth transistor including a gate coupled to the second node, and first and second electrodes respectively coupled to the third clock input and the second output.

Abstract: A system and methodology that can minimize disturbance during an AC operation associated with a memory, such as, program, read and/or erase, is provided. The system pre-charges all or a desired subset of the bit lines in a memory array to a specified voltage, during an AC operation to facilitate reducing AC disturbances between neighboring cells. A pre-charge voltage can be applied to all bit lines in a block in the memory array, or to bit lines associated with a selected memory cell and neighbor memory cells adjacent to the selected memory cell in the block. The system ensures that source and drain voltage levels can be set to desired levels at the same or substantially the same time, while selecting a memory cell. This can facilitate minimizing AC disturbances in the selected memory cell during the AC operation.

Abstract: A mobile terminal having an image projector and controlling method therein are disclosed, by which a detachable image projector can be provided to the mobile terminal and by which a projection mode of a detachable image projector can be conveniently changed. The present invention includes a housing, a touchscreen provided to one surface of the housing to recognize a touch input of a user, a detachable projector module having an activation switch provided to one lateral side, the detachable projector module configured to project a prescribed image on an external surface, and a controller controlling an activation message for receiving an confirmation of a presence or non-presence of activation of the projector module from the user to be displayed on the touchscreen if the activation switch is manipulated. In this case, the detachable projector module is attached to a prescribed surface of the housing except the one surface of the housing to which the touchscreen is provided.

Abstract: A pixel circuit and an organic light emitting diode (OLED) display device using the same are provided. The pixel circuit compensates for a threshold voltage of a driver transistor and for a voltage drop, and separately drives an initialization time to improve a contrast ratio. The pixel circuit further suppresses a leakage current caused by a data voltage using a fixed power source so that current variation caused by the leakage current can be reduced or minimized to improve crosstalk, and the duty of an emission control signal can be adjusted to remove motion blur. The pixel circuit also compensates for a leakage current generated in a turn-off state of a transistor with an increase in a drain-source voltage.

Abstract: A communications protocol interface is configured as being divisible into a core portion and an extensible portion. The extensible portion of the communications protocol interface is further configured to be customized in scope so that each network element can communicate a unique and optionally small, subset of actual interoperable data that corresponds to at least a portion of a larger defined data set. A software generator program is configured to generate a set of extensible source code that operates upon the subset of actual data and that directs the execution of the extensible portion of the communications protocol interface for a particular network element.

Abstract: An organic light emitting display device and a method of driving the same. In a method of driving an organic light emitting display device including a second capacitor having a first terminal coupled to a gate electrode of a driving transistor and a first capacitor coupled between the gate electrode of the driving transistor and a first power source, the driving method includes supplying a threshold voltage of an organic light emitting diode to a second terminal of the second capacitor during a period when a first current is sunk via the driving transistor, and supplying a data signal to the second terminal of the second capacitor after a voltage corresponding to a difference between a voltage applied to the gate electrode of the driving transistor and the threshold voltage of the organic light emitting diode is charged in the second capacitor.

Abstract: A receiver includes a frequency converter configured to generate a I signal and a Q signal from each band of a multiband signal and a mismatch compensator configured to estimate a mismatch of the I signal and the Q signal for each of the bands of the multiband signal and store at least one compensation value to compensate for the estimated mismatch. The frequency converter compensates for the mismatch of the I signal and the Q signal based on the at least one compensation value.

Abstract: A scan driver including sequentially arranged scan driving blocks, each of the blocks including a first node receiving a signal input into a driving signal input terminal based on a clock signal input into a second-clock-signal input terminal, a second node receiving a clock signal input into a first-clock-signal input terminal, a first transistor including a gate electrode connected to the second node, one electrode receiving an output control signal, and another electrode connected to an output terminal, a second transistor including a gate electrode connected to the first node, one electrode connected to a third-clock-signal input terminal, and another electrode connected to the output terminal, and a third transistor including a gate electrode connected to the third-clock-signal input terminal and one electrode connected to the first node and configured to transfer a voltage of the output terminal to the first node.

Abstract: A scan driving apparatus includes a plurality of sequentially arranged scan driving blocks, each including: a first node configured to receive a first clock signal; a second node configured to receive an input signal according to a second clock signal input; a first transistor having a gate electrode coupled to the first node, a first electrode configured to receive a power source voltage, and a second electrode coupled to an output terminal; and a second transistor having a gate electrode coupled to the second node, a first electrode for receiving a third clock signal, and a second electrode coupled to the output terminal. Each scan driving block is configured to receive the first, second, and third clock signals as a corresponding three clock signals among four clock signals sequentially shifted by a first period, and to output the third clock signal by being synchronized with the input signal.

Abstract: A scan driving device includes scan driving blocks, each including: a first node receiving a signal that is input to a first driving signal input terminal according to a clock signal input to a first clock signal input terminal; a second node receiving a second power source voltage according to the clock signal input to the first clock signal input terminal and a signal input to a second driving signal input terminal; a first transistor including a gate electrode connected to the second node and an electrode receiving an output control signal; a second transistor including a gate electrode connected to the first node and an electrode connected to a second clock signal input terminal; and a third transistor including a gate electrode connected to the second node, an electrode connected to a first power source voltage, and another electrode connected to the first node.

Abstract: A wireless device in a first piconet using a first time-frequency code senses interference from a second piconet using a second time-frequency code that is different from the first time-frequency code. The wireless device detects a beacon period of the second piconet. The wireless device reserves at least one medium access slot corresponding to the beacon period of the second piconet among a plurality of medium access slots of the first piconet.

Abstract: Provided is a pharmaceutical composition for inhibiting apoptosis of neurons or neurodegeneration. The pharmaceutical composition effectively prevents or treats diseases related to apoptosis of neurons or neurodegeneration.

Abstract: An organic light emitting diode display, including pixel circuits coupled to respective data lines and scan lines, a data driver configured to supply data signals to the data lines, and a scan driver configured to provide scan signals to the scan lines, wherein the scan driver includes at least one decoder including a plurality of NOR gates, the decoder configured to provide a first plurality of signals, and a plurality of NAND gates coupled to respective scan lines, the NAND gates being configured to perform a NAND operation on the first plurality of signals and to provide scan signals to the scan lines, wherein all transistors in each of the NOR gates and each of the NAND gates are a same type of MOS transistor.

Abstract: A stage circuit is capable of concurrently or progressively supplying scan signals. The stage circuit includes a progressive driver including a first transistor and a second transistor, and a concurrent driver including an 11th transistor and a 12th transistor. When the first transistor, the second transistor, the 11th transistor, and the 12th transistor are turned off, lower voltages than voltages applied to source electrodes are applied to gate electrodes such that the transistors can be stably turned off.