Abstract: A write strategy method, medium, and apparatus. The method includes writing a signal to a storage medium by using a predetermined power and an initial write strategy, calculating variation characteristics of a data signal which separately correspond to variations of write strategy parameters, if the written signal does not satisfy initial quality standards, and calculating correlations among periods of the data signal and correlations among the write strategy parameters by using the variation characteristics of the data signal, and determining the write strategy parameters based on the correlations among the periods of the data signal and the correlations among the write strategy parameters.

Abstract: A pixel circuit of a display panel, a method of driving the pixel circuit, and an organic light emitting display device including the display panel are provided. All of a plurality of transistors used in the pixel circuit are NMOS transistors, and the pixel circuit is configured to compensate for a voltage change at a source electrode of a driving transistor during light emission.

Abstract: A data driving circuit for driving pixels of a light emitting display to display images with uniform brightness may include a current sink that is capable of receiving, via a data line, a predetermined current from a pixel to enable the data driving circuit to generate a compensation voltage for the pixel. The compensation voltage may compensate for variations among the pixels of the display. Variations among the pixels may result from different electron mobilities and/or threshold voltages of transistors included in the pixels. The value of the predetermined current may be equal to or higher than a value of a minimum current employable by the pixel to emit light of maximum brightness. The maximum brightness of the pixel may correspond to a brightness emitted by the pixel when a highest one of a plurality of set gray scale voltages is applied to the pixel.

Abstract: A pixel circuit includes: a second NMOS transistor coupled to a data line and a scan line, the second NMOS transistor for supplying data signals to a first node; a capacitor having a first terminal coupled to the first node and a second terminal coupled to a second node; an OLED having a first terminal coupled to the second node and a second terminal coupled to a second power source; a first NMOS transistor including a first electrode, a second electrode, and a gate electrode coupled to the first node, and for supplying a current corresponding to a voltage applied to the first node from a first power source to the second power source via the OLED; and a third NMOS transistor coupled to the first NMOS transistor in series and configured to be turned on when a light emission control signal is supplied from a light emission control line.

Abstract: A pixel circuit and an organic light-emitting diode (OLED) display using the pixel circuit is provided. The pixel circuit includes: an OLED; a third N-channel metal-oxide semiconductor (NMOS) transistor coupled to a data line and a first scan line and configured to apply a data signal to a first node; a storage capacitor having one terminal coupled to the first node and the other terminal coupled to a second node; a fourth NMOS transistor coupled between a first power and the second node and configured to apply a voltage of the first power to the second node; a first NMOS transistor having a first electrode, a second electrode, and a gate electrode coupled to the second node; and a second NMOS transistor coupled between the second node and the first electrode of the first NMOS transistor and configured to diode-connect the first NMOS transistor.

Abstract: A pixel circuit of a display panel, a method of driving the pixel circuit, and an organic light emitting display device including the display panel. All of a plurality of transistors included in the pixel circuit are NMOS transistors, and the pixel circuit configured to compensate for a voltage change at a source electrode of a driving transistor during light emission.

Abstract: A data driving circuit for driving pixels of a light emitting display to display images with uniform brightness may include a gamma voltage unit that generates a plurality of gray scale voltages, a digital-analog converter that selects, as a data signal, one of the plurality of gray scale voltages using first data, a decoder that generates second data using the first data, a current sink, a voltage controller that controls a voltage value of the data signal using the second data and a compensation voltage generated based on the predetermined current, and a switching unit that supplies the data signal to the pixel during any partial period of the complete period elapsing after the first partial period. The current sink receives a predetermined current from the pixel during a first partial period of a complete period for driving the pixel based on the selected gray scale voltage.

Abstract: A data driving circuit for driving pixels of a display to display images with uniform brightness may include a gamma voltage unit that generates gray scale voltages, a digital-analog converter that selects, as a data signal, one of the gray scale voltages using first data, a decoder that generates second data using the first data, a latch for storing the first data and the second data, a current sink that receives a predetermined current from the pixel during a first partial period of a complete period for driving the pixel based on the selected gray scale voltage, a voltage controller that controls a voltage value of the data signal using the second data and a compensation voltage generated based on the predetermined current, and a switching unit that supplies the data signal to the pixel during any partial period of the complete period elapsing after the first partial period.

Abstract: The present invention relates to a compound of the following formula 1, pharmaceutically acceptable salt and isomer thereof effective as agonist of melanocortin receptor, and an agonistic composition of melanocortin receptor comprising the same as active ingredient.

Abstract: An emission driver may include a first signal processor adapted to receive a clock signal, an input signal and an inverse input signal, and generate a first output signal, a second signal processor adapted to receive the first output signal, an inverse clock signal and negative feedback signals, and generate a second output signal, a third signal processor adapted to receive the second output signal and the input signal, and generate a third output signal that is an inverse of the second output signal based on the input signal, a fourth signal processor adapted to receive the second output signal, and generate a fourth output signal based on the second output signal, the fourth output signal being an inverse signal of the third output signal, and a fifth signal processor adapted to receive the fourth output signal and output a fifth output signal based on a stored predetermined voltage.

Abstract: The cosmetics container of the present invention is provided with a casing, pivoting trays and a housing tray that are pivoted into and out of the casing. The casing consists of a top plate and a bottom plate of frame shape, and a side plate arranged vertically between the top plate and bottom plate, and part of the side plate is open. Plural pivoting trays are arranged in a stack between the top plate and bottom plate, and they are drawn in or out through the opening of the casing. At least one of the pivoting trays is a housing tray, in which a housing space is formed for make-up tools. Therefore, the present invention may house cosmetics together with make-up tools, so the portability of cosmetics and make-up tools is improved.

Abstract: Provided is a scan driver that supplies a scan signal to an organic light emitting display device (OLED). The scan driver includes transistors of the same conductivity type. To generate individual scan signals, the scan driver includes samplers, each of which samples an input signal in synchronization with a clock signal or an inverted clock signal; and an OR gate and a NAND gate, each of which performs a logical operation on output signals of adjacent samplers and generates a scan signal. The samplers, the OR gate and the NOR gate include transistors of the same conductivity type.

Abstract: An organic light emitting display includes a scan driver for sequentially supplying a scan signal to scan lines; a data driver for supplying data signals to data lines when the scan signal is supplied; a timing controller for controlling the scan driver and the data driver and for supplying one of at least two clock signals to clock supply lines arranged parallel to the scan lines; and pixels positioned at crossing regions of the scan lines, the data lines and the clock supply lines. Each of the pixels includes an organic light emitting diode; a pixel circuit for controlling an amount of current supplied along a current path from a first power source to a second power source via the organic light emitting diode; and a control transistor on the current path and controlled by a corresponding clock signal of the at least two clock signals.

Abstract: A pixel includes: an organic light emitting diode coupled between a first power supply and a second power supply; a first transistor coupled between the organic light emitting diode and the second power supply; a second transistor coupled to a first node to which a gate electrode of the first transistor is coupled; a first capacitor coupled between the first node and a second node; a third transistor coupled between the second node and a data line; a fourth transistor coupled between the first node and the second node; a fifth transistor coupled between the first transistor and the second power supply; and a second capacitor coupled between the second node and a third node between the first transistor and the fifth transistor.

Abstract: A pixel configured to compensate for a threshold voltage of a driving transistor and including an organic light emitting diode coupled between a first power supply and a second power supply; a first transistor coupled between the organic light emitting diode and the second power supply and having a gate electrode coupled to a first node; a second transistor coupled between the first transistor and a data line and having a gate electrode coupled to a scan line; a third transistor coupled between the first transistor and the first node and having a gate electrode coupled to the scan line; a fourth transistor coupled between the first transistor and the second power supply and having a gate electrode coupled to an emission control line; and a fifth transistor coupled between the organic light emitting diode and the first transistor and having a gate electrode coupled to the emission control line.

Abstract: A memory device comprising an optimization component that facilitates erasing memory cells in a substantially homogeneous electromagnetic field and methods that facilitate erasing memory cells in a substantially homogeneous electromagnetic field are presented. The optimization component facilitates selecting a subset of memory cells to be erased at the same time, such that a memory cell in the subset of memory cells has two neighbor memory cells adjacent thereto that are in the subset of memory, or one neighbor memory cell adjacent thereto when the memory cell is an end-row memory cell. The optimization component facilitates performing a Fowler-Nordheim channel erase to erase the subset of memory cells, and a predetermined voltage potential associated with an erase command is applied to each cell of the subset of memory cells to facilitate reducing fringing effect associated with the electromagnetic fields applied to the cells during the erase.

Abstract: Methods and structures for forming semiconductor channels based on gate fringing effect are disclosed. In one embodiment, a NAND flash memory device comprises multiple NAND strings of memory transistors. Each memory transistor includes a charge trapping layer and a gate electrode formed on the charge trapping layer. The memory transistors are formed close to each other to form a channel between an adjacent pair of the memory transistors based on a gate fringing effect associated with the adjacent pair of the memory transistors.

Abstract: A portable terminal is provided and the portable terminal includes a terminal body, a projector operatively connected to the terminal body, and a door movably mounted to the terminal body, the door being moveable between a first position covering the projector and a second position exposing the projector.

Abstract: In a system and method of transferring signals between a media access controller (MAC) and a physical layer (PHY) the signals are transferred on an interface that includes a parallel data bus for the transmission of data signals in parallel between the MAC and the PHY. At the MAC, a PHY register transaction is initiated, by providing, at the MAC, a PHY register address in parallel on the parallel data bus and a control signal on a serial control signal line to request the PHY register transaction, the PHY register transaction comprising one of a PHY register write operation and a PHY register read operation. In the event the control signal requests a PHY register write operation, the MAC next provides PHY register data signals in parallel on the parallel data bus to program a PHY register having the PHY register address.