Patents by Inventor Yong-Duck Son

Yong-Duck Son has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8357596
    Abstract: A method of crystallizing a silicon layer and a method of manufacturing a TFT, the method of crystallizing a silicon layer including forming a catalyst metal layer on a substrate; forming a catalyst metal capping pattern on the catalyst metal layer; forming a second amorphous silicon layer on the catalyst metal capping pattern; and heat-treating the second amorphous silicon layer to form a polycrystalline silicon layer.
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: January 22, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Seung-Kyu Park, Ki-Yong Lee, Jin-Wook Seo, Min-Jae Jeong, Yun-Mo Chung, Yong-Duck Son, Byung-Soo So, Byoung-Keon Park, Kil-Won Lee, Dong-Hyun Lee, Jong-Ryuk Park, Tak-Young Lee, Jae-Wan Jung
  • Publication number: 20130001580
    Abstract: A thin film transistor includes an active layer on a substrate and crystallized through growth of crystals due to an action of metal catalysts, a gate insulating layer pattern on a part of the active layer; a gate electrode on a part of the gate insulating layer pattern; an anti-etching layer pattern formed on the gate insulating layer pattern to cover the gate electrode, the anti-etching layer pattern being coextensive with the gate insulating layer pattern; a source electrode and a drain electrode on the active layer and the anti-etching layer pattern; and gettering layer patterns between the active layer and the anti-etching layer pattern and between the source electrode and the drain electrode to eliminate the metal catalysts used for crystallization of the active layer, the gettering layer patterns being coextensive with the source electrode and drain electrode.
    Type: Application
    Filed: April 26, 2012
    Publication date: January 3, 2013
    Inventors: Yong-Duck SON, Ki-Yong LEE, Jin-Wook SEO, Min-Jae JEONG, Tak-Young LEE
  • Publication number: 20120056189
    Abstract: A thin film transistor includes a substrate, a semiconductor layer provided on the substrate and crystallized by using a metal catalyst, a gate electrode insulated from and disposed on the semiconductor layer, and a getter layer disposed between the semiconductor layer and the gate electrode and formed with a metal oxide having a diffusion coefficient that is less than that of the metal catalyst in the semiconductor layer.
    Type: Application
    Filed: August 15, 2011
    Publication date: March 8, 2012
    Inventors: Byoung-Keon PARK, Jin-Wook Seo, Ki-Yong Lee, Dong-Hyun Lee, Kil-Won Lee, Jong-Ryuk Park, Yun-Mo Chung, Tak-Young Lee, Byung-Soo So, Min-Jae Jeong, Seung-Kyu Park, Yong-Duck Son, Jae-Wan Jung
  • Publication number: 20120056187
    Abstract: A method of forming a polycrystalline silicon layer includes forming a first amorphous silicon layer and forming a second amorphous silicon layer such that the first amorphous silicon layer and the second amorphous silicon layer have different film qualities from each other, and crystallizing the first amorphous silicon layer and the second amorphous silicon layer using a metal catalyst to form a first polycrystalline silicon layer and a second polycrystalline silicon layer. A thin film transistor includes the polycrystalline silicon layer formed by the method and an organic light emitting device includes the thin film transistor.
    Type: Application
    Filed: August 17, 2011
    Publication date: March 8, 2012
    Inventors: Byoung-Keon PARK, Jong-Ryuk Park, Yun-Mo Chung, Tak-Young Lee, Jin-Wook Seo, Ki-Yong Lee, Min-Jae Jeong, Yong-Duck Son, Byung-Soo So, Seung-Kyu Park, Dong-Hyun Lee, Kil-Won Lee, Jae-Wan Jung
  • Publication number: 20120049199
    Abstract: A method of forming a polycrystalline layer includes forming a buffer layer on a substrate; treating the buffer layer with hydrogen plasma; forming an amorphous silicon layer on the buffer layer; forming a metallic catalyst layer for crystallizing the amorphous silicon layer on the amorphous silicon layer; and heat treating the amorphous silicon layer to form a polycrystalline silicon layer.
    Type: Application
    Filed: August 15, 2011
    Publication date: March 1, 2012
    Inventors: Yun-Mo Chung, Ki-Yong Lee, Jin-Wook Seo, Min-Jae Jeong, Seung-Kyu Park, Yong-Duck Son, Byung-Soo So, Byoung-Keon Park, Kil-Won Lee, Dong-Hyun Lee, Tak-Young Lee, Jong-Ryuk Park
  • Publication number: 20120049188
    Abstract: A method for forming a polycrystalline silicon layer includes: forming an amorphous silicon layer on a substrate; forming a metal catalyst on the amorphous silicon layer; forming a gettering metal layer on an overall surface of the amorphous silicon layer where the metal catalyst is formed; and performing a heat treatment. A thin film transistor includes the polycrystalline silicon layer, and an organic light emitting device includes the thin film transistor.
    Type: Application
    Filed: August 3, 2011
    Publication date: March 1, 2012
    Inventors: Byoung-Keon Park, Tak-Young Lee, Jong-Ryuk Park, Yun-Mo Chung, Jin-Wook Seo, Ki-Yong Lee, Min-Jae Jeong, Yong-Duck Son, Byung-Soo So, Seung-Kyu Park, Kil-Won Lee, Dong-Hyun Lee, Jae-Wan Jung, Ivan Maidanchuk
  • Publication number: 20110312135
    Abstract: A method of crystallizing a silicon layer and a method of manufacturing a TFT, the method of crystallizing a silicon layer including forming a catalyst metal layer on a substrate; forming a catalyst metal capping pattern on the catalyst metal layer; forming a second amorphous silicon layer on the catalyst metal capping pattern; and heat-treating the second amorphous silicon layer to form a polycrystalline silicon layer.
    Type: Application
    Filed: May 31, 2011
    Publication date: December 22, 2011
    Inventors: Seung-Kyu Park, Ki-Yong Lee, Jin-Wook Seo, Min-Jae Jeong, Yun-Mo Chung, Yong-Duck Son, Byung-Soo So, Byoung-Keon Park, Kil-Won Lee, Dong-Hyun Lee, Jong-Ryuk Park, Tak-Young Lee, Jae-Wan Jung
  • Publication number: 20110300674
    Abstract: A method of crystallizing a silicon layer and a method of manufacturing a thin film transistor using the same, the method of crystallizing the silicon layer including forming an amorphous silicon layer on a substrate; performing a hydrophobicity treatment on a surface of the amorphous silicon layer so as to obtain a hydrophobic surface thereon; forming a metallic catalyst on the amorphous silicon layer that has been subjected to the hydrophobicity treatment; and heat-treating the amorphous silicon layer including the metallic catalyst thereon to crystallize the amorphous silicon layer into a polycrystalline silicon layer.
    Type: Application
    Filed: May 27, 2011
    Publication date: December 8, 2011
    Inventors: Yun-Mo Chung, Ki-Yong Lee, Jin-Wook Seo, Min-Jae Jeong, Yong-Duck Son, Byung-Soo So, Seung-Kyu Park, Byoung-Keon Park, Dong-Hyun Lee, Kil-Won Lee, Tak-Young Lee, Jong-Ryuk Park
  • Publication number: 20110248276
    Abstract: A thin film transistor including a first polycrystalline semiconductor layer disposed on a substrate, a second polycrystalline semiconductor layer disposed on the first polycrystalline semiconductor layer, and metal catalysts configured to adjoin the first polycrystalline semiconductor layer and spaced apart from one another at specific intervals.
    Type: Application
    Filed: December 9, 2010
    Publication date: October 13, 2011
    Applicant: Samsung Mobile Display Co., Ltd.
    Inventors: Yong-Duck SON, Ki-Yong Lee, Jin-Wook Seo, Min-Jae Jeong, Byung-Soo So, Seung-Kyu Park, Kil-Won Lee, Yun-Mo Chung, Byoung-Keon Park, Dong-Hyun Lee, Jong-Ryuk Park, Tak-Young Lee, Jae-Wan Jung
  • Publication number: 20110248277
    Abstract: A method of crystallizing an amorphous silicon layer, a method of manufacturing a thin film transistor using the same, and a thin film transistor using the manufacturing method, the crystallizing method including: forming an amorphous silicon layer; positioning crystallization catalyst particles on the amorphous silicon layer to be separated from each other; selectively removing the crystallization catalyst particles from a portion of the amorphous silicon layer; and crystallizing the amorphous silicon layer by a heat treatment.
    Type: Application
    Filed: December 22, 2010
    Publication date: October 13, 2011
    Applicant: Samsung Mobile Display Co., Ltd.
    Inventors: Dong-Hyun LEE, Ki-Yong LEE, Jin-Wook Seo, Min-Jae Jeong, Yong-Duck Son, Byung-Soo So, Seung-Kyu Park, Kil-Won Lee, Yun-Mo Chung, Byoung-Keon Park, Jong-Ryuk Park, Tak-Young Lee, Jae-Wan Jung
  • Publication number: 20110233529
    Abstract: A substrate including a thin film transistor, the substrate including an active layer disposed on the substrate, the active layer including a channel area and source and drain areas, a gate electrode disposed on the active layer, the channel area corresponding to the gate electrode, a gate insulating layer interposed between the active layer and the gate electrode, an interlayer insulating layer disposed to cover the active layer and the gate electrode, the interlayer insulating layer having first and second contact holes partially exposing the active layer, source and drain electrodes disposed on the interlayer insulating layer, the source and drain areas corresponding to the source and drain electrodes, and ohmic contact layers, the ohmic contact layers being interposed between the interlayer insulating layer and the source and drain electrodes, and contacting the source and drain areas through the first and second contact holes.
    Type: Application
    Filed: February 9, 2011
    Publication date: September 29, 2011
    Inventors: Yun-Mo Chung, Ki-Yong Lee, Jin-Wook Seo, Min-Jae Jeong, Yong-Duck Son, Byung-Soo So, Seung-Kyu Park, Byoung-Keon Park, Dong-Hyun Lee, Kil-Won Lee, Tak-Young Lee, Jong-Ryuk Park, Jae-Wan Jung
  • Publication number: 20110227078
    Abstract: A display device including: a substrate; a first semiconductor layer disposed on the substrate; a second semiconductor layer disposed on the substrate and adjacent to the first semiconductor layer; a first insulation layer disposed on both the first semiconductor layer and the second semiconductor layer, the first insulation layer including a first opening forming a space between the first semiconductor layer and the second semiconductor layer; and a second insulation layer disposed on the first insulation layer and that fills the first opening.
    Type: Application
    Filed: February 25, 2011
    Publication date: September 22, 2011
    Applicant: Samsung Mobile Display Co., Ltd.
    Inventors: Byoung-Keon PARK, Jin-Wook Seo, Ki-Yong Lee, Yun-Mo Chung, Jong-Ryuk Park, Tak-Young Lee, Dong-Hyun Lee, Kil-Won Lee, Byung-Soo So, Min-Jae Jeong, Yong-Duck Son, Seung-Kyu Park, Jae-Wan Jung
  • Publication number: 20110227079
    Abstract: A thin film transistor including: an active layer formed on a substrate; a gate insulating layer pattern formed on a predetermined region of the active layer; a gate electrode formed on a predetermined region of the gate insulating layer pattern; an etching preventing layer pattern covering the gate insulating layer pattern and the gate electrode; and a source member and a drain member formed on the active layer and the etching preventing layer pattern.
    Type: Application
    Filed: February 28, 2011
    Publication date: September 22, 2011
    Applicant: Samsung Mobile Display Co., Ltd.
    Inventors: Yong-Duck SON, Ki-Yong Lee, Jin-Wook Seo, Min-Jae Jeong, Byung-Soo So, Seung-Kyu Park, Kil-Won Lee, Yun-Mo Chung, Byoung-Keon Park, Dong-Hyun Lee, Jong-Ryuk Park, Tak-Young Lee, Jae-Wan Jung
  • Publication number: 20110114963
    Abstract: A thin film transistor includes a substrate, a buffer layer on the substrate, a semiconductor layer including source/drain regions and a channel region on the buffer layer, a gate insulating layer corresponding to the channel region, a gate electrode corresponding to the channel region, and source/drain electrodes electrically connected to the semiconductor layer. A polysilicon layer of the channel region may include only a low angle grain boundary, and a high angle grain boundary may be disposed in a region of the semiconductor layer that is apart from the channel region.
    Type: Application
    Filed: August 27, 2010
    Publication date: May 19, 2011
    Inventors: Yong-Duck Son, Ki-Yong Lee, Joon-Hoo Choi, Min-Jae Jeong, Seung-Kyu Park, Kil-Won Lee, Jae-Wan Jung, Dong-Hyun Lee, Byung-Soo So, Hyun-Woo Koo, Ivan Maidanchuk, Jong-Won Hong, Heung-Yeol Na, Seok-Rak Chang