Patents by Inventor Yong-duk Lee

Yong-duk Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220037792
    Abstract: A chip radio frequency package includes a substrate including a first cavity, first and second connection members, a core member, a radio frequency integrated circuit (RFIC) disposed on an upper surface of the substrate, and a first front-end integrated circuit (FEIC) disposed in the first cavity. The core member includes a core insulating layer and a core via that penetrates the core insulating layer. The first connection member has a structure in which a first insulating layer and a first wiring layer are stacked. The second connection member has a second structure in which a second insulating layer and a second wiring layer are stacked. The RFIC inputs or outputs a base signal and a first radio frequency (RF) signal having a frequency higher than a frequency of the base signal, and the first FEIC inputs or outputs the first RF signal and a second RF signal.
    Type: Application
    Filed: October 20, 2021
    Publication date: February 3, 2022
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hak Gu KIM, Ho Kyung KANG, Seong Jong CHEON, Young Sik HUR, Jin Seon PARK, Yong Duk LEE
  • Patent number: 11183765
    Abstract: A chip radio frequency package includes a substrate including a first cavity, first and second connection members, a core member, a radio frequency integrated circuit (RFIC) disposed on an upper surface of the substrate, and a first front-end integrated circuit (FEIC) disposed in the first cavity. The core member includes a core insulating layer and a core via that penetrates the core insulating layer. The first connection member has a structure in which a first insulating layer and a first wiring layer are stacked. The second connection member has a second structure in which a second insulating layer and a second wiring layer are stacked. The RFIC inputs or outputs a base signal and a first radio frequency (RF) signal having a frequency higher than a frequency of the base signal, and the first FEIC inputs or outputs the first RF signal and a second RF signal.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: November 23, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hak Gu Kim, Ho Kyung Kang, Seong Jong Cheon, Young Sik Hur, Jin Seon Park, Yong Duk Lee
  • Patent number: 11183462
    Abstract: A substrate having an electronic component embedded therein includes a core structure including a first insulating body and a plurality of core wiring layers disposed on or in the first insulating body, and having a cavity penetrating at least a portion of the first insulating body in a thickness direction of the substrate and including a stopper layer as a bottom surface of the cavity, and an electronic component disposed in the cavity and attached to the stopper layer, and a surface of the stopper layer connected to the electronic component has a composite including at least two among a metal material, an inorganic particle, a filler, and an insulating resin.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: November 23, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Mi Sun Hwang, Dae Jung Byun, Chang Hwa Park, Sang Ho Jeong, Jun Hyeong Jang, Ki Ho Na, Je Sang Park, Yong Duk Lee, Yoo Rim Cha, Yeo Il Park
  • Patent number: 11133592
    Abstract: A radio frequency module is provided. The module includes a core member, a front-end integrated circuit (FEIC), a first connection member, a second connection member disposed on an upper surface of the core member, a radio frequency integrated circuit (RFIC) disposed on an upper surface of the second connection member, and configured to input or output a base signal and a first radio frequency (RF) signal having a frequency higher than a frequency of the base signal, through a wiring layer, a substrate disposed on a lower surface of the first connection member; and an electrical connection structure configured to electrically connect the first connection member and the substrate. The FEIC is configured to input or output the first RF signal and a second RF signal which has a power different from a power of the first RF signal.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: September 28, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Ho Kyung Kang, Seong Jong Cheon, Hak Gu Kim, Young Sik Hur, Jin Seon Park, Yong Duk Lee
  • Patent number: 11117398
    Abstract: Provided is a photo printer including: a paper supply unit for accommodating stacked sheets of paper and having a pickup roller protruding from a bottom surface thereof; a platen roller provided at a front end of the paper supply unit; a head provided above the platen roller so as to form an image on the paper fed; a motor for providing a driving force to the platen roller; deceleration gears for decreasing revolutions per minute of the motor; a gear plate provided at one side of the paper supply unit and having the deceleration gears shaft-coupled thereto; and a motor plate having an aligning hole adapted to pass the shaft of the deceleration gear therethrough and a motor hole adapted to pass a rotary shaft of the motor therethrough.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: September 14, 2021
    Assignee: DS GLOBAL
    Inventors: Yong Duk Lee, Hee Pil Yoon
  • Patent number: 11117397
    Abstract: Provided is a photo printer including: a base for accommodating paper therein; a pick-up roller protruding from a bottom surface of the base to feed the paper accommodated in the base in a forward direction; a platen roller for discharging in the forward direction the paper; a head provided above the platen roller to apply heat to the paper; a swing bracket having a front side to which the head is coupled and a rear side rotatably coupled to the base; pressurizing means for pressurizing the swing bracket down to allow the swing bracket to come into close contact with the paper; and head supporting members provided on side walls of the base to support the front side of the swing bracket under the swing bracket and each having an eccentric portion adapted to lift the head up through rotation.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: September 14, 2021
    Assignee: DS GLOBAL
    Inventor: Yong Duk Lee
  • Patent number: 11101840
    Abstract: A chip radio frequency package includes a substrate including a first cavity, first and second connection members, a core member, a radio frequency integrated circuit (RFIC) disposed on an upper surface of the substrate, and a first front-end integrated circuit (FEIC) disposed in the first cavity. The core member includes a core insulating layer and a core via that penetrates the core insulating layer. The first connection member has a structure in which a first insulating layer and a first wiring layer are stacked. The second connection member has a second structure in which a second insulating layer and a second wiring layer are stacked. The RFIC inputs or outputs a base signal and a first radio frequency (RF) signal having a frequency higher than a frequency of the base signal, and the first FEIC inputs or outputs the first RF signal and a second RF signal.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: August 24, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hak Gu Kim, Ho Kyung Kang, Seong Jong Cheon, Young Sik Hur, Jin Seon Park, Yong Duk Lee
  • Publication number: 20210242595
    Abstract: A chip radio frequency package includes a substrate including a first cavity, first and second connection members, a core member, a radio frequency integrated circuit (RFIC) disposed on an upper surface of the substrate, and a first front-end integrated circuit (FEIC) disposed in the first cavity. The core member includes a core insulating layer and a core via that penetrates the core insulating layer. The first connection member has a structure in which a first insulating layer and a first wiring layer are stacked. The second connection member has a second structure in which a second insulating layer and a second wiring layer are stacked. The RFIC inputs or outputs a base signal and a first radio frequency (RF) signal having a frequency higher than a frequency of the base signal, and the first FEIC inputs or outputs the first RF signal and a second RF signal.
    Type: Application
    Filed: June 3, 2020
    Publication date: August 5, 2021
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hak Gu KIM, Ho Kyung KANG, Seong Jong CHEON, Young Sik HUR, Jin Seon PARK, Yong Duk LEE
  • Publication number: 20210242896
    Abstract: A chip radio frequency package includes a substrate including a first cavity, first and second connection members, a core member, a radio frequency integrated circuit (RFIC) disposed on an upper surface of the substrate, and a first front-end integrated circuit (FEIC) disposed in the first cavity. The core member includes a core insulating layer and a core via that penetrates the core insulating layer. The first connection member has a structure in which a first insulating layer and a first wiring layer are stacked. The second connection member has a second structure in which a second insulating layer and a second wiring layer are stacked. The RFIC inputs or outputs a base signal and a first radio frequency (RF) signal having a frequency higher than a frequency of the base signal, and the first FEIC inputs or outputs the first RF signal and a second RF signal.
    Type: Application
    Filed: August 17, 2020
    Publication date: August 5, 2021
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hak Gu KIM, Ho Kyung KANG, Seong Jong CHEON, Young Sik HUR, Jin Seon PARK, Yong Duk LEE
  • Publication number: 20210242594
    Abstract: A radio frequency module is provided. The module includes a core member, a front-end integrated circuit (FEIC), a first connection member, a second connection member disposed on an upper surface of the core member, a radio frequency integrated circuit (RFIC) disposed on an upper surface of the second connection member, and configured to input or output a base signal and a first radio frequency (RF) signal having a frequency higher than a frequency of the base signal, through a wiring layer, a substrate disposed on a lower surface of the first connection member; and an electrical connection structure configured to electrically connect the first connection member and the substrate. The FEIC is configured to input or output the first RF signal and a second RF signal which has a power different from a power of the first RF signal.
    Type: Application
    Filed: June 3, 2020
    Publication date: August 5, 2021
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Ho Kyung KANG, Seong Jong CHEON, Hak Gu KIM, Young Sik HUR, Jin Seon PARK, Yong Duk LEE
  • Patent number: 11075156
    Abstract: A substrate having an electronic component embedded therein includes a core structure including a first insulating body and first wiring layers and having a cavity, an electronic component embedded in the cavity, a build-up structure including a second insulating body, covering at least a portion of each of the core structure and the electronic component and filling a portion of the cavity, and second wiring layers, a first passivation layer disposed on a side of the core structure opposing a side of the core structure on which the build-up structure is disposed, and a second passivation layer disposed on a side of the build-up structure opposing a side of the build-up structure on which the core structure is disposed, wherein the first and second passivation layers include different types of materials.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: July 27, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Dae Jung Byun, Yong Duk Lee, Chang Hwa Park, Ki Ho Na, Je Sang Park, Jin Won Lee
  • Publication number: 20210193563
    Abstract: A substrate having an electronic component embedded therein includes a core structure including a first insulating body and first wiring layers and having a cavity, an electronic component embedded in the cavity, a build-up structure including a second insulating body, covering at least a portion of each of the core structure and the electronic component and filling a portion of the cavity, and second wiring layers, a first passivation layer disposed on a side of the core structure opposing a side of the core structure on which the build-up structure is disposed, and a second passivation layer disposed on a side of the build-up structure opposing a side of the build-up structure on which the core structure is disposed, wherein the first and second passivation layers include different types of materials.
    Type: Application
    Filed: March 3, 2020
    Publication date: June 24, 2021
    Inventors: Dae Jung Byun, Yong Duk Lee, Chang Hwa Park, Ki Ho Na, Je Sang Park, Jin Won Lee
  • Publication number: 20210193580
    Abstract: A substrate having an electronic component embedded therein includes a core structure including a first insulating body and core wiring layers and having a cavity penetrating through a portion of the first insulating body, an electronic component disposed in the cavity, an insulating material covering at least a portion of each of the core structure and the electronic component and disposed in at least a portion of the cavity, a wiring layer disposed on the insulating material, and a build-up structure disposed on the insulating material and including a second insulating body and a build-up wiring layer. A material of the first insulating body has a coefficient of thermal expansion (CTE) less than a CTE of the second insulating body, and the insulating material has a CTE less than a CTE of a material of the second insulating body.
    Type: Application
    Filed: March 13, 2020
    Publication date: June 24, 2021
    Inventors: Dae Jung BYUN, Chang Hwa PARK, Sang Ho JEONG, Ki Ho NA, Je Sang PARK, Yong Duk LEE, Jin Won LEE
  • Publication number: 20210193609
    Abstract: An electronic component embedded substrate includes a core structure including a first insulating body and core wiring layers and having a cavity and having a stopper layer disposed as a bottom surface; an electronic component disposed in the cavity and attached to the stopper layer; and a build-up structure including a second insulating body covering at least a portion each of the core structure and the electronic component and filling at least a portion of the cavity, and build-up wiring layers wherein the stopper layer has a first region in which a portion of one surface is exposed from the first insulating body and a second region in which the other portion of one surface is covered with the first insulating body, and a surface roughness of one surface of the stopper layer in the first region is greater than that of the stopper layer in the second region.
    Type: Application
    Filed: February 28, 2020
    Publication date: June 24, 2021
    Inventors: Mi Sun Hwang, Dae Jung Byun, Chang Hwa Park, Sang Ho Jeong, Jun Hyeong Jang, Ki Ho Na, Je Sang Park, Yong Duk Lee, Yoo Rim Cha, Yeo Il Park
  • Publication number: 20210183783
    Abstract: A substrate with an electronic component embedded therein includes a core substrate including an insulating body having a first surface and a second surface, opposite to the first surface, a first wiring layer embedded in the insulating body such that one surface thereof is exposed from the first surface, and a second wiring layer disposed on the insulating body to protrude on the second surface, the core substrate having a cavity penetrating a portion of the insulating body from the first surface toward the second surface and having a stopper layer as a bottom surface thereof; an electronic component disposed on the stopper layer in the cavity; a first insulating material covering at least a portion of each of the core substrate and the electronic component; and a third wiring layer disposed on the first insulating material.
    Type: Application
    Filed: February 20, 2020
    Publication date: June 17, 2021
    Inventors: Je Sang Park, Chang Yul Oh, Sang Ho Jeong, Yong Duk Lee
  • Publication number: 20210183784
    Abstract: A substrate having an electronic component embedded therein includes a core structure including a first insulating body and a plurality of core wiring layers disposed on or in the first insulating body, and having a cavity penetrating at least a portion of the first insulating body in a thickness direction of the substrate and including a stopper layer as a bottom surface of the cavity, and an electronic component disposed in the cavity and attached to the stopper layer, and a surface of the stopper layer connected to the electronic component has a composite including at least two among a metal material, an inorganic particle, a filler, and an insulating resin.
    Type: Application
    Filed: March 5, 2020
    Publication date: June 17, 2021
    Inventors: Mi Sun HWANG, Dae Jung BYUN, Chang Hwa PARK, Sang Ho JEONG, Jun Hyeong JANG, Ki Ho NA, Je Sang PARK, Yong Duk LEE, Yoo Rim CHA, Yeo Il PARK
  • Publication number: 20210183774
    Abstract: A substrate embedded electronic component package includes a core member having a cavity in which a metal layer is disposed on a bottom surface thereof, an electronic component disposed in the cavity, an encapsulant filling at least a portion of the cavity and covering at least a portion of each of the core member and the electronic component, and a connection structure disposed on the encapsulant and including a first wiring layer connected to the electronic component. A wall surface of the cavity has at least one groove portion protruding outwardly from a center of the cavity, and the groove portion extends to a same depth in the core member as a depth of the cavity.
    Type: Application
    Filed: March 10, 2020
    Publication date: June 17, 2021
    Inventors: Dae Jung BYUN, Chang Hwa PARK, Sang Ho JEONG, Je Sang PARK, Mi Sun HWANG, Yong Duk LEE, Jin Won LEE, Yeo Il PARK
  • Publication number: 20210175159
    Abstract: A substrate having an electronic component embedded therein includes a core substrate including first and second wiring layers disposed on different levels and one or more insulating layers disposed between the first and second wiring layers, having a cavity in which a stopper layer is disposed on a bottom surface of the cavity, and including a groove disposed around the stopper layer on the bottom surface; an electronic component disposed on the stopper layer in the cavity; an insulating material covering at least a portion of each of the core substrate and the electronic component and disposed in at least a portion of each of the cavity and the groove; and a third wiring layer disposed on the insulating material. The stopper layer protrudes on the bottom surface.
    Type: Application
    Filed: February 26, 2020
    Publication date: June 10, 2021
    Inventors: Je Sang PARK, Chang Yul OH, Sang Ho JEONG, Yong Duk LEE
  • Patent number: 10998247
    Abstract: A board includes: a core structure; one or more first passive components embedded in the core structure; a first build-up structure disposed on one side of the core structure and including first build-up layers and first wiring layers; and a second build-up structure disposed on the other side of the core structure and including second build-up layers and second wiring layers. One surface of a first core layer contacting a first insulating layer is coplanar with one surface of each of the one or more first passive components contacting a first insulating layer, the other surface of each of the one or more first passive components covered with a second insulating layer is spaced apart from a second core layer, and the one or more first passive components are electrically connected to at least one of the plurality of first wiring layers and the plurality of second wiring layers.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: May 4, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung Hyun Cho, Young Sik Hur, Won Wook So, Kyung Hwan Ko, Yong Ho Baek, Yong Duk Lee
  • Publication number: 20200338911
    Abstract: Provided is a photo printer including: a base for accommodating paper therein; a pick-up roller protruding from a bottom surface of the base to feed the paper accommodated in the base in a forward direction; a platen roller for discharging in the forward direction the paper; a head provided above the platen roller to apply heat to the paper; a swing bracket having a front side to which the head is coupled and a rear side rotatably coupled to the base; pressurizing means for pressurizing the swing bracket down to allow the swing bracket to come into close contact with the paper; and head supporting members provided on side walls of the base to support the front side of the swing bracket under the swing bracket and each having an eccentric portion adapted to lift the head up through rotation.
    Type: Application
    Filed: October 4, 2018
    Publication date: October 29, 2020
    Inventor: Yong Duk LEE