Patents by Inventor Yong-Hee Kim
Yong-Hee Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7418967Abstract: A dishwasher including an improved rack adjustment system is provided. The dishwasher includes a chamber for washing dishes, guide rails at opposite inside walls of the chamber, and a rack that moves along the guide rails into and Out of the chamber for holding dishes. A supporter may be provided at opposite sides of the rack for guiding an up/down movement of the rack along the guide rail, with a locker provided on an outside surface of the supporter for holding the rack in position. A handle may be provided on the outside surface of the supporter to swing in up/down directions to a force to the locker and adjust the rack downward, thereby permitting easy adjustment of rack height.Type: GrantFiled: June 7, 2004Date of Patent: September 2, 2008Assignee: LG Electronics Inc.Inventor: Yong Hee Kim
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Patent number: 7371984Abstract: A button assembly of a dishwasher is provided. The button assembly includes a button portion and a front panel. The button portion has a button head for a user to press and a button body extending down from the button head. A button connecting portion connects a plurality of button bodies, and hence, a plurality of button portions along one piece. The button portion is installed at the rear of the front panel. The front panel has a button window formed therein for inserting the button head therethrough. Because the button portions do not need to be individually mounted using individual springs and fasteners, the assembly process is simplified, and manufacturing cost is reduced.Type: GrantFiled: October 21, 2005Date of Patent: May 13, 2008Assignee: LG Electronics Inc.Inventors: Yong Jae Lee, Yong Hee Kim
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Patent number: 7195933Abstract: A semiconductor device having a measuring pattern that enhances measuring reliability and a method of measuring the semiconductor device using the measuring pattern. The semiconductor device includes a semiconductor substrate having a chip area in which an integrated circuit is formed, and a scribe area surrounding the chip area. The semiconductor device also includes a measuring pattern formed in the scribe area and having a surface sectional area to include a beam area in which measuring beams are projected, and a dummy pattern formed in the measuring pattern to reduce the surface sectional area of the measuring pattern. The surface sectional area of the dummy pattern occupies from approximately 5% to approximately 15% of a surface sectional area of the beam area.Type: GrantFiled: June 21, 2005Date of Patent: March 27, 2007Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Wook Park, Jae-Min Yu, Chul-Soon Kwon, Jin-Woo Kim, Jae-Hyun Park, Yong-Hee Kim, Don-Woo Lee, Dai-Geun Kim, Joo-Chan Kim, Kook-Min Kim, Eui-Youl Ryu
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Publication number: 20070026613Abstract: A flash memory device having a split gate that can prevent an active region and a floating gate electrode from being misaligned, and a method of manufacturing the same, includes sequentially stacking a gate oxide layer and a floating gate conductive layer on a semiconductor substrate, forming an isolation layer in a predetermined region of the semiconductor substrate where the floating gate conductive layer is formed, and defining an active region. Then, a local oxide layer is formed by oxidizing a predetermined part of the floating gate conductive layer on the active region. A floating gate electrode structure is formed by patterning the floating gate conductive layer using the local oxide layer.Type: ApplicationFiled: August 14, 2006Publication date: February 1, 2007Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Eui-youl Ryu, Chul-soon Kwon, Jin-woo Kim, Yong-hee Kim, Dai-geun Kim, Joo-chan Kim
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Patent number: 7094646Abstract: A flash memory device having a split gate that can prevent an active region and a floating gate electrode from being misaligned, and a method of manufacturing the same, includes sequentially stacking a gate oxide layer and a floating gate conductive layer on a semiconductor substrate, forming an isolation layer in a predetermined region of the semiconductor substrate where the floating gate conductive layer is formed, and defining an active region. Then, a local oxide layer is formed by oxidizing a predetermined part of the floating gate conductive layer on the active region. A floating gate electrode structure is formed by patterning the floating gate conductive layer using the local oxide layer.Type: GrantFiled: May 3, 2005Date of Patent: August 22, 2006Assignee: Samsung Electronics Co., Ltd.Inventors: Eui-youl Ryu, Chul-soon Kwon, Jin-woo Kim, Yong-hee Kim, Dai-geun Kim, Joo-chan Kim
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Publication number: 20060001077Abstract: In a split gate type flash memory device, and a method of manufacturing the same, the device includes a memory cell array having a memory cell uniquely determined by a contact of a corresponding bit line and a corresponding word line, a floating gate formed on a semiconductor substrate to constitute the memory cell, the floating gate having a horizontal surface parallel to a main surface of the substrate, a vertical surface perpendicular to the main surface of the substrate, and a curved surface extending between the horizontal and vertical surfaces, a control gate formed over the curved surface of the floating gate in an area defined by an angle range of less than 90° between an extension line of the horizontal surface and an extension line of the vertical surface, and source and drain regions formed in an active region of the substrate.Type: ApplicationFiled: June 15, 2005Publication date: January 5, 2006Inventors: Eui-youl Ryu, Chul-soon Kwon, Jin-woo Kim, Yong-hee Kim, Dai-geun Kim, Joo-chan Kim
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Patent number: 6977200Abstract: A method of manufacturing split-gate memory provides a control gate insulating film and the tunneling insulating film in a cell region, a high voltage gate insulating film in a high voltage region, and a low voltage gate insulating film in a low voltage region, all having different thickness. Additionally, a pre-cleaning process removes an outer sidewall portion of a spacer to form a tip portion of a floating gate that overlaps a control gate line formed proximate the floating gate.Type: GrantFiled: November 8, 2004Date of Patent: December 20, 2005Assignee: Samsung Electronics Co., Ltd.Inventors: Yong-hee Kim, Chul-soon Kwon, Jin-woo Kim, Joo-chan Kim, Dae-geun Kim, Eui-youl Ryu
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Publication number: 20050250282Abstract: A flash memory device having a split gate that can prevent an active region and a floating gate electrode from being misaligned, and a method of manufacturing the same, includes sequentially stacking a gate oxide layer and a floating gate conductive layer on a semiconductor substrate, forming an isolation layer in a predetermined region of the semiconductor substrate where the floating gate conductive layer is formed, and defining an active region. Then, a local oxide layer is formed by oxidizing a predetermined part of the floating gate conductive layer on the active region. A floating gate electrode structure is formed by patterning the floating gate conductive layer using the local oxide layer.Type: ApplicationFiled: May 3, 2005Publication date: November 10, 2005Inventors: Eui-youl Ryu, Chul-soon Kwon, Jin-woo Kim, Yong-hee Kim, Dai-geun Kim, Joo-chan Kim
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Patent number: 6959881Abstract: A nozzle of a dishwasher reduces a space for installing a supplementary nozzle on a main nozzle by having first and second connectors coupled to be caught on each other between main and auxiliary nozzles. The nozzle assembly includes a main nozzle having a first coupling hole; an auxiliary nozzle, having a second coupling hole, for coupling with the main nozzle; a first interlocking device, having a first end, for coupling with the main nozzle at the first coupling hole, by being caught in the first coupling hole by the first end; and a second interlocking device, having a first end, for coupling with the auxiliary nozzle at the second coupling hole, by being caught in the second coupling hole by the first end and by having a second end to be caught on the first interlocking device.Type: GrantFiled: November 26, 2003Date of Patent: November 1, 2005Assignee: LG Electronics Inc.Inventor: Yong Hee Kim
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Publication number: 20050230786Abstract: A semiconductor device having a measuring pattern that enhances measuring reliability and a method of measuring the semiconductor device using the measuring pattern. The semiconductor device includes a semiconductor substrate having a chip area in which an integrated circuit is formed, and a scribe area surrounding the chip area. The semiconductor device also includes a measuring pattern formed in the scribe area and having a surface sectional area to include a beam area in which measuring beams are projected, and a dummy pattern formed in the measuring pattern to reduce the surface sectional area of the measuring pattern. The surface sectional area of the dummy pattern occupies from approximately 5% to approximately 15% of a surface sectional area of the beam area.Type: ApplicationFiled: June 21, 2005Publication date: October 20, 2005Inventors: Sang-Wook Park, Jae-Min Yu, Chul-Soon Kwon, Jin-Woo Kim, Jae-Hyun Park, Yong-Hee Kim, Don-Woo Lee, Dai-Geun Kim, Joo-Chan Kim, Kook-Min Kim, Eui-Youl Ryu
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Patent number: 6924505Abstract: A semiconductor device having a measuring pattern that enhances measuring reliability and a method of measuring the semiconductor device using the measuring pattern. The semiconductor device includes a semiconductor substrate having a chip area in which an integrated circuit is formed, and a scribe area surrounding the chip area. The semiconductor device also includes a measuring pattern formed in the scribe area and having a surface sectional area to include a beam area in which measuring beams are projected, and a dummy pattern formed in the measuring pattern to reduce the surface sectional area of the measuring pattern. The surface sectional area of the dummy pattern occupies from approximately 5% to approximately 15% of a surface sectional area of the beam area.Type: GrantFiled: June 2, 2004Date of Patent: August 2, 2005Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Wook Park, Jae-Min Yu, Chul-Soon Kwon, Jin-Woo Kim, Jae-Hyun Park, Yong-Hee Kim, Don-Woo Lee, Dai-Geun Kim, Joo-Chan Kim, Kook-Min Kim, Eui-Youl Ryu
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Publication number: 20050112821Abstract: A method of manufacturing split-gate memory provides a control gate insulating film and the tunneling insulating film in a cell region, a high voltage gate insulating film in a high voltage region, and a low voltage gate insulating film in a low voltage region, all having different thickness. Additionally, a pre-cleaning process removes an outer sidewall portion of a spacer to form a tip portion of a floating gate that overlaps a control gate line formed proximate the floating gate.Type: ApplicationFiled: November 8, 2004Publication date: May 26, 2005Inventors: Yong-hee Kim, Chul-soon Kwon, Jin-woo Kim, Joo-chan Kim, Dae-geun Kim, Eui-youl Ryu
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Publication number: 20050035433Abstract: A semiconductor device having a measuring pattern that enhances measuring reliability and a method of measuring the semiconductor device using the measuring pattern. The semiconductor device includes a semiconductor substrate having a chip area in which an integrated circuit is formed, and a scribe area surrounding the chip area. The semiconductor device also includes a measuring pattern formed in the scribe area and having a surface sectional area to include a beam area in which measuring beams are projected, and a dummy pattern formed in the measuring pattern to reduce the surface sectional area of the measuring pattern. The surface sectional area of the dummy pattern occupies from approximately 5% to approximately 15% of a surface sectional area of the beam area.Type: ApplicationFiled: June 2, 2004Publication date: February 17, 2005Inventors: Sang-Wook Park, Jae-Min Yu, Chul-Soon Kwon, Jin-Woo Kim, Jae-Hyun Park, Yong-Hee Kim, Don-Woo Lee, Dai-Geun Kim, Joo-Chan Kim, Kook-Min Kim, Eui-Youl Ryu
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Patent number: 6853028Abstract: A non-volatile memory device includes a cell region and a peripheral circuit region at the semiconductor substrate. A plurality active regions are disposed in the cell region in parallel with each other. A plurality of cell line patterns cross over the active regions in parallel. A couple of tunnel insulating layers and the floating gate electrodes are disposed between the cell line patterns and the active regions. A dummy region is interposed between the cell region and the peripheral circuit region where at least one dummy line pattern is disposed in the dummy region.Type: GrantFiled: July 14, 2003Date of Patent: February 8, 2005Assignee: Samsung Electronics, Co., Ltd.Inventors: Yong-Hee Kim, Chul-Soon Kwon, Jin-Woo Kim
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Publication number: 20040195361Abstract: A nozzle of a dishwasher reduces a space for installing a supplementary nozzle on a main nozzle by having first and second connectors coupled to be caught on each other between main and auxiliary nozzles. The nozzle assembly includes a main nozzle having a first coupling hole; an auxiliary nozzle, having a second coupling hole, for coupling with the main nozzle; a first interlocking device, having a first end, for coupling with the main nozzle at the first coupling hole, by being caught in the first coupling hole by the first end; and a second interlocking device, having a first end, for coupling with the auxiliary nozzle at the second coupling hole, by being caught in the second coupling hole by the first end and by having a second end to be caught on the first interlocking device.Type: ApplicationFiled: November 26, 2003Publication date: October 7, 2004Inventor: Yong Hee Kim
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Patent number: 6800525Abstract: The method of manufacturing a split gate flash memory device includes the steps of (a) providing a semiconductor substrate of a conductivity type opposite to that of a first junction region; (b) sequentially forming a first dielectric film, a first conductive film, a second dielectric film and a third dielectric film on an overall upper face of the substrate; (c) etching the third dielectric film by a given thickness so as to expose the second dielectric film; (d) removing the exposed second dielectric film, and eliminating the remaining third dielectric film; (e) etching the first conductive film and the second dielectric film by a given thickness so as to partially expose the first conductive line and the first conductive film; (f) forming a fourth dielectric film on a portion of the exposed first conductive line and first conductive film; (g) eliminating the remaining second dielectric film remained, and exposing the first conductive film provided in a lower part thereof; and (h) etching the first dielectrType: GrantFiled: July 31, 2003Date of Patent: October 5, 2004Assignee: Samsung Electronics Co., Ltd.Inventors: Eui-Youl Ryu, Jae-Min Yu, Jin-Woo Kim, Jae-Hyun Park, Yong-Hee Kim, Don-Woo Lee, Dai-Geun Kim, Sag-Wook Park, Joo-Chan Kim, Kook-Min Kim, Min-Soo Cho, Chul-Soon Kwon
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Publication number: 20040163690Abstract: A filter assembly having a plurality of concentric filters for use in a dishwasher prevents an undue accumulation of waste particles in the outer filter by periodically spraying water into the filter assembly. The filter assembly includes a water circulator for supplying washing and rinsing water under pressure to the filter assembly; and at least one cleaning nozzle, provided at a predetermined position along an outer circumference of the filter assembly, to communicate with the water circulator. The pressurized water of the water circulator is sprayed into the filter assembly.Type: ApplicationFiled: November 26, 2003Publication date: August 26, 2004Inventor: Yong Hee Kim
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Publication number: 20040103932Abstract: Disclosed is a dishwasher, by which installation height of a rack is adjusted inside a washing chamber and in which the installation height is automatically adjusted by a button. The present invention includes a washing chamber having tableware washed therein, a rack movably installed in the washing chamber to hold the tableware thereon, a plurality of guide rollers fixed to both confronting sidewalls of the washing chamber, a guide rail provided between the first and second rollers to slide back and forth, and a height adjustment means for moving the rack upward and downward, the height adjust means provided to slide on the guide rail.Type: ApplicationFiled: November 26, 2003Publication date: June 3, 2004Applicant: LG ELECTRONICS INC.Inventor: Yong Hee Kim
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Publication number: 20040041202Abstract: A non-volatile memory device includes a cell region and a peripheral circuit region at the semiconductor substrate. A plurality active regions are disposed in the cell region in parallel with each other. A plurality of cell line patterns cross over the active regions in parallel. A couple of tunnel insulating layers and the floating gate electrodes are disposed between the cell line patterns and the active regions. A dummy region is interposed between the cell region and the peripheral circuit region where at least one dummy line pattern is disposed in the dummy region.Type: ApplicationFiled: July 14, 2003Publication date: March 4, 2004Applicant: Samsung Electronics Co., Ltd.Inventors: Yong-Hee Kim, Chul-Soon Kwon, Jin-Woo Kim
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Publication number: 20040027861Abstract: The method of manufacturing a split gate flash memory device includes the steps of (a) providing a semiconductor substrate of a conductivity type opposite to that of a first junction region; (b) sequentially forming a first dielectric film, a first conductive film, a second dielectric film and a third dielectric film on an overall upper face of the substrate; (c) etching the third dielectric film by a given thickness so as to expose the second dielectric film; (d) removing the exposed second dielectric film, and eliminating the remaining third dielectric film; (e) etching the first conductive film and the second dielectric film by a given thickness so as to partially expose the first conductive line and the first conductive film; (f) forming a fourth dielectric film on a portion of the exposed first conductive line and first conductive film; (g) eliminating the remaining second dielectric film remained, and exposing the first conductive film provided in a lower part thereof; and (h) etching the first dielectrType: ApplicationFiled: July 31, 2003Publication date: February 12, 2004Applicant: Samsung Electronics Co., Ltd.Inventors: Eui-Youl Ryu, Jae-Min Yu, Jin-Woo Kim, Jae-Hyun Park, Yong-Hee Kim, Don-Woo Lee, Dai-Geun Kim, Sag-Wook Park, Joo-Chan Kim, Kook-Min Kim, Min-Soo Cho, Chul-Soon Kwon