Patents by Inventor Yong-Ho Jeon
Yong-Ho Jeon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190378903Abstract: Semiconductor devices are provided. A semiconductor device includes a channel region that protrudes from a substrate. The semiconductor device includes a gate line on the channel region. Moreover, the semiconductor device includes a gate isolation layer that is between a first portion of the gate line and a second portion of the gate line. The gate isolation layer is in contact with the gate line and includes a gap that is in the gate isolation layer. Related methods of manufacturing a semiconductor device are also provided.Type: ApplicationFiled: December 26, 2018Publication date: December 12, 2019Inventors: Yong Ho JEON, Jung Hyun KIM, Sung Woo MYUNG, Young Mook OH, Dong Seok LEE
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Patent number: 10446561Abstract: Semiconductor devices including a dummy gate structure on a fin are provided. A semiconductor device includes a fin protruding from a substrate. The semiconductor device includes a source/drain region in the fin, and a recess region of the fin that is between first and second portions of the source/drain region. Moreover, the semiconductor device includes a dummy gate structure overlapping the recess region, and a spacer that is on the fin and adjacent a sidewall of the dummy gate structure.Type: GrantFiled: August 29, 2018Date of Patent: October 15, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Jine Park, Kee-Sang Kwon, Do-Hyoung Kim, Bo-Un Yoon, Keun-Hee Bai, Kwang-Yong Yang, Kyoung-Hwan Yeo, Yong-Ho Jeon
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Publication number: 20190295889Abstract: A semiconductor device with improved product reliability and a method of fabricating the semiconductor are provided. The semiconductor device includes a substrate, a gate electrode on the substrate, a first spacer on a sidewall of the gate electrode, a conductive contact on a sidewall of the first spacer to protrude beyond a top surface of the gate electrode, a trench defined by the top surface of the gate electrode, a top surface of the first spacer, and sidewalls of the contact, an etching stop layer extending along at least parts of sidewalls of the trench and a bottom surface of the trench, and a capping pattern on the etching stop layer to fill the trench, wherein the capping pattern includes silicon oxide or a low-k material having a lower permittivity than silicon oxide.Type: ApplicationFiled: October 31, 2018Publication date: September 26, 2019Inventors: Keun Hee BAI, Sung Woo KANG, Kee Sang KWON, Dong Seok LEE, Sang Hyun LEE, Jeong Yun LEE, Yong-Ho JEON
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Publication number: 20190280087Abstract: An integrated circuit (IC) device includes a first region and a second region adjacent to each other along a first direction on a substrate, fin patterns in each of the first and second regions extending along a second direction perpendicular to the first direction; gate electrodes extending along the first direction and intersecting the fin patterns; and an isolation region between the first and second regions, a bottom of the isolation region having a non-uniform height relative to a bottom of the substrate.Type: ApplicationFiled: July 12, 2018Publication date: September 12, 2019Inventors: Jae-hyun Park, Kye-hyun Baek, Yong-ho Jeon, Cheol Kim, Sung-il Park, Yun-il Lee, Hyung-suk Lee
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Patent number: 10405735Abstract: A towing device for endoscopy including a connecting portion connected to a wire of an endoscope to be moved, wherein a body of the connecting portion is broken when a set amount of tension or more is applied to the connecting portion; a guide portion including an inner path through which the connecting portion moves; a clip portion positioned at an opposite direction of the wire with respect to the guide portion and hooked by the connecting portion to be closed and grip body tissues; and an extension portion configured to move together with the guide portion and having a magnetic force.Type: GrantFiled: March 10, 2017Date of Patent: September 10, 2019Assignee: AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATIONInventors: Moon Gu Lee, Chang Ho Jung, Yong Ho Jeon, Yun Ho Jung
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Publication number: 20190157147Abstract: A semiconductor device includes an active pattern, a gate electrode, a gate capping pattern, and a gate spacer. The active pattern extends in a first direction parallel to a top surface of the substrate. The gate electrode extends in a second direction parallel to the top surface of the substrate and intersects the active pattern. The gate capping pattern covers a top surface of the gate electrode and extends in a direction crossing the top surface of the substrate to cover a first sidewall of the gate electrode. The gate spacer covers a second sidewall of the gate electrode. The first sidewall and the second sidewall are opposite to each other in the second direction.Type: ApplicationFiled: January 2, 2019Publication date: May 23, 2019Inventors: Sungwoo MYUNG, GeumJung SEONG, Jisoo OH, JinWook LEE, Dohyoung KIM, Yong-Ho JEON
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Publication number: 20190142426Abstract: The clipping device includes a connecting portion which is moved while being connected to a wire of the endoscope and has a body broken when tension more than a set value is applied thereto, a body portion which includes a first inside path portion through which the connecting portion moves and has a magnetic force, a cap portion which is located on a side of the body portion, includes a second inside path portion connected to the first inside path portion, and guides movement of the connecting portion, a clipping portion which is connected to the connecting portion protruding through the cap portion and contracts due to movement of the connecting portion to grip body tissue, and a connector which connects the body portion to the cap portion and includes a material biodegradable in a human body.Type: ApplicationFiled: November 9, 2018Publication date: May 16, 2019Applicant: AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATIONInventors: Moon Gu LEE, Yong Ho JEON, Byung Kyu KIM, Chang Ho JUNG, Chan Joong KIM
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Patent number: 10256318Abstract: A method of manufacturing a semiconductor device includes forming dummy gate structures including a dummy gate insulating layer and dummy gate electrodes, on a first region of a semiconductor substrate, the first region including a patterning region, forming spacers on two side walls of each of the dummy gate structures, forming an interlayer insulating layer on the semiconductor substrate and the dummy gate structures, forming a protective insulating layer on a second region of the semiconductor substrate, the second region including a non-patterning region, forming a liner layer on the protective insulating layer, planarizing the interlayer insulating layer by using the liner layer as an etching mask to expose top surfaces of the dummy gate structures, forming openings by removing the dummy gate structures to expose the semiconductor substrate between the spacers, and forming gate structures including a gate insulating layer and metal gate electrodes, in the openings.Type: GrantFiled: January 12, 2017Date of Patent: April 9, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Yong-ho Jeon, Dae-hyun Jang, Seung-seok Ha, Young-ju Park, Sun-ki Min
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Patent number: 10186457Abstract: A semiconductor device includes an active pattern, a gate electrode, a gate capping pattern, and a gate spacer. The active pattern extends in a first direction parallel to a top surface of the substrate. The gate electrode extends in a second direction parallel to the top surface of the substrate and intersects the active pattern. The gate capping pattern covers a top surface of the gate electrode and extends in a direction crossing the top surface of the substrate to cover a first sidewall of the gate electrode. The gate spacer covers a second sidewall of the gate electrode. The first sidewall and the second sidewall are opposite to each other in the second direction.Type: GrantFiled: October 26, 2017Date of Patent: January 22, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sungwoo Myung, GeumJung Seong, Jisoo Oh, JinWook Lee, Dohyoung Kim, Yong-Ho Jeon
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Patent number: 10172605Abstract: The present subject matter relates to a surgical retractor. The surgical retractor includes: a movable body part which is inserted into a body; a hook part which is connected with the movable body part inside the body and pulls out an object that is inside of the body; and an operating part for operating, from the outside of the body, the movement of the movable body part inside the body.Type: GrantFiled: June 17, 2013Date of Patent: January 8, 2019Assignee: AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATIONInventors: Kil Yeon Lee, Moon Gu Lee, Yong Ho Jeon, Chan Woo Lee
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Publication number: 20180374859Abstract: Semiconductor devices including a dummy gate structure on a fin are provided. A semiconductor device includes a fin protruding from a substrate. The semiconductor device includes a source/drain region in the fin, and a recess region of the fin that is between first and second portions of the source/drain region. Moreover, the semiconductor device includes a dummy gate structure overlapping the recess region, and a spacer that is on the fin and adjacent a sidewall of the dummy gate structure.Type: ApplicationFiled: August 29, 2018Publication date: December 27, 2018Inventors: Sang-Jine Park, Kee-Sang Kwon, Do-Hyoung Kim, Bo-Un Yoon, Keun-Hee Bai, Kwang-Yong Yang, Kyoung-Hwan Yeo, Yong-Ho Jeon
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Patent number: 10096605Abstract: Semiconductor devices including a dummy gate structure on a fin are provided. A semiconductor device includes a fin protruding from a substrate. The semiconductor device includes a source/drain region in the fin, and a recess region of the fin that is between first and second portions of the source/drain region. Moreover, the semiconductor device includes a dummy gate structure overlapping the recess region, and a spacer that is on the fin and adjacent a sidewall of the dummy gate structure.Type: GrantFiled: August 18, 2017Date of Patent: October 9, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Jine Park, Kee-Sang Kwon, Do-Hyoung Kim, Bo-Un Yoon, Keun-Hee Bai, Kwang-Yong Yang, Kyoung-Hwan Yeo, Yong-Ho Jeon
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Patent number: 10058316Abstract: A surgical traction apparatus according to the present invention includes a moving body portion including a magnetic body and configured to be inserted into a body, a hook portion configured to be connected to the moving body portion inside the body and pull an object inside the body, an operating portion configured to operate the moving body portion to move inside the body while moving outside the body, and a magnet portion configured to be mounted on the operating portion and be with adjustable magnetic strength.Type: GrantFiled: May 14, 2015Date of Patent: August 28, 2018Assignee: AJOU UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATIONInventors: Moon Gu Lee, Yong Ho Jeon, Kil Yeon Lee, Jae Seung Kim
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Patent number: 10043889Abstract: The inventive concept relates to a semiconductor device and a method for fabricating the same. The semiconductor device comprises active patterns protruding from a substrate, an interlayer dielectric layer disposed on the substrate and including grooves exposing the active patterns, and gate electrodes in the grooves. The grooves include a first groove having a first width and a second groove having a second width greater than the first width. The gate electrodes include a first gate electrode in the first groove, and a second gate electrode in the second groove. Each of the first and second gate electrodes includes a first work function conductive pattern on a bottom surface and sidewalls of corresponding one of the first and second grooves, and a second work function conductive pattern on the first work function conductive pattern.Type: GrantFiled: October 3, 2017Date of Patent: August 7, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: GeumJung Seong, JinWook Lee, Dohyoung Kim, Sungwoo Myung, Jisoo Oh, Yong-Ho Jeon
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Patent number: 9984925Abstract: A semiconductor device, including a first fin-type pattern; a first gate spacer on the first fin-type pattern, intersecting the first fin-type pattern, and including an upper portion and a lower portion; a second gate spacer on the first fin-type pattern, intersecting the first fin-type pattern, and being spaced apart from the first gate spacer; a first trench defined by the first gate spacer and the second gate spacer; a first gate electrode partially filling the first trench; a first capping pattern on the first gate electrode and filling the first trench; and an interlayer insulating layer covering an upper surface of the capping pattern, a width of the upper portion of the first gate spacer decreasing as a distance from an upper surface of the first fin-type pattern increases, and an outer sidewall of the upper portion of the first gate spacer contacting the interlayer insulating layer.Type: GrantFiled: June 14, 2016Date of Patent: May 29, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yong-Ho Jeon, Sang-Su Kim, Cheol Kim, Yong-Suk Tak, Myung-Geun Song, Gi-Gwan Park
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Patent number: 9947672Abstract: Semiconductor devices including a dummy gate structure on a fin are provided. A semiconductor device includes a fin protruding from a substrate. The semiconductor device includes a source/drain region in the fin, and a recess region of the fin that is between first and second portions of the source/drain region. Moreover, the semiconductor device includes a dummy gate structure overlapping the recess region, and a spacer that is on the fin and adjacent a sidewall of the dummy gate structure.Type: GrantFiled: December 7, 2016Date of Patent: April 17, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-Jine Park, Kee-Sang Kwon, Do-Hyoung Kim, Bo-Un Yoon, Keun-Hee Bai, Kwang-Yong Yang, Kyoung-Hwan Yeo, Yong-Ho Jeon
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Publication number: 20180061958Abstract: A semiconductor device includes an active pattern, a gate electrode, a gate capping pattern, and a gate spacer. The active pattern extends in a first direction parallel to a top surface of the substrate. The gate electrode extends in a second direction parallel to the top surface of the substrate and intersects the active pattern. The gate capping pattern covers a top surface of the gate electrode and extends in a direction crossing the top surface of the substrate to cover a first sidewall of the gate electrode. The gate spacer covers a second sidewall of the gate electrode. The first sidewall and the second sidewall are opposite to each other in the second direction.Type: ApplicationFiled: October 26, 2017Publication date: March 1, 2018Inventors: Sungwoo MYUNG, GeumJung SEONG, Jisoo OH, JinWook LEE, Dohyoung KIM, Yong-Ho JEON
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Publication number: 20180033867Abstract: The inventive concept relates to a semiconductor device and a method for fabricating the same. The semiconductor device comprises active patterns protruding from a substrate, an interlayer dielectric layer disposed on the substrate and including grooves exposing the active patterns, and gate electrodes in the grooves. The grooves include a first groove having a first width and a second groove having a second width greater than the first width. The gate electrodes include a first gate electrode in the first groove, and a second gate electrode in the second groove. Each of the first and second gate electrodes includes a first work function conductive pattern on a bottom surface and sidewalls of corresponding one of the first and second grooves, and a second work function conductive pattern on the first work function conductive pattern.Type: ApplicationFiled: October 3, 2017Publication date: February 1, 2018Inventors: GeumJung SEONG, JinWook LEE, Dohyoung KIM, Sungwoo MYUNG, Jisoo OH, Yong-Ho JEON
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Publication number: 20170345825Abstract: Semiconductor devices including a dummy gate structure on a fin are provided. A semiconductor device includes a fin protruding from a substrate. The semiconductor device includes a source/drain region in the fin, and a recess region of the fin that is between first and second portions of the source/drain region. Moreover, the semiconductor device includes a dummy gate structure overlapping the recess region, and a spacer that is on the fin and adjacent a sidewall of the dummy gate structure.Type: ApplicationFiled: August 18, 2017Publication date: November 30, 2017Inventors: Sang-Jine Park, Kee-Sang Kwon, Do-Hyoung Kim, Bo-Un Yoon, Keun-Hee Bai, Kwang-Yong Yang, Kyoung-Hwan Yeo, Yong-Ho Jeon
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Patent number: 9806166Abstract: A semiconductor device includes an active pattern, a gate electrode, a gate capping pattern, and a gate spacer. The active pattern extends in a first direction parallel to a top surface of the substrate. The gate electrode extends in a second direction parallel to the top surface of the substrate and intersects the active pattern. The gate capping pattern covers a top surface of the gate electrode and extends in a direction crossing the top surface of the substrate to cover a first sidewall of the gate electrode. The gate spacer covers a second sidewall of the gate electrode. The first sidewall and the second sidewall are opposite to each other in the second direction.Type: GrantFiled: January 9, 2017Date of Patent: October 31, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sungwoo Myung, GeumJung Seong, Jisoo Oh, JinWook Lee, Dohyoung Kim, Yong-Ho Jeon