Abstract: A semiconductor package includes a first substrate, a first electronic component disposed on the first substrate, a second substrate disposed on the first substrate and provided with a cavity disposed in one surface of the second substrate, a first connection member connecting the first and second substrates to each other, a heat dissipation structure disposed on the second substrate and spaced apart from the first connection member, a second connection member disposed on the second substrate, and a via disposed on the second substrate, spaced apart from the heat dissipation structure, and connected to the first connection member. The second substrate includes a first region in which the cavity is disposed and a second region connected to the first substrate, and the heat dissipation structure is disposed in each of the first and second regions of the second substrate.

Abstract: Disclosed is a positive electrode active material including a core part represented by Chemical Formula 1 below and a shell part represented by Chemical Formula 2 below, the shell part surrounding the core part. Li(Nia1Mnb1Coc1)O2??[Chemical Formula 1] Li(Nia2Mnb2Coc2)MeyO2??[Chemical Formula 2] In the Chemical Formula 1 and the Chemical Formula 2, a1+b1+c1=1, a2+b2+c2+y=1, a1>a2, Me is at least one metal selected from the group consisting of Na, Al, Fe, Cu, Zn, Mg, Ca, B, Zr, Nb, and a combination thereof, and y is a total of moles of the at least one metal selected for the Me.

Abstract: The present invention relates to a method for improving muscle strength, and/or muscle mass by administering a composition containing as an active ingredient at least one selected from the group consisting of Akkermansia muciniphila cells, a culture thereof and a lysate thereof, and a method for preventing or treating muscle diseases where muscle strength and/or mass is weakened by sarcopenia, cachexia or muscle wasting.

Abstract: The present concept relates to a first principle-derived effective mass approximation simulation technology for accurate and efficient computational simulation of an optical property of a quantum nanostructure including creating an effective mass approximation (EMA) parameter through first principle density functional theory (DFT) calculation for a model nanostructure corresponding to a simulation target quantum nanostructure, performing EMA calculation using the EMA parameter created through the DFT calculation, and acquiring the optical property of the quantum nanostructure based on an electronic structure generated through the EMA calculation.

Abstract: An electronic component embedded substrate includes: an insulating material including a cavity formed in one surface thereof; a protective layer embedded in the insulating material and covering an entire bottom surface of the cavity; solders disposed on side surfaces of the cavity; and an electronic component disposed in the cavity and at least partially in contact with the solders, wherein the protective layer has a material different from that of the insulating material.

Abstract: A substrate structure and electronic device provide improved power integrity and simplified manufacturing. The substrate structure includes a first printed circuit board, having a first side and a second side opposing each other, and a plurality of passive components embedded in the first printed circuit board. The plurality of passive components includes a first group, including a plurality of first passive components disposed adjacent to each other, and a second group, including a plurality of second passive components disposed adjacent to each other. A smallest distance between the first and second groups is greater than at least one of a smallest distance between adjacent first passive components and a smallest distance between adjacent second passive components.

Abstract: A printed circuit board (PCB) includes a substrate including a first insulating layer and first wiring patterns disposed on the first insulating layer, an optical sensing chip including a vertical cavity surface emitting laser (VCSEL) and a photodiode, disposed on the first insulating layer to be in contact with at least one of the first wiring patterns, a transimpedance amplifier (TIA) chip disposed to be spaced apart from the optical sensing chip on the first insulating layer and disposed to be in contact with at least one first wiring pattern, different from the first wiring pattern connected to the optical sensing chip, among the first wiring patterns, and a dielectric layer stacked on the substrate and having a hole exposing the VCSEL and the photodiode of the optical sensing chip. The optical sensing chip and the transimpedance amplifier chip are connected through a wiring pattern disposed on the dielectric layer.

Abstract: The present invention relates to novel peptides having anti-inflammatory and tissue regenerative actions and uses thereof.

Abstract: A positive electrode additive for a lithium secondary battery can improve atmospheric stability. A method of manufacturing the same and a positive electrode for a lithium secondary battery includes the same. The positive electrode additive for a lithium secondary battery is used to manufacture the positive electrode for a lithium secondary battery and includes a lithium (Li)-based additive core and a coating layer of NbOXCy (0?x?2.5 and 0?y?1; where Nb=niobium, O=oxygen, C=carbon) formed on a surface of the additive core.

Abstract: A printed circuit board includes: a first board unit including a plurality of first insulating layers and a plurality of first wiring layers respectively disposed on or in the plurality of first insulating layers; a second board unit including one or more second insulating layers and one or more second wiring layers respectively disposed on or in the one or more second insulating layers; and a first passive device embedded in at least one of the first and second board units. The second board unit is disposed on the first board unit, and the first board unit has a second cavity passing through at least a portion of the plurality of first insulating layers on the first passive device based on a stacking direction of the plurality of first wiring layers.

Abstract: A printed circuit board including a first insulating layer; a plurality of first circuit patterns respectively disposed on the first insulating layer; and a plurality of second circuit patterns respectively disposed on the first insulating layer and respectively having a thickness, thinner than a thickness of each of the plurality of first circuit patterns. At least one of the plurality of first circuit patterns and at least one of the plurality of second circuit patterns are alternately and repeatedly arranged, and a method for manufacturing the printed circuit board, are provided.

Abstract: A printed circuit board and a method of manufacturing the same are provided. The printed circuit board includes a wiring substrate including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers and having a cavity penetrating through a portion of the plurality of insulating layers, a passive component disposed in the cavity and including an external electrode electrically connected to at least one of the plurality of wiring layers, and a bridge disposed on the passive component in the cavity and including one or more circuit layers electrically connected to the external electrode.

Abstract: Disclosed are a positive electrode additive material for a lithium secondary battery having an enhancement in atmospheric stability, a method for preparing the same, and a positive electrode for a lithium secondary battery including the same. The positive electrode material includes an core including a lithium component, and a coating layer formed on a surface of the core and including a compound having a formula of LiM?O3 wherein M? is Ta or Nb.

Abstract: Disclosed are a thin-film transistor and a method for manufacturing the same. The thin-film transistor includes: a substrate serving as a gate electrode; a gate insulating film formed on the substrate; a metal layer formed on the gate insulating film; a metal oxide layer formed on the metal layer and covering an entirety of a surface of the metal layer; a metal oxide semiconductor layer formed so as to cover an entirety of a surface of the metal oxide layer; and a source/drain electrode formed on the metal oxide semiconductor layer, wherein the thin-film transistor further comprises an oxygen depletion layer disposed in an area of the metal oxide semiconductor layer adjacent to the metal oxide layer, wherein the metal oxide semiconductor layer is obtained by crystallizing an amorphous metal oxide semiconductor layer under heat-treatment.

Abstract: A multilayer electronic component may include a first internal electrode layer including a first dielectric layer and first to fourth internal electrodes disposed to be spaced apart from each other on the first dielectric layer, a second internal electrode layer including a second dielectric layer and a fifth internal electrode disposed on the second dielectric layer, a body including a capacitance forming portion in which the first internal electrode layer and the second internal electrode layer are alternately disposed, a connection electrode penetrating through the first and second internal electrode layers, spaced apart from the first to fourth internal electrodes, and connected to the fifth internal electrode, first to fourth external electrodes disposed to be connected to the first to fourth internal electrodes, respectively, on the body, and a fifth external electrode disposed to be connected to the connection electrode on the body.

Abstract: An apparatus for measuring characteristics of a capacitor component includes a measurement terminal connected to a capacitor component, an inductor connected to the measurement terminal, and a controller generating characteristic information of the capacitor component based on LC resonance of the capacitor component and the inductor. The controller generates capacitance information of the capacitor component based on inductance, based on at least one of a resonant frequency and an amplitude of the LC resonance and the resonant frequency.

Abstract: A photonic integrated circuit embedded substrate may include: an embedded insulating layer on which a photonic integrated circuit is disposed, and at least one first insulating layer stacked on one surface of the embedded insulating layer. The at least one first insulating layer may have an optical path extending in a stacking direction of the at least one first insulating layer.

Abstract: The present disclosure relates to a printed circuit board. The printed circuit board includes: a plurality of insulating layers; a plurality of circuit layers disposed on at least one of an interior and an exterior of the plurality of insulating layers; and a reinforcing layer disposed on one surface of the plurality of insulating layers, and having a first opening having a first width and a second opening having a second width, different from the first width.

Abstract: A substrate structure includes a first printed circuit board having a first side and a second side opposing each other, and a plurality of passive components connected to the first side of the first printed circuit board. The plurality of passive components includes a first group, including a plurality of first passive components disposed adjacent to each other, and a second group, including a plurality of second passive components disposed adjacent to each other. A smallest distance between the first and second groups is greater than at least one of a smallest distance between adjacent first passive components of the plurality of first passive components and a smallest distance between adjacent second passive components of the plurality of second passive components. An electronic device includes a first printed circuit board disposed on a mainboard and having, on opposite sides thereof, a semiconductor chip and a plurality of passive components.

Abstract: A substrate having an electronic component embedded therein includes first and second insulating layers including first and second cavities, respectively, first and second electronic components disposed within the first and second cavities, respectively, a first adhesive layer disposed between the first and second insulating layers, and a connection member penetrating through at least a portion of the first adhesive layer. One end and the other end of the connection member are connected to the first and second electronic components, respectively.