Patents by Inventor Yong In
Yong In has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6526467Abstract: The present invention relates to a communication apparatus between processors for a switch and a method of the same which are capable of controlling a communication among a plurality of processors by providing a hub circuit at a switch.Type: GrantFiled: June 30, 1999Date of Patent: February 25, 2003Assignee: LG Information & Communications, Ltd.Inventor: Yong-In Joh
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Publication number: 20020185360Abstract: Step keys, a step key assembly, and a terminal having the step key assembly are disclosed. An individual step key includes a first slope portion inclined at a first predetermined angle, a second slope portion inclined at a second predetermined angle in the opposite direction to the first slope portion, a recess having a first height and opened under the first slope portion in the forward direction of the step key, a protrusion having a second height lower than the first height and extended from under the second slope portion in the rear direction of the step key, and an extension extended from under the first and second slope portions.Type: ApplicationFiled: July 31, 2002Publication date: December 12, 2002Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Gee-Hong Yoon, Young-Keun Lee, Young-Bae Ji, Yong-In Cho
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Publication number: 20020176042Abstract: A liquid crystal display device includes a substrate, an organic insulating film formed on the substrate, an alignment film having a first etch rate formed on the organic insulating film, and a silicon nitride layer having a second etch rate formed between the alignment film and the organic insulating film, wherein the first etch rate is different from the second etch rate.Type: ApplicationFiled: December 7, 2001Publication date: November 28, 2002Applicant: LG.Philips LCD Co., Ltd.Inventors: Kyo Ho Moon, Yong In Park
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Publication number: 20020142157Abstract: The present invention relates to an electroconductive adhesive tape used for electrical and electronic products to bond or fix an element to a support while maintaining an electrical conductivity between the element and support. The electroconductive adhesive tape comprises a perforated synthetic film, two metal plating layers respectively formed on both surfaces of the synthetic resin film, and a conductive adhesive layer formed on one of the metal plating layers. Made to be very thin, the film has the advantage of being flexible and high in tensile strength in addition to showing excellent electrical conductivity. The metal plating layers are integratedly formed through the perforations of the synthetic resin film, maintaining excellent electrical conductivity. Thus, the electroconductive adhesive tape maintains a desired strength while exhibiting a high flexibility and a high bondability.Type: ApplicationFiled: May 29, 2001Publication date: October 3, 2002Applicant: Shinwha Intertek Corp.Inventor: Yong-In Lee
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Publication number: 20020105604Abstract: An array substrate for a transflective liquid crystal display device, including a substrate; at least one gate line and at least one gate electrode formed on the transparent substrate; a gate-insulating layer formed over the at least one gate line and the at least one gate electrode; a silicon layer formed on the gate-insulating layer, the silicon layer being positioned above the at least one gate electrode; a source electrode and a drain electrode formed on the silicon layer and spaced apart from each other with the silicon layer overlapped therebetween, wherein the at least one gate electrode, the source electrode, the drain electrode, and the silicon layer define a thin film transistor (TFT); at least one data line; a first passivation layer covering the at least one data line; a transparent electrode formed on the first passivation layer; and a reflective electrode formed on the transparent electrode.Type: ApplicationFiled: October 31, 2001Publication date: August 8, 2002Inventors: Kyoung-Su Ha, Yong-In Park, Oh-Nam Kwon, Woong-Kwon Kim, Jae-Beom Choi, Kyoung-Muk Lee
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Publication number: 20020050599Abstract: An array substrate for a liquid crystal display device includes a flexible substrate, a buffer layer on the flexible substrate, a thin film transistor including a gate electrode, a source electrode and a drain electrode on the buffer layer, and a pixel electrode on the thin film transistor.Type: ApplicationFiled: October 26, 2001Publication date: May 2, 2002Applicant: LG.PHILIPS LCD CO., LTD.Inventors: Hyun-Kyu Lee, Yong-In Park
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Publication number: 20020022307Abstract: A method of forming a thin film transistor includes forming a gate electrode on a substrate, forming an organic layer over the substrate having the gate electrode, curing the organic layer in a first chamber, transferring the substrate having the organic layer from the first chamber to a second chamber without exposing the substrate having the organic layer to oxygen atmosphere during transfer, forming an active layer on the organic layer in the second chamber; and forming source and drain electrodes on the active layer.Type: ApplicationFiled: May 16, 2001Publication date: February 21, 2002Inventors: Yong-In Park, Woong-Kwon Kim
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Patent number: 6235385Abstract: An electrically conductive adhesive tape used for electrical and electronic products to bond or fix an element to a support while maintaining an electrical conductibility between the element and support. The conductive adhesive tape has a structure including a resin film, a metal layer formed over one surface of the resin film by depositing a conductive metal over the surface of the resin film, and a conductive adhesive layer coated over the metal layer. The metal layer has a net-shaped structure. In some cases, the metal layer may have a planar structure. The conductive adhesive tape has a very small thickness by virtue of its metal layer deposited to a very small thickness. Accordingly, the conductive adhesive tape maintains a desired strength while exhibiting a high flexibility and a high bondability, thereby exhibiting a superior conductibility. In the case in which the metal layer has a net-shaped structure, the tape has a structure having spaces where the metal layer does not exist.Type: GrantFiled: February 22, 1999Date of Patent: May 22, 2001Assignee: Shin Wha Products Co., Ltd.Inventor: Yong-In Lee
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Patent number: 6127958Abstract: An analog/digital (A/D) converting circuit is provided that stabilizes system operation, reduces power consumption in an analog circuit region and uses a selected metal-to-metal capacitor, which has a small parasitic capacitance value. The A/D converting circuit includes a first sample/hold amplifier for sampling/holding an analog input signal, a switch for selecting one of a signal outputted from the first sample/hold amplifier and a feedback signal and an A/D sub-converter for converting an analog signal outputted from the switch to a digital signal. A multiplying D/A converting block converts an output signal from the A/D sub-converter to an analog signal and amplifies a difference value obtained between the analog signal and the analog signal outputted from the switch. A second sample/hold amplifier samples/holds a signal outputted from the multiplying D/A converting block and outputs the feedback signal to the switch.Type: GrantFiled: September 10, 1998Date of Patent: October 3, 2000Assignee: Hyundai Electronics Industries Co., Ltd.Inventors: Dong-Young Chang, Jae-Yup Lee, Seung-Hoon Lee, Yong-In Park, Seung Woo Park
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Patent number: 6100833Abstract: A b-bit digital and analog converter of the present invention is relatively simple and non-expensive and monotonic with relatively high differential and integral non-linearities. The converter uses weighed current ratio to achieve decrease the number of current cells to provide a cumulative current which corresponds to the digital value on the input data bus. The converter includes preferably a plurality of upper current cells, at least one unit current cell and at least one lower current cell. The currents produced by the upper, lower and unit current cells have a predetermined weighed current ratio, and the number of the upper, unit and lower current cells are based on the weighed current ratio. Further, the plurality of upper current cells have a prescribed layout, and includes a group of cells where each current cell has reverse layout orientation compared to adjacent cells.Type: GrantFiled: July 28, 1998Date of Patent: August 8, 2000Assignee: LG Semicon Co., Ltd.Inventor: Yong In Park
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Patent number: 5994930Abstract: A frequency multiplier for controlling a pulse width maintains a desired pulse width irrespective of a semiconductor fabrication process variation. The multiplier includes a delay unit for delaying an input signal and an exclusive OR-gate for exclusively ORing the delayed signal from the delay unit and the input signal. The multiplier further includes inverters that sequentially invert the signal from the exclusive OR-gate and a low-pass filter that filters the signal from the exclusive OR-gate. A high electric potential comparator and low electric potential comparator are for comparing the signal from the low-pass filter with first and second voltage limits to output first and second switch control signals to the delay unit, respectively.Type: GrantFiled: December 11, 1997Date of Patent: November 30, 1999Assignee: LG Semicon Co., Ltd.Inventor: Yong-In Park
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Patent number: 5952461Abstract: The present invention relates to a process for preparing human proinsulin which is represented as a following chemical formula(I): ##STR1## wherein, R is an amino acid residue or a peptide which is degradable enzymatically or chemically; and, X is a linkage of an amino group of A-1 in insulin A chain and a carboxyl group of B-30 in insulin B chain which can be separated from the A chain or the B chain enzymatically or chemically, provided that a region from A-1 to A-21 is the insulin A chain and a region from B-1 to B-30 is the insulin B chain. In accordance with the present invention, human recombinant insulin precursor can be simply manufactured with a good reproducibility, since dissolution, sulfonation, concentration, desalting and purification are remarkably simplified, while increasing the yield of refolding reaction.Type: GrantFiled: January 20, 1998Date of Patent: September 14, 1999Assignee: Chong Kun Dang CorporationInventors: Chang-Kyu Kim, Yong-In Kim, Je-Nie Pheu, Jeong-Woo Shin, Sung-Jin Oh, Chung-Il Hong, Jung-Woo Kim, Wang-Sik Lee
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Patent number: 5844515Abstract: A b-bit digital and analog converter of the present invention is relatively simple and non-expensive and monotonic with relatively high differential and integral non-linearities. The converter uses weighed current ratio to achieve decrease the number of current cells to provide a cumulative current which corresponds to the digital value on the input data bus. The converter includes preferably a plurality of upper current cells, at least one unit current cell and at least one lower current cell. The currents produced by the upper, lower and unit current cells have a predetermined weighed current ratio, and the number of the upper, unit and lower current cells are based on the weighed current ratio. Further, the plurality of upper current cells have a prescribed layout, and includes a group of cells where each current cell has reverse layout orientation compared to adjacent cells.Type: GrantFiled: January 31, 1997Date of Patent: December 1, 1998Assignee: LG Semicon Co., LtdInventor: Yong In Park
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Patent number: 5838271Abstract: A b-bit digital and analog converter of the present invention is relatively simple and non-expensive and monotonic with relatively high differential and integral non-linearities. The converter uses weighed current ratio to achieve decrease the number of current cells to provide a cumulative current which corresponds to the digital value on the input data bus. The converter includes preferably a plurality of upper current cells, at least one unit current cell and at least one lower current cell. The currents produced by the upper, lower and unit current cells have a predetermined weighed current ratio, and the number of the upper, unit and lower current cells are based on the weighed current ratio. Further, the plurality of upper current cells have a prescribed layout, and includes a group of cells where each current cell has reverse layout orientation compared to adjacent cells.Type: GrantFiled: January 31, 1997Date of Patent: November 17, 1998Assignee: LG Semicon Co., Ltd.Inventor: Yong In Park
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Patent number: 5623264Abstract: A video digital/analog signal converter having a structure whereby the analog elements of the video D/A converter are separated from the digital elements of the video D/A converter and of arranging current cells of each of channels to one well. The present invention includes a Red-decoder group, a Green-decoder group, and a Blue-decoder group for decoding digital data of R, G, and B color channels, respectively, which are inputted in a state synchronized to R, G, and B clocks for controlling digital data of Red, Green, and Blue color channels. A plurality of data buses transfers digital data of R, G, and B color channel decoded at the R, G, and B decoder groups. First R, G, and B current cell matrixes generate current in response to digital data of the R, G, and B color data inputted from the data buses. Second R, G, and B current cell matrixes generates current in response to digital data of the R, G, and B color channel inputted through the data buses.Type: GrantFiled: November 4, 1994Date of Patent: April 22, 1997Assignee: Goldstar Electron Co., Ltd.Inventor: Yong-In Park
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Patent number: 5568146Abstract: A digital/analog converter comprising a coarse bit decoder for decoding M higher-order bits of an (M+N)-bit input digital signal, a fine bit decoder for decoding N lower-order bits of the (M+N)-bit input digital signal, a current scaler for classifying currents into a plurality of steps and outputting a selected one of the classified step currents in response to an output signal from the coarse bit decoder, a current/voltage converter for converting an output current from the current scaler into a voltage, a voltage elevator for outputting an output voltage from the current/voltage converter as a reference voltage, a voltage divider for dividing the reference voltage from the voltage elevator into a plurality of steps and outputting a selected one of the divided step voltages in response to a switching control signal from the fine bit decoder, and a current compensator for compensating for an amount of current flowing through the voltage divider to make the reference voltage in the voltage divider constant inType: GrantFiled: January 4, 1995Date of Patent: October 22, 1996Assignee: Goldstar Electron Co., Ltd.Inventor: Yong-In Park
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Patent number: 5198087Abstract: A process for preparing a magneto-optical recording medium is disclosed in which a recording layer is formed from a vertical magnetizing film made of amorphous metal having a magnetization facilitating axis in a vertical direction on a substrate material. A protective film layer of a metal or semi-metal oxide, nitride or sulphide as a main ingredient is formed on the recording layer in a vacuum chamber, and the surface energy of the protective film is raised by etching it with plasma. The close adhesion of a next applied photosetting resin layer is thereby improved.Type: GrantFiled: October 25, 1990Date of Patent: March 30, 1993Assignee: SKC LimitedInventors: Jo Yung-Kuk, Jo Yong In, Yang Chang Sun
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Patent number: 4777391Abstract: A select buffer circuit includes a first inverter circuit, a second inverter circuit connected to the first, and a circuit for charging and discharging the base of an inverter transistor in the second inverter circuit from a node in the first inverter circuit. The charging and discharging circuit includes a Schottky diode connected to the inverter transistor, a Schottky transistor connected in series with the diode, and a resistor for coupling the base of the Schottky transistor to the node in the first inverter circuit. A bipolar multiplexer including the select buffer circuit offers the advantage of an improved output waveform.Type: GrantFiled: July 17, 1987Date of Patent: October 11, 1988Assignee: Signetics CorporationInventor: Yong-In Shin
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Patent number: 4740717Abstract: A switching device (22) responsive to an input voltage V.sub.A is powered by low and high internal supply voltages V.sub.L and V.sub.H. The device changes state as V.sub.A -V.sub.L passes a threshold voltage V.sub.T. After the device makes a desired change of state in response to rising V.sub.A, a hysteresis circuit (24) temporarily decreases V.sub.T below that which would otherwise be present. Likewise, after the device makes a desired change of state in the opposite direction when V.sub.A is falling, the hysteresis circuit temporarily decreases V.sub.T. In both cases, V.sub.T later automatically returns to its original value. This dynamic hysteresis prevents spikes in V.sub.L and V.sub.H from causing undesired changes in state.Type: GrantFiled: November 25, 1986Date of Patent: April 26, 1988Assignee: North American Philips Corporation, Signetics DivisionInventors: Thomas D. Fletcher, Yong-In Shin