Abstract: Provided are a phase-locked loop (PLL) receiving an input clock and generating a clock, a display using the PLL, and a method for a timing controller to generate a clock using the PLL. The display includes a timing controller configured to generate a first clock using a PLL, insert the first clock into data, and transmit the data into which the first clock is inserted, transmission lines configured to transfer the data into which the first clock is inserted, and data-driver integrated circuits (ICs) configured to receive the data into which the first clock is inserted, separate the first clock from the data, and drive data lines of a liquid crystal panel on the basis of the first clock and the data.

Abstract: A display device and method are provided. The display device includes a timing controller configured to insert a clock between data and transmit the data in which the clock has been inserted, transmission lines configured to transfer the data in which the clock has been inserted, and data driver integrated circuits (ICs) configured to receive the data in which the clock has been inserted, separate the clock from the data, and drive data lines of a liquid crystal panel on the basis of the clock and the data. The timing controller includes a phase-locked loop (PLL) including an oscillator and an inductor-capacitor (LC) resonant circuit, and a reset signal generator configured to generate a reset signal causing the PLL to start coarse frequency tuning when initial power is applied or a frequency of an applied input clock changes.

Abstract: An apparatus and method for determining an abnormal ROM update in a portable terminal. The apparatus includes a ROM update unit for increasing a value of an update start counter when a ROM update process is performed, and increasing a value of an update finish counter when the ROM update process is finished. The ROM update unit loads the values of the update start counter and the update finish counter, and compares the values of the two counters to determine that the ROM update process has been normally performed before the portable terminal abnormally operates.

Abstract: A data driver circuit and a delay-locked loop (DLL) circuit that can operate normally in spite of errors, etc., caused when an analog data signal is applied to a display panel are provided. The data driver circuit receives a first data signal and a first clock signal and outputs a second data signal to be transmitted to a display panel. The data driver circuit includes a data driver for sampling the first data signal in response to a second clock signal and outputting the second data signal obtained by analog-converting the first data signal, a mask signal generator for generating a mask signal indicating presence within a predetermined time period measured from a point in time at which the second data signal begins to change, and a DLL for generating the second clock signal from the first clock signal.

Abstract: The present invention relates to a decoding circuit for a flat panel display, and more particularly to a decoding circuit for a flat panel display wherein a miniaturization is possible by reducing an area of the circuit. There is provided a decoding circuit comprising: a first decoder for selecting a predetermined number of gradation voltages from a plurality of gradation voltages according to a least significant bit or least significant bits of an image data; a second decoder for selecting one of the selected gradation voltages to be outputted to an output terminal according to a plurality of selection signals; and a third decoder for outputting the plurality of the selection signals according to a most significant bit or most significant bits of the image data, wherein a minimum length of gates of a plurality of MOSFETs included in the first decoder is shorter than that of a plurality of MOSFETS included in the second decoder.

Abstract: An optical pickup, photodetector, and optical drive adopting the optical pickup are provided. The optical pickup may include a light emitting system having a plurality of light sources corresponding to a plurality of mediums a light receiving system including a photodetector for converting light reflected from a medium into an electrical signal. The photodetector may include first and second light receiving sensors corresponding to the plurality of mediums, each of the first and second light receiving sensors comprising a plurality of regions, each region comprising a plurality of sectors. The plurality of regions of the first and second light receiving sensors may include shared sectors that are shared by the first and second light receiving sensors and exclusive sectors that are exclusively used in the first light receiving sensor or the second light receiving sensor.

Abstract: Provided is a signal generator. The signal generator includes an insulating substrate, a chip disposed on the insulating substrate and including an oscillator including a capacitance element determining a resonant frequency signal, and a plurality of conductive lines disposed on the same surface of the insulating substrate to be spaced apart from each other. At least one of the plurality of conductive lines is electrically connected with the oscillator and provides an inductance element determining the resonant frequency signal to the oscillator.

Abstract: An optical pickup device corresponding to an optical recording medium having a plurality of recording layers, and an optical drive using the device are provided. The optical pickup device includes a collimator lens disposed between an object lens and a light source. The collimator lens adjusts a focal length with respect to the optical recording medium, and the object lens focuses light passing through the collimator lens, on the optical recording medium. The object lens is optically optimized for an upper or second-upper recording layer of the optical recording medium.

Abstract: A data driver circuit and a delay-locked loop (DLL) are provided. The data driver circuit and DLL can operate normally in spite of errors, etc., caused when an analog data signal is applied to a display panel. The DLL, which receives a first clock signal and outputs a second clock signal, includes a phase detector for outputting a phase difference signal according to the first clock signal, the second clock signal and at least one delay signal, and a delay line for generating the second clock signal and the delay signal by delaying the first clock signal. Here, the phase difference signal has a value corresponding to a phase difference between the first clock signal and the second clock signal, according to the first clock signal or the second clock signal, and a value corresponding to a case in which there is no phase difference according to the delay signal, and a first delay that is a delay of the second clock signal with respect to the first clock signal changes according to the phase difference signal.

Abstract: Provided is a dishwasher. The dishwasher includes a dish rack receiving articles and a bottle rack. The bottle rack includes a rack body detachably coupled to the dish rack and one or more bottle tines coupled to a top portion of the rack body, for receiving articles having a bottle or cup shape.

Abstract: The present invention relates to a display, a timing controller and a data driver for transmitting a serialized multi-level data signal, and more particularly to a display, a timing controller and a data driver for transmitting a serialized multi-level data signal for reducing the number of wirings between the timing controller and the data driver, and for reducing an EMI component. The display of the present invention comprises a display panel, a scan driver, a timing controller and a plurality of data drivers, wherein the timing controller transmits a transmission signal including a serialized data signal to one of the plurality of the data drivers, wherein a level of the data signal is selected from at least four different levels according to a value of a data having a length of at least two bits, and wherein the data driver restores the data from the transmitted transmission signal.

Abstract: Provided are a data driving circuit, a display device, and a data driving method. The data driving circuit includes a clock generator configured to generate a clock signal from clock information included in a reception signal including the clock information, mode information and a body, a sampler configured to sample the reception signal according to the clock signal to obtain the mode information and the body that includes at least one of control information and data, a signal controller configured to determine whether or not the body corresponds to the control information with reference to the mode information, and generate a control signal corresponding to the control information according to a result of the determination, and a data driver configured to generate a data signal corresponding to the data according to the control signal.

Abstract: Provided are a display device and method. The display device includes a plurality of data driving integrated circuits (ICs) configured to receive reception signals, each of which includes data and load signal information indicating an application starting time point of the data, and apply parallel data signals corresponding to the data at the application starting time points according to the load signal information included in the reception signals, and a display panel configured to display an image according to the parallel data signals, wherein at least two of the data driving ICs apply parallel data signals at different application starting time points.

Abstract: A small portable power pack includes a fuel/air supply for mixing fuel, which is supplied from outside, with outside air, thereby providing mixed gas; a uniflow scavenging micro-engine for receiving mixed gas from the fuel/air supply and igniting mixed gas to explode; a control panel for operating and controlling the uniflow scavenging micro-engine; a capacitor battery for powering the control panel and the uniflow scavenging micro-engine. The portable power pack is easily carried and used without the restriction of spaces and sites.

Abstract: An optical pickup actuator which includes a base, a blade having an objective lens mounted thereon, a plurality of suspensions supporting the blade to be movable with respect to the base and forming an electroconductive path, and a magnetic circuit driving the blade according to a driving signal applied through the respective suspensions. The magnetic circuit includes a magnet fixed to the base, and a fine pattern coil installed on the blade at a position facing the magnet and having a track pattern coil, a focus pattern coil, and a tilt pattern coil independently driven by current applied through the suspensions and providing driving forces in a track direction, a focus direction, and a tilt direction of the blade.

Abstract: A display device includes a data line, a timing controller configured to apply a transmission signal corresponding to data bits to a data line during an active period in which the data bits are transmitted and apply a transmission clock signal to the data line during a blank period in which the data bits are not transmitted, and a data driver configured to sample the transmission signal (hereinafter, a reception signal) applied through the data line to recover the data bits and drive a display panel according to the recovered data bits. The display device can transmit a clock signal through the data line during the blank period.

Abstract: Provided are an apparatus and method for transmitting and receiving data bits. The apparatus includes a transmitter configured to generate a transmission signal corresponding to the data bits and having a periodic transition, a data line configured to transmit the generated transmission signal, and a receiver configured to generate a reception clock signal from the periodic transition of the transmission signal (“reception signal”) transmitted through the data line, sample the reception signal according to the generated reception clock signal to recover the data bits. Accordingly, it is possible to transmit clock information without a clock line separate from the data line.

Abstract: A display driving device includes a plurality of data drivers; and a timing controller including a data transmission unit. The data transmission unit transmits data to the data drivers, The data transmission unit controls an electrical signal based on a distance difference between each of the data drivers and the data transmission unit, to reduce distortion of the electrical signal and/or power consumption due to the distance difference, and transmits the controlled electrical signal. The electrical signal corresponds to the data.

Abstract: A data driver circuit and a delay-locked loop (DLL) are provided. The data driver circuit and DLL can operate normally in spite of errors, etc., caused when an analog data signal is applied to a display panel. The DLL, which receives a first clock signal and outputs a second clock signal, includes a phase detector for outputting a phase difference signal according to the first clock signal, the second clock signal and at least one delay signal, and a delay line for generating the second clock signal and the delay signal by delaying the first clock signal. Here, the phase difference signal has a value corresponding to a phase difference between the first clock signal and the second clock signal, according to the first clock signal or the second clock signal, and a value corresponding to a case in which there is no phase difference according to the delay signal, and a first delay that is a delay of the second clock signal with respect to the first clock signal changes according to the phase difference signal.

Abstract: A data driver circuit and a delay-locked loop (DLL) circuit that can operate normally in spite of errors, etc., caused when an analog data signal is applied to a display panel are provided. The data driver circuit receives a first data signal and a first clock signal and outputs a second data signal to be transmitted to a display panel. The data driver circuit includes a data driver for sampling the first data signal in response to a second clock signal and outputting the second data signal obtained by analog-converting the first data signal, a mask signal generator for generating a mask signal indicating presence within a predetermined time period measured from a point in time at which the second data signal begins to change, and a DLL for generating the second clock signal from the first clock signal.