Patents by Inventor Yong-Jin Jung
Yong-Jin Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10115943Abstract: The present invention provides a battery packing module that includes: a heat dissipation member having a plurality of insertion cylinders arranged in a lattice type and a through-hole formed between the insertion cylinders in a direction that is parallel to the longitudinal direction of the insertion cylinders, wherein the outer circumferential surfaces of adjacent insertion cylinders are connected to each other; a plurality of cylindrical battery cells inserted into the insertion cylinders and configured to make contact with the inner circumferential surfaces of the insertion cylinders; and packing plates coupled to the upper ends and lower ends of the battery cells, wherein the packing plates have a current flow hole formed therein through which electrodes of the battery cells are exposed and battery mounting recesses formed therein in which the battery cells are mounted.Type: GrantFiled: July 28, 2016Date of Patent: October 30, 2018Assignee: Korea Institute Of Energy ResearchInventors: Gang Chul Kim, Young Dug Pyo, Chong Pyo Cho, Young Min Woo, Jin Young Jang, Yong Jin Jung, Hae Kwang Kim, Oh Seuk Kwon, Chang Soo Jin
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Publication number: 20170125755Abstract: The present invention provides a battery packing module that includes: a heat dissipation member having a plurality of insertion cylinders arranged in a lattice type and a through-hole formed between the insertion cylinders in a direction that is parallel to the longitudinal direction of the insertion cylinders, wherein the outer circumferential surfaces of adjacent insertion cylinders are connected to each other; a plurality of cylindrical battery cells inserted into the insertion cylinders and configured to make contact with the inner circumferential surfaces of the insertion cylinders; and packing plates coupled to the upper ends and lower ends of the battery cells, wherein the packing plates have a current flow hole formed therein through which electrodes of the battery cells are exposed and battery mounting recesses formed therein in which the battery cells are mounted.Type: ApplicationFiled: July 28, 2016Publication date: May 4, 2017Inventors: Gang Chul KIM, Young Dug PYO, Chong Pyo CHO, Young Min WOO, Jin Young JANG, Yong Jin JUNG, Hae Kwang KIM, Oh Seuk KWON, Chang Soo JIN
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Patent number: 9110896Abstract: An active air flap apparatus for a vehicle may include a drive flap positional sensor connected with a drive shaft connecting an actuator and a drive flap and detecting a rotational angle of the drive flap, a driven flap pivotally connected with the drive flap through a link mechanism, a driven flap positional sensor connected with a driven shaft pivotally connected with the link member and detecting a rotational angle of the driven flap, and a controller determining whether the drive flap positional sensor, the driven flap positional sensor, a motor of the actuator, and the link member may be defective by monitoring a feedback voltage value of the drive flap positional sensor, a feedback voltage value of the driven flap positional sensor, and a current applied to the motor of the actuator.Type: GrantFiled: July 19, 2013Date of Patent: August 18, 2015Assignees: HYUNDAI MOTOR COMPANY, KIA MOTORS CORP., HYUNDAI MOBIS CO., LTD.Inventors: Phil Jung Jeong, In Cheol Kim, Yong Jin Jung, Sang Won Park
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Patent number: 8937483Abstract: A semiconductor package transferring apparatus is disclosed. The apparatus includes a tray that includes a front side and a rear side opposite the front side, the rear side including a plurality of package covering portions that each correspond to the shape of a semiconductor package and that are arranged to align with corresponding package loading portions on a front side of another tray. Each package covering portion has a surface configured to cover a semiconductor chip disposed below the surface. The apparatus further includes an anti-attachment portion disposed on the surface of one or more of the package covering portions. For each package covering portion on which an anti-attachment portion is disposed, the anti-attachment portion protrudes beyond the surface of the package covering portion.Type: GrantFiled: July 28, 2011Date of Patent: January 20, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Hyeck-Jin Jeong, Yong-Ki Park, Yong-Jin Jung, Heul-Seog Kim
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Publication number: 20140129078Abstract: An active air flap apparatus for a vehicle may include a drive flap positional sensor connected with a drive shaft connecting an actuator and a drive flap and detecting a rotational angle of the drive flap, a driven flap pivotally connected with the drive flap through a link mechanism, a driven flap positional sensor connected with a driven shaft pivotally connected with the link member and detecting a rotational angle of the driven flap, and a controller determining whether the drive flap positional sensor, the driven flap positional sensor, a motor of the actuator, and the link member may be defective by monitoring a feedback voltage value of the drive flap positional sensor, a feedback voltage value of the driven flap positional sensor, and a current applied to the motor of the actuator.Type: ApplicationFiled: July 19, 2013Publication date: May 8, 2014Applicants: Hyundai Motor Company, Hyundai Mobis Co., Ltd., Kia Motors Corp.Inventors: Phil Jung JEONG, In Cheol Kim, Yong Jin Jung, Sang Won Park
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Patent number: 8692662Abstract: A method of determining a failure of an active air flap, including determining whether or not an active air flap is in a non-openable state, if the active air flap is in the non-openable state, continuously checking a variation of the temperature of engine-cooling water, and if the variation is below a reference variation, interrupting the generation of failure-alert, and if the variation of the temperature of engine-cooling water is above the reference variation, processing whether to generate the failure-alert such that if the time taken to reach the variation is above a reference temperature time, interrupting the generation of failure-alert, and if the time is below the reference temperature time, generating the failure-alert.Type: GrantFiled: June 29, 2012Date of Patent: April 8, 2014Assignees: Hyundai Motor Company, Kia Motors Corp., Hyundai Mobis Co., Ltd.Inventors: Hee Sun Shin, Phil Jung Jeong, Jin Ho Kim, Yong Jin Jung, Sang Won Park
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Publication number: 20130147619Abstract: A method of determining a failure of an active air flap, including determining whether or not an active air flap is in a non-openable state, if the active air flap is in the non-openable state, continuously checking a variation of the temperature of engine-cooling water, and if the variation is below a reference variation, interrupting the generation of failure-alert, and if the variation of the temperature of engine-cooling water is above the reference variation, processing whether to generate the failure-alert such that if the time taken to reach the variation is above a reference temperature time, interrupting the generation of failure-alert, and if the time is below the reference temperature time, generating the failure-alert.Type: ApplicationFiled: June 29, 2012Publication date: June 13, 2013Applicants: Hyundai Motor Company, Hyundai Mobis Co. Ltd., Kia Motors CorporationInventors: Hee Sun SHIN, Phil Jung Jeong, Jin Ho Kim, Yong Jin Jung, Sang Won Park
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Publication number: 20120043253Abstract: A semiconductor package transferring apparatus is disclosed. The apparatus includes a tray that includes a front side and a rear side opposite the front side, the rear side including a plurality of package covering portions that each correspond to the shape of a semiconductor package and that are arranged to align with corresponding package loading portions on a front side of another tray. Each package covering portion has a surface configured to cover a semiconductor chip disposed below the surface. The apparatus further includes an anti-attachment portion disposed on the surface of one or more of the package covering portions. For each package covering portion on which an anti-attachment portion is disposed, the anti-attachment portion protrudes beyond the surface of the package covering portion.Type: ApplicationFiled: July 28, 2011Publication date: February 23, 2012Inventors: Hyeck-Jin Jeong, Yong-Ki Park, Yong-Jin Jung, Heul-Seog Kim
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Publication number: 20100164101Abstract: Disclosed is a ball land structure suitable for use with a semiconductor package. The ball land structure includes a ball land and a barrier on a core. The barrier may be configured to connect to the ball land so as to form a barrier hole between an edge of the ball land and an edge of the barrier thus exposing a portion of the core. A solder mask may be deposited on the ball land and a portion of the core exposed by the barrier hole so as to partially expose the core.Type: ApplicationFiled: December 22, 2009Publication date: July 1, 2010Inventors: Wang-Jae Lee, Yong-Jin Jung, Jung-Hyeon Kim
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Publication number: 20100052130Abstract: Provided is a semiconductor package. The semiconductor package includes a bonding wire electrically connecting a first package substrate and a second package substrate to each other and an insulating layer adhering the first package substrate and the second package substrate to each other and covering a portion of the bonding wire.Type: ApplicationFiled: August 27, 2009Publication date: March 4, 2010Inventors: HYUN-IK HWANG, YONG-JIN JUNG, KUNHO SONG
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Publication number: 20090166879Abstract: A semiconductor package includes a semiconductor chip, a package substrate, a first attaching member, a second attaching member, a connecting member and a molding member. The package substrate has a central region and an edge region. The first attaching member attaches the semiconductor chip to the central region of the package substrate. The second attaching member is arranged in the edge region of the package substrate. The second attaching member includes first attaching patterns extending in a first direction, and second attaching patterns extending in a second direction. The connecting member electrically connects the semiconductor chip to the package substrate. The molding member is attached to the package substrate using the second attaching member to molding the semiconductor chip.Type: ApplicationFiled: December 24, 2008Publication date: July 2, 2009Inventors: Kun-Ho Song, Yong-Jin Jung, Hyun-Ik Hwang
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Publication number: 20090126979Abstract: A semiconductor package circuit board has an indicator for specifying a location of a defective circuit board unit. The semiconductor package circuit board includes circuit board units arranged in an m-by-n matrix pattern. The indicator has marking areas arranged in an m-by-n matrix pattern so that the marking areas are marked in correspondence to locations of identified defective circuit board units of the circuit board units. An operator can readily put a defective mark on the indicator without any confusion. The operator or a sensor can readily recognize the defective mark. Since the indicator can be formed on the circuit board unit, the integration of the semiconductor package circuit board can be increased, and the productivity can be substantially improved. Furthermore, a pathway of the sensor can be reduced, and interferences that might occur if the sensor moves can be hindered.Type: ApplicationFiled: November 13, 2008Publication date: May 21, 2009Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ka-Eun CHAE, Wang-Jae LEE, Yong-Jin JUNG, Kun-Ho SONG
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Patent number: 7405105Abstract: Provided is a stack package using an anisotropic conductive film (ACF) for reducing thermal stresses exerted on chip scale packages (CSPs) during the initial manufacture of stack packages from a plurality of CSPs and for facilitating the repair and/or rework of stack packages incorporating CSPs while reducing the likelihood of damage to the CSPs. In the stack package including a plurality of CSPs stacked using an ACF, each CSP will typically include a circuit board, a semiconductor chip mounted on and electrically connected to the circuit board, and solder balls or other conductive structures arranged the semiconductor chip on the peripheral regions of the circuit board. Also provided are methods for the initial production of such stack packages and supplemental methods for the repair and rework of such stack packages.Type: GrantFiled: September 28, 2007Date of Patent: July 29, 2008Assignee: Samsung Electronics Co., Ltd.Inventors: Jun-Soo Han, Gil-Beag Kim, Sang-Young Kim, Yong-Jin Jung, Hyun-Ik Hwang
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Publication number: 20080136027Abstract: Provided is a method of bonding a wire of a semiconductor package, by which a loop height may be reduced and/or a bonding reliability may be enhanced. In the method, a ball bump may be formed on a bonding pad on a semiconductor chip using a capillary through which a wire may be supplied. The wire may then be cut from the ball bump using the capillary. Subsequently, the capillary may be moved to an interconnection corresponding to the bonding pad of the semiconductor chip to perform stitch bonding of the wire supplied through the capillary on the interconnection. The capillary may again be moved to the ball bump formed on the bonding pad to bond the wire on the ball bump.Type: ApplicationFiled: November 2, 2007Publication date: June 12, 2008Inventors: Tae-ho Moon, Sang-young Kim, Gil-beag Kim, Yong-jin Jung
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Publication number: 20080049402Abstract: A printed circuit board having supporting patterns is provided. The printed circuit board includes a base substrate having a circuit region and peripheral regions. The circuit region includes a plurality of unit cells arranged in a matrix, and the peripheral regions are located around the circuit region. Wires are located on the circuit region. First supporting bars are located on the peripheral regions and extend across the peripheral regions, and a plurality of supporting ribs traverse the first supporting bars.Type: ApplicationFiled: July 9, 2007Publication date: February 28, 2008Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jun-Soo HAN, Gil-Beag KIM, Yong-Jin JUNG
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Publication number: 20080026507Abstract: Provided is a stack package using an anisotropic conductive film (ACF) for reducing thermal stresses exerted on chip scale packages (CSPs) during the initial manufacture of stack packages from a plurality of CSPs and for facilitating the repair and/or rework of stack packages incorporating CSPs while reducing the likelihood of damage to the CSPs. In the stack package including a plurality of CSPs stacked using an ACF, each CSP will typically include a circuit board, a semiconductor chip mounted on and electrically connected to the circuit board, and solder balls or other conductive structures arranged the semiconductor chip on the peripheral regions of the circuit board. Also provided are methods for the initial production of such stack packages and supplemental methods for the repair and rework of such stack packages.Type: ApplicationFiled: September 28, 2007Publication date: January 31, 2008Inventors: Jun-Soo Han, Gil-Beag Kim, Sang-Young Kim, Yong-Jin Jung, Hyun-Ik Hwang
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Patent number: 7291925Abstract: Provided is a stack package using an anisotropic conductive film (ACF) for reducing thermal stresses exerted on chip scale packages (CSPs) during the initial manufacture of stack packages from a plurality of CSPs and for facilitating the repair and/or rework of stack packages incorporating CSPs while reducing the likelihood of damage to the CSPs. In the stack package including a plurality of CSPs stacked using an ACF, each CSP will typically include a circuit board, a semiconductor chip mounted on and electrically connected to the circuit board, and solder balls or other conductive structures arranged the semiconductor chip on the peripheral regions of the circuit board. Also provided are methods for the initial production of such stack packages and supplemental methods for the repair and rework of such stack packages.Type: GrantFiled: May 20, 2005Date of Patent: November 6, 2007Assignee: Samsung Electronics Co., Ltd.Inventors: Jun-Soo Han, Gil-Beag Kim, Sang-Young Kim, Yong-Jin Jung, Hyun-Ik Hwang
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Patent number: 7288436Abstract: A method for manufacturing a semiconductor chip package may include screen printing an adhesive on a substrate using a screen printing mask. The adhesive may be heated during a first curing process. A semiconductor chip may be attached to the adhesive on the substrate. The adhesive may be heated during a second curing process. The physical property of the adhesive may be transformed before and after a screen printing process to improve the operational performance and/or quality of the adhesive.Type: GrantFiled: December 6, 2004Date of Patent: October 30, 2007Assignee: Samsung Electronics, Co., Ltd.Inventors: Sang-Young Kim, Gil-Beag Kim, Yong-Jin Jung, Jun-Soo Han, Hyun-Ik Hwang
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Publication number: 20060118831Abstract: A semiconductor package may include a substrate having a first major surface supporting a substrate pad and a bump pad electrically connected to the substrate pad. The substrate may have a second major surface with a concave part. A substrate window may extend through the substrate and open at the concave part. A semiconductor chip may be mounted on the substrate. The semiconductor chip may have a chip pad exposed through the substrate windows. Additionally, a method may involve forming a concave part in the substrate.Type: ApplicationFiled: November 8, 2005Publication date: June 8, 2006Inventors: Hyun-Ik Hwang, Gil-Beag Kim, Sang-Young Kim, Yong-Jin Jung, Jun-Soo Han
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Publication number: 20060102996Abstract: Provided is a stack package using an anisotropic conductive film (ACF) for reducing thermal stresses exerted on chip scale packages (CSPs) during the initial manufacture of stack packages from a plurality of CSPs and for facilitating the repair and/or rework of stack packages incorporating CSPs while reducing the likelihood of damage to the CSPs. In the stack package including a plurality of CSPs stacked using an ACF, each CSP will typically include a circuit board, a semiconductor chip mounted on and electrically connected to the circuit board, and solder balls or other conductive structures arranged the semiconductor chip on the peripheral regions of the circuit board. Also provided are methods for the initial production of such stack packages and supplemental methods for the repair and rework of such stack packages.Type: ApplicationFiled: May 20, 2005Publication date: May 18, 2006Inventors: Jun-Soo Han, Gil-Beag Kim, Sang-Young Kim, Yong-Jin Jung, Hyun-Ik Hwang