Abstract: Provided are a nonvolatile memory device and a method of operating the same. The nonvolatile memory device in accordance with an embodiment of the inventive concept may include a string select line; a ground select line; a dummy word line adjacent to the ground select line; a first word line adjacent to the dummy word line; and a second word line disposed between the string select line and the first word line. The nonvolatile memory device is configured to apply a voltage to the dummy word line. When programming a memory cell connected to the first word line, a first dummy word line voltage lower than a voltage applied to the second word line is applied to the dummy word line. When programming a memory cell connected to the second word line, a second dummy word line voltage between a voltage applied to the first word line and the first dummy word line voltage is applied to the dummy word line.

Abstract: A semiconductor device includes a lower electrode, a supporting member enclosing at least an upper portion of the lower electrode, a dielectric layer on the lower electrode and the supporting member, and an upper electrode disposed on the dielectric layer. The supporting member may have a first portion that extends over an upper part of the sidewall of the lower electrode, and a second portion covering the upper surface of the lower electrode. The first portion of the supporting member protrudes above the lower electrode.

Abstract: A back light unit, in which bright lines produced from point light sources, light emitting diodes, in an oblique direction are removed, so that brightness can be uniformly maintained at a liquid crystal panel. The back light unit includes a prism light guide plate, light emitting diodes provided on one side of the prism light guide plate, and a bright-line dead section provided to the prism light guide plate so as to uniformly scatter light of each light condensing section generated by light emitted from the light emitting diodes, to prevent a spectrum of the light in a specific direction, and to prevent bright lines from being produced.

Abstract: A back light unit, in which bright lines produced from point light sources, light emitting diodes, in an oblique direction are removed, so that brightness can be uniformly maintained at a liquid crystal panel. The back light unit includes a prism light guide plate, light emitting diodes provided on one side of the prism light guide plate, and a bright-line dead section provided to the prism light guide plate so as to uniformly scatter light of each light condensing section generated by light emitted from the light emitting diodes, to prevent a spectrum of the light in a specific direction, and to prevent bright lines from being produced.

Abstract: An LCD includes an LCD panel, a light guiding plate including a light guiding plate main body disposed behind the LCD panel and a reflective polarizing layer formed on a surface of the light guiding plate main body to face the LCD panel, and a light source disposed on at least one side of the light guiding plate. The LCD has a high light efficiency by using a light guiding plate since a reflective polarizing layer is formed on the light guiding plate.

Abstract: A semiconductor memory device having a dummy active region is provided, which includes a plurality of parallel main active regions and a dummy active region coupled to ends of the main active regions. The main preferably active regions are arranged in a main memory cell array region and extend to or through a dummy cell array region surrounding the main memory cell array region. Further, the dummy active region is perpendicular to the main active regions. A redundancy cell array region may intervene between the main memory cell array region and the dummy cell array region. In this case, the main active regions are extended to the dummy cell array region through the redundancy cell array region.

Abstract: A semiconductor memory device having a dummy active region is provided, which includes a plurality of parallel main active regions and a dummy active region coupled to ends of the main active regions. The main preferably active regions are arranged in a main memory cell array region and extend to or through a dummy cell array region surrounding the main memory cell array region. Further, the dummy active region is perpendicular to the main active regions. A redundancy cell array region may intervene between the main memory cell array region and the dummy cell array region. In this case, the main active regions are extended to the dummy cell array region through the redundancy cell array region.

Abstract: A semiconductor memory device having a dummy active region is provided, which includes a plurality of parallel main active regions and a dummy active region coupled to ends of the main active regions. The main preferably active regions are arranged in a main memory cell array region and extend to or through a dummy cell array region surrounding the main memory cell array region. Further, the dummy active region is perpendicular to the main active regions. A redundancy cell array region may intervene between the main memory cell array region and the dummy cell array region. In this case, the main active regions are extended to the dummy cell array region through the redundancy cell array region.

Abstract: A semiconductor memory device having a dummy active region is provided, which includes a plurality of parallel main active regions and a dummy active region coupled to ends of the main active regions. The main preferably active regions are arranged in a main memory cell array region and extend to or through a dummy cell array region surrounding the main memory cell array region. Further, the dummy active region is perpendicular to the main active regions. A redundancy cell array region may intervene between the main memory cell array region and the dummy cell array region. In this case, the main active regions are extended to the dummy cell array region through the redundancy cell array region.

Abstract: The present invention relates to a polymer for a chemically amplified resist and a resist composition using the same. The present invention provides a polymer represented by the Formula (1) and a chemically resist composition for extreme ultraviolet light comprising the same. The chemically amplified resist composition comprising the polymer represented by the formula (1) of the present invention responds to mono wavelength in a micro-lithography process and can embody a micro-pattern of high resolution on a substrate.

Abstract: The present invention relates to a polymer for a chemically amplified resist and a resist composition using the same. The present invention provides a polymer represented by the Formula (1) and a chemically resist composition for deep ultraviolet light comprising the same, The chemically amplified resist composition comprising the polymer represented by the formula (1) of the present invention responds process and can embody a micro-paten of high resolution on a substrate.

Abstract: A semiconductor memory device having a dummy active region is provided, which includes a plurality of parallel main active regions and a dummy active region coupled to ends of the main active regions. The main preferably active regions are arranged in a main memory cell array region and extend to or through a dummy cell array region surrounding the main memory cell array region. Further, the dummy active region is perpendicular to the main active regions. A redundancy cell array region may intervene between the main memory cell array region and the dummy cell array region. In this case, the main active regions are extended to the dummy cell array region through the redundancy cell array region.

Abstract: The present invention relates to a polymer for a chemically amplified resist and a resist composition using the same. The present invention provides a polymer represented by the Formula (1) and a chemically resist composition for deep ultraviolet light comprising the same. The chemically amplified resist composition comprising the polymer represented by the formula (1) of the present invention responds to mono wavelength in a micro-lithography process and can embody a micro-pattern of high resolution on a substrate.

Abstract: A semiconductor memory device having a dummy active region is provided, which includes a plurality of parallel main active regions and a dummy active region coupled to ends of the main active regions. The main preferably active regions are arranged in a main memory cell array region and extend to or through a dummy cell array region surrounding the main memory cell array region. Further, the dummy active region is perpendicular to the main active regions. A redundancy cell array region may intervene between the main memory cell array region and the dummy cell array region. In this case, the main active regions are extended to the dummy cell array region through the redundancy cell array region.