Abstract: A liquid crystal display (LCD) device having a first substrate and a second substrate with liquid crystal sealed therebetween, includes a plurality of gate lines and data lines crossing each other on the first substrate; a gate driving section for driving the gate lines; a source driving section for precharging the data lines for a first time and supplying video signals to the data lines; and a precharge circuit section for precharging the data lines for a second time.

Abstract: A liquid crystal display and a method for fabricating the same include a first substrate having an active layer with source/drain regions formed therein, a gate line and a data line extending in directions perpendicular to each other formed thereon, a dummy gate insulating film and a dummy gate electrode both formed on the first substrate in fixed patterns isolated from the gate line, an interlayer insulating film on the first substrate inclusive of the dummy gate electrode with a step, a drain electrode formed on the interlayer insulating film to overlap on upper regions of the dummy gate electrode so as to be in contact with the drain region and have a step to the data line, the data line formed on the interlayer insulating having a step to the drain electrode, a passivation film formed on the interlayer insulating film inclusive of the dummy gate electrode and the data line, a contact hole formed to expose the drain electrode overlapped with the dummy gate electrode, and a pixel electrode overlapping upper

Abstract: An array substrate for use in a liquid crystal display device is fabricated by the steps of forming a buffer layer on a substrate; forming a polycrystalline-silicon active layer on the buffer layer, the said active layer having an island shape; forming a gate insulation layer on the buffer layer to cover the polycrystalline-silicon active layer; forming a first metal layer on the gate insulation layer; forming a second metal layer on the first metal layer; patterning the first and second metal layer to form a gate electrode, a gate line and a gate shorting bar; forming a source contact area and a drain contact area at both sides of the polycrystalline-silicon active layer; forming an interlayer insulator on the gate insulation layer to cover the patterned first and second metal layers; patterning the interlayer insulator and the gate insulation layer so as to form a first contact hole to the source contact area and the second contact hole to a drain contact area, patterning a portion of the interlayer insulat

Abstract: An array substrate of a liquid crystal display device includes a substrate, a plurality of gate lines disposed on the substrate, a plurality of data lines disposed perpendicular to the gate lines, a plurality of storage capacitors each having at least a first electrode disposed parallel to a corresponding gate line, a plurality of switching devices each electrically connected with the corresponding gate line and a corresponding data line, and a plurality of pixel electrodes each overlapping a portion of an nth storage capacitor and a portion of a (n−1)th storage capacitor.

Abstract: An in-plane switching mode liquid crystal display device comprises first and second substrates, a plurality of gate and data bus lines defining pixel regions and arranged on the first substrate, a plurality of data electrodes on same plane of the data bus lines these some parts are overlapped with adjacent gate bus line, a passivation layer on the data electrodes, a plurality of common electrodes on the passivation layer these some parts are overlapped with adjacent data electrodes, and a liquid crystal layer between the first and second substrates.

Abstract: The present invention relates to a thin film transistor (TFT), liquid crystal display (LCD) and fabricating methods thereof, and more particularly to a TFT having source/drain lines on which an insulating layer and an active layer are located lie on an insulated substrate, to an LCD using the TFT and fabricating methods of the TFT and LCD. The TFT has a BBC (Buried Bus Coplanar) structure by forming a source/drain line on a substrate and by forming a buffer layer which covers the source/drain line which simplifies the process by means of reducing the number of deposition steps. The BBC structure of TFT has a source/drain line on a substrate, an insulating layer covering the source/drain line and the entire disclosed surface and a coplanar structure on the insulating layer. The present invention also provides a data line in the TFT of the BBC structure having low resistance applicable to a wide-screen by means of forming both the buffer layer and the source/drain line with a sufficient thickness.

Abstract: A liquid crystal display (LCD) panel having electrostatic discharge (ESD) prevention circuitry. The LCD panel includes a plurality of gate lines connected to a gate driving circuit and a plurality of data lines connected to a data driving circuit, the gate lines and the data lines intersect to define a pixel array. The LCD panel further comprises a plurality of ESD prevention circuits each having at least one switching device and at least one control terminal connected to the switching device, each ESD prevention circuit connected between an end of a gate or data line and a common wire. The ends of the gate and data lines are thereby coupled in common by the common wire. The switching device is turned on by electrostatic voltages generated at the gate and/or data lines during LCD panel fabrication, and is turned off by control signals applied at the control terminal during panel testing and normal operation.

Abstract: A liquid crystal display apparatus time-divisionally drives data lines of a pixel matrix. The apparatus transfers output signals of at least two data driver integrated circuits to a plurality of data lines using at least two multiplexers. Further, it rearranged the video data before supplying the video data to at least two data driver integrated circuits. Accordingly, it is possible to reduce the number of the data driver integrated circuits required in the liquid crystal display apparatus and to simplify a wiring structure between the pixel matrix and the data driver integrated circuits.

Abstract: A connecting part of an outer circuit in a liquid crystal display panel includes a substrate and a plurality of pads on the substrate, where the pads are to be connected to the outer circuit. A first connecting wire is connected to one of said pads, the wire being arranged in a first direction. A second connecting wire is connected to another one of said pads, the second connecting wire being arranged in a second direction. The first and second connecting wires are formed to minimize overlapped areas over the pads at crossing points between the first and second connecting wires and the pads. The first connecting wire is bent toward the second direction at a point and connected to the driving circuit.

Abstract: The present invention relates to a thin film transistor and a fabricating method thereof which is applied to a buried bus coplanar type TFT wherein the source and drain wires are located on a substrate. The present invention includes an insulated substrate, a source electrode and a drain electrode on the insulated substrate, a first insulating layer on the insulated substrate wherein the first insulating layer has a predetermined pattern, an active layer on the first insulating layer wherein the active layer has a source region, a channel region and a drain region, a second insulating layer covering the active layer, and a gate electrode on the second insulating layer over the channel region.

Abstract: The present invention relates to a thin film transistor (TFT), liquid crystal display (LCD) and fabricating methods thereof, and more particularly to a TFT having source/drain lines on which an insulating layer and an active layer are located lie on an insulated substrate, to an LCD using the TFT and fabricating methods of the TFT and LCD. The TFT has a BBC (Buried Bus Coplanar) structure by forming a source/drain line on a substrate and by forming a buffer layer which covers the source/drain line which simplifies the process by means of reducing the number of deposition steps. The BBC structure of TFT has a source/drain line on a substrate, an insulating layer covering the source/drain line and the entire disclosed surface and a coplanar structure on the insulating layer. The present invention also provides a data line in the TFT of the BBC structure having low resistance applicable to a wide-screen by means of forming both the buffer layer and the source/drain line with a sufficient thickness.

Abstract: A liquid crystal display includes a substrate; a transistor over the substrate, the transistor having a gate, a source, and a drain; a passivation layer over the transistor; a light shielding layer over a portion of the passivation layer over the transistor; a planarization layer over the light shielding layer and the passivation layer, the planarization layer having a contact hole over one of the source and the drain; a pixel electrode over the planarization layer, the pixel electrode being connected to the one of the source and the drain through the contact hole; and an alignment layer over the pixel electrode.

Abstract: The present invention relates to a thin film transistor (TFT), liquid crystal display (LCD) and fabricating methods thereof, and more particularly to a TFT having source/drain lines on which an insulating layer and an active layer are located lie on an insulated substrate, to an LCD using the TFT and fabricating methods of the TFT and LCD. The TFT has a BBC (Buried Bus Coplanar) structure by forming a source/drain line on a substrate and by forming a buffer layer which covers the source/drain line which simplifies the process by means of reducing the number of deposition steps. The BBC structure of TFT has a source/drain line on a substrate, an insulating layer covering the source/drain line and the entire disclosed surface and a coplanar structure on the insulating layer. The present invention also provides a data line in the TFT of the BBC structure having low resistance applicable to a wide-screen by means of forming both the buffer layer and the source/drain line with a sufficient thickness.

Abstract: The present invention relates to a thin film transistor and a fabricating method thereof which is applied to a buried bus coplanar type TFT wherein the source and drain wires are located on a substrate. The present invention includes an insulated substrate, a source electrode and a drain electrode on the insulated substrate, a first insulating layer on the insulated substrate wherein the first insulating layer has a predetermined pattern, an active layer on the first insulating layer wherein the active layer has a source region, a channel region and a drain region, a second insulating layer covering the active layer, and a gate electrode on the second insulating layer over the channel region.

Abstract: A liquid crystal display includes a first substrate including a driver circuit having a plurality of driver wires and a pixel element array portion, a second substrate including a light-shielding layer and a color filter, and a liquid crystal material interposed between the first and second substrates, the light-shielding layer being formed to overlap with the drive wires with a minimum area.

Abstract: A liquid crystal display device (LCD) is provided which includes a plurality of gate lines and a plurality of signal lines arranged perpendicular to each other. A common line is formed on the periphery of a display portion of the LCD, and a static electricity preventing device having a first floating gate structure is connected between the gate line and common line, and a second floating gate structure is connected between the signal line and common line.

Abstract: A method is provided for fabricating a thin film transistor on a substrate. The method includes the steps of forming an active layer having a channel region on the substrate, forming an impurity-blocking mask covering the channel region and portions of the active layer outside the channel region adjacent the channel region, and doping impurities of a first conductivity type at a high density into portions of the active layer uncovered by the impurity-blocking mask to form impurity-doped regions in the active layer. The method further includes the steps of removing the impurity-blocking mask and thereafter performing a plasma treatment on the resultant structure using a plasma gas containing impurities of the first conductivity type to form LDD regions in the active layer between the channel region and the impurity-doped regions.

Abstract: A thin film transistor for a liquid crystal display includes a substrate; an active layer having source and drain regions over the substrate; a first insulating layer adjacent to the active layer and having first and second surfaces, the first surface being on an opposite side to the second surface, and the active layer being adjacent to the second surface of the first insulating layer; a gate electrode adjacent to the first surface of the first insulating layer; a first electrode in contact with the source region; a second electrode in contact with the drain region; a second insulating layer on the second electrode; and a third insulating layer over a resultant structure of the substrate.

Abstract: A liquid crystal display includes a plurality of pixel TFTs in a matrix form on an insulating substrate, a plurality of drive circuit TFTs having a CMOS structure on the peripheral portion of the pixel TFTs, the drive circuit TFTs including a first conductivity type TFT having the structure the same as the pixel TFT and a second conductivity type TFT having a structure different from the pixel TFT, a plurality of signal lines connected to the pixel TFTs, and a plurality of scanning lines crossing the signal lines.

Abstract: A thin film transistor for a liquid crystal display includes a substrate; an active layer having source and drain regions over the substrate; a first insulating layer adjacent to the active layer and having first and second surfaces, the first surface being on an opposite side to the second surface, and the active layer being adjacent to the second surface of the first insulating layer; a gate electrode adjacent to the first surface of the first insulating layer; a first electrode in contact with the source region; a second electrode in contact with the drain region; a second insulating layer on the second electrode; and a third insulating layer over a resultant structure of the substrate.