Patents by Inventor Yong Quan
Yong Quan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8803567Abstract: A frequency multiplier system, for outputting a single phase clock of N multiplied frequency after processing an inputted clock, N?2, includes a frequency divider receiving the inputted clock, an interpolator connected with the frequency divider, a phase equalizer connected with the interpolator, and a combinational logic circuit connected with the phase equalizer, wherein the frequency divider outputs an orthogonal clock having a two-phases frequency that is a half of the inputted clock to the interpolator, the interpolator outputs a 2N-phases clock to the phase equalizer, the phase equalizer homogenizes a phase skew of the 2N-phases clock, the combinational logic circuit synthesizes the homogenized 2N-phases clock into a single phase clock of N multiplied frequency. And a method of multiplying frequency is provided. The present invention does not need feedback circuits, and therefore is stable and fast-speed, saves area, and reduces energy consumption.Type: GrantFiled: August 12, 2011Date of Patent: August 12, 2014Assignee: IPGoal Microelectronics (SiChuan) Co., Ltd.Inventors: Yong Quan, Guosheng Wu
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Patent number: 8804891Abstract: A frequency detector includes a multi-phase clock generation unit, a sampling unit connected to the multi-phase clock generation unit and a digital logic unit connected to the sampling unit. An inputted single-phase clock is received by the multi-phase clock generation unit and transformed into a multi-phase clock. Inputted random data are received by the sampling unit and sampled by the multi-phase clock. Each data bit of the random data is divided into several sampling intervals according to a phase number of the multi-phase clock. The digital logic unit analyzes sampling values logically, judges the corresponding sampling interval of each sampling value and outputs signals for indicating that a frequency of the random data is higher or lower than the frequency of the single-phase clock based on differences in the corresponding sampling intervals of the sampling values at two adjacent times. A method for detecting frequencies is further provided.Type: GrantFiled: August 22, 2011Date of Patent: August 12, 2014Assignee: IPGoal Microelectronics (SiChuan) Co., Ltd.Inventors: Yong Quan, Guosheng Wu
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Patent number: 8747127Abstract: A receptacle connector includes a receiving slot, a mating plate slidably received in the receiving slot, an ejection mechanism, and a resetting mechanism. The mating plate is exposed at a front end of the receiving slot and is provided with a urging portion and a first engaging portion. The ejection mechanism is provided with a stopping portion for correspondingly stopping the urging portion, so that the ejection mechanism can drive the mating plate to slide outwards. The resetting mechanism is provided with a second engaging portion for being correspondingly engaged with the first engaging portion, so that the resetting mechanism can drive the mating plate to return to an original position.Type: GrantFiled: September 5, 2012Date of Patent: June 10, 2014Assignee: Lotes Co., Ltd.Inventors: Zhi Yong Zhou, Yong Quan Wu, Jun Liu, Chang Wei Huang
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Patent number: 8684775Abstract: An electrical connector includes an insulating body provided with a plurality of receiving holes, and a plurality of terminals respectively received in the receiving holes. Each of the terminals has a base and at least one elastic arm bent upwards and extending from the base. The elastic arm is provided with a contact portion. When the contact portion receives a force in a first stage, the elastic arm is deformed mainly due to compression, and when the contact portion continuously receives a force in a second stage, the elastic arm is deformed mainly due to bending. The normal force received by the terminal is rapidly increased in the first stage, and is reduced and maintained at the low level in the second stage.Type: GrantFiled: August 1, 2012Date of Patent: April 1, 2014Assignee: Lotes Co., Ltd.Inventors: Jun Liu, Yong Quan Wu
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Publication number: 20140004728Abstract: A receptacle connector includes a receiving slot, a mating plate slidably received in the receiving slot, an ejection mechanism, and a resetting mechanism. The mating plate is exposed at a front end of the receiving slot and is provided with a urging portion and a first engaging portion. The ejection mechanism is provided with a stopping portion for correspondingly stopping the urging portion, so that the ejection mechanism can drive the mating plate to slide outwards. The resetting mechanism is provided with a second engaging portion for being correspondingly engaged with the first engaging portion, so that the resetting mechanism can drive the mating plate to return to an original position.Type: ApplicationFiled: September 5, 2012Publication date: January 2, 2014Applicant: LOTES CO., LTD.Inventors: Zhi Yong Zhou, Yong Quan Wu, Jun Liu, Chang Wei Huang
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Publication number: 20130273779Abstract: An electrical connector includes an insulating body provided with a plurality of receiving holes, and a plurality of terminals respectively received in the receiving holes. Each of the terminals has a base and at least one elastic arm bent upwards and extending from the base. The elastic arm is provided with a contact portion. When the contact portion receives a force in a first stage, the elastic arm is deformed mainly due to compression, and when the contact portion continuously receives a force in a second stage, the elastic arm is deformed mainly due to bending. The normal force received by the terminal is rapidly increased in the first stage, and is reduced and maintained at the low level in the second stage.Type: ApplicationFiled: August 1, 2012Publication date: October 17, 2013Applicant: LOTES CO., LTD.Inventors: Jun Liu, Yong Quan Wu
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Patent number: 8540524Abstract: An electrical connector for electrically connecting a mating element to a motherboard includes an insulating body having two side surfaces disposed symmetrically, at least one rotating shaft protruding from the side surface, a casing including at least one side portion corresponding to the side surface, and at least one protruding block. The side portion of the casing extends backward to form a rotating portion. The rotating portion is disposed with an elongated hole. A distance between an edge of the elongated hole and an edge of the rotating portion is substantially a fixed value. A distance between the protruding block and the rotating shaft is equal to or slightly larger than the fixed value. The rotating shaft urges against the edge of the elongated hole of the casing, and the protruding block urges against the edge of the rotating portion of the casing.Type: GrantFiled: April 11, 2012Date of Patent: September 24, 2013Assignee: Lotes Co., Ltd.Inventors: Chao Wen Cai, Yong Quan Wu
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Publication number: 20130237075Abstract: An electrical connector includes a base, a cover and at least one elastic member. The base is disposed with at least one fastening portion and at least one pivoting portion. The cover covers on the base, disposed with at least one locking portion correspondingly locking the fastening portion, and capable of being opened or closed relative to the base about the pivoting portion. The at least one elastic member press against the base. When the locking portion unlocks the fastening portion, the elastic member pops up automatically due to elasticity, so that an operating space is formed below the cover to allow an operator to open the cover with fingers, which facilitates operation and does not cause injuries of the fingers, thereby ensuring safe use.Type: ApplicationFiled: May 22, 2012Publication date: September 12, 2013Applicant: LOTES CO., LTD.Inventors: Jun Liu, Yong Quan Wu
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Patent number: 8523592Abstract: An electrical connector includes a base, a cover and at least one elastic member. The base is disposed with at least one fastening portion and at least one pivoting portion. The cover covers on the base, disposed with at least one locking portion correspondingly locking the fastening portion, and capable of being opened or closed relative to the base about the pivoting portion. The at least one elastic member press against the base. When the locking portion unlocks the fastening portion, the elastic member pops up automatically due to elasticity, so that an operating space is formed below the cover to allow an operator to open the cover with fingers, which facilitates operation and does not cause injuries of the fingers, thereby ensuring safe use.Type: GrantFiled: May 22, 2012Date of Patent: September 3, 2013Assignee: Lotes Co., Ltd.Inventors: Jun Liu, Yong Quan Wu
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Publication number: 20130210263Abstract: An electrical connector for electrically connecting a mating element to a motherboard includes an insulating body having two side surfaces disposed symmetrically, at least one rotating shaft protruding from the side surface, a casing including at least one side portion corresponding to the side surface, and at least one protruding block. The side portion of the casing extends backward to form a rotating portion. The rotating portion is disposed with an elongated hole. A distance between an edge of the elongated hole and an edge of the rotating portion is substantially a fixed value. A distance between the protruding block and the rotating shaft is equal to or slightly larger than the fixed value. The rotating shaft urges against the edge of the elongated hole of the casing, and the protruding block urges against the edge of the rotating portion of the casing.Type: ApplicationFiled: April 11, 2012Publication date: August 15, 2013Applicant: LOTES CO., LTD.Inventors: Chao Wen Cai, Yong Quan Wu
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Patent number: 8476950Abstract: A high-speed latch circuit includes a latching unit for latching an inputted signal, a signal input unit connected to the latching unit and a clock control unit connected to the signal input unit. The clock control unit includes a first switch element, a second switch element connected to the first switch element and an inverter connected to the second switch element. The first switch element and the inverter are both connected to a clock signal input end. The high-speed latch circuit of the present invention has a simple circuit structure, shortens the triggering time of the signal and reduces chances of wrong triggering.Type: GrantFiled: September 1, 2011Date of Patent: July 2, 2013Assignee: IPGoal Microelectronics (SiChuan) Co., Ltd.Inventors: Yong Quan, Guosheng Wu
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Publication number: 20130098976Abstract: A method for forming an electrical connector. In one embodiment, the method includes: providing a body, where a plurality of terminals are fixed in the body, each terminal has an extending portion exposed downwardly out of the body, and a soldering portion disposed at one end of the extending portion; providing a flat working surface and a plurality of solder materials, and placing the body above the flat working surface, so that the solder material is connected upwardly to the soldering portion, and connected downwardly to the flat working surface; heating the solder material, and then cooling and solidifying the solder material, so that the solder material is fixed to the soldering portion; and removing the flat working surface.Type: ApplicationFiled: February 17, 2012Publication date: April 25, 2013Applicant: LOTES CO., LTD.Inventors: Chao Wen Cai, Yong Quan Wu
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Publication number: 20130084737Abstract: An electrical connector includes an electrical connecting base, a press cover, a fastening member and at least one thrust member. The press cover covers on the electrical connecting base, and substantially horizontally placed. A fastening portion and a pivoting portion are respectively formed on two opposite ends of the press cover. The press cover is opened or closed relative to the electrical connecting base around the pivoting portion. The fastening member correspondingly presses against the fastening portion of the press cover when the press cover is horizontally placed. The at least one thrust member urges against the press cover upwards. When the fastening member is released from pressing against the fastening portion, the press cover is urged to pop up, so that an operating space is formed below the press cover, which is sufficient for an operator to open the press cover manually.Type: ApplicationFiled: February 15, 2012Publication date: April 4, 2013Applicant: LOTES CO., LTD.Inventors: Chao Wen Cai, Yong Quan Wu
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Patent number: 8253462Abstract: A duty cycle correction method includes detecting independently a relative delay time of two input differential signals; equating the sum of two relative delay time with the cycle of the input differential signals; and adjusting the two delay time to the same value. A corresponding implementation circuit includes two time delay units; two relative phase detectors connecting simultaneously with each of the two time delay units; a charge pump connecting with the output of each of the two relative phase detectors, with its output connecting to the two time delay units in order to form a loop; and a synthesis output unit connecting with both the time delay units, thereby generating output signals. The adjusting range of duty cycle becomes much wider. The implementation circuit is absolutely symmetrical, so a duty cycle with high accuracy can be obtain.Type: GrantFiled: August 2, 2010Date of Patent: August 28, 2012Assignee: IPGoal Microelectronics (SiChuan) Co., Ltd.Inventors: Guosheng Wu, Yong Quan
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Publication number: 20120134458Abstract: A frequency detector includes a multi-phase clock generation unit, a sampling unit connected to the multi-phase clock generation unit and a digital logic unit connected to the sampling unit. An inputted single-phase clock is received by the multi-phase clock generation unit and transformed into a multi-phase clock. Inputted random data are received by the sampling unit and sampled by the multi-phase clock. Each data bit of the random data is divided into several sampling intervals according to a phase number of the multi-phase clock. The digital logic unit analyses sampling values logically, judges the corresponding sampling interval of each sampling value and outputs signals for indicating that a frequency of the random data is higher or lower than the frequency of the single-phase clock based on differences in the corresponding sampling intervals of the sampling values at two adjacent times. A method for detecting frequencies is further provided.Type: ApplicationFiled: August 22, 2011Publication date: May 31, 2012Inventors: Yong Quan, Guosheng Wu
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Publication number: 20120068751Abstract: A high-speed latch circuit includes a latching unit for latching an inputted signal, a signal input unit connected to the latching unit and a clock control unit connected to the signal input unit. The clock control unit includes a first switch element, a second switch element connected to the first switch element and an inverter connected to the second switch element. The first switch element and the inverter are both connected to a clock signal input end. The high-speed latch circuit of the present invention has a simple circuit structure, shortens the triggering time of the signal and reduces chances of wrong triggering.Type: ApplicationFiled: September 1, 2011Publication date: March 22, 2012Inventors: Yong Quan, Guosheng Wu
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Publication number: 20120038395Abstract: A frequency multiplier system, for outputting a single phase clock of N multiplied frequency after processing an inputted clock, N?2, includes a frequency divider receiving the inputted clock, an interpolator connected with the frequency divider, a phase equalizer connected with the interpolator, and a combinational logic circuit connected with the phase equalizer, wherein the frequency divider outputs an orthogonal clock having a two-phases frequency that is a half of the inputted clock to the interpolator, the interpolator outputs a 2N-phases clock to the phase equalizer, the phase equalizer homogenizes a phase skew of the 2N-phases clock, the combinational logic circuit synthesizes the homogenized 2N-phases clock into a single phase clock of N multiplied frequency. And a method of multiplying frequency is provided. The present invention does not need feedback circuits, and therefore is stable and fast-speed , saves area, and reduces energy consumption.Type: ApplicationFiled: August 12, 2011Publication date: February 16, 2012Inventors: Yong Quan, Guosheng Wu
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Publication number: 20110114125Abstract: A method for cleaning a wafer stage is provided. First, a wafer stage with a wafer thereon is provided. Second, a leveling scanning step is carried out to examine the evenness of the wafer. The wafer is removed from the wafer stage once an abnormal evenness is detected. Afterwards, a vacuum cleaner device is used to in-situ clean the surface of the wafer stage after the wafer is removed.Type: ApplicationFiled: April 22, 2010Publication date: May 19, 2011Inventors: Yong-Quan Chen, Shu-Kuo Chiu
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Patent number: D655679Type: GrantFiled: August 25, 2011Date of Patent: March 13, 2012Assignee: Cheng Uei Precision Industry Co., Ltd.Inventors: Yong-Quan Li, Zhu-Rui Liu, Jui-Ming Chang
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Patent number: D679659Type: GrantFiled: September 1, 2011Date of Patent: April 9, 2013Assignee: Cheng Uei Precision Industry Co., Ltd.Inventors: Yong-Quan Li, Zhu-Rui Liu, Jui-Ming Chang