Patents by Inventor Yong Seok Eun

Yong Seok Eun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090004816
    Abstract: A method of forming an isolation layer in a semiconductor device using rapid vapor deposition to fill in a trench of the semiconductor device comprises forming a hydrophilic layer on the trench and forming a hydrophobic layer on a region other than the trench, and selectively forming a buried insulating layer in the trench using a catalytic reaction of the hydrophilic layer.
    Type: Application
    Filed: December 4, 2007
    Publication date: January 1, 2009
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: An Bae Lee, Yong Seok Eun, Su Ho Kim, Hye Jin Seo
  • Publication number: 20080160699
    Abstract: A method for fabricating a semiconductor device having a bulb-type recessed channel including forming a mask layer on the semiconductor substrate to expose a region where a trench for a bulb-type recessed channel can be formed, forming the trench in the semiconductor substrate, implanting dopant ions in three-dimensional radial directions with a predetermined tilt angle in the exposed region of the semiconductor substrate, removing the mask layer, forming a gate stack in the region including the trench, and forming a source/drain in the semiconductor substrate.
    Type: Application
    Filed: June 7, 2007
    Publication date: July 3, 2008
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Min Yong Lee, Yong Seok Eun, Dong Su Park, Jun Soo Chang
  • Publication number: 20070259499
    Abstract: A method for manufacturing a semiconductor device having recess gates includes forming an etch stop film on a semiconductor substrate; forming an etch stop film pattern selectively exposing the semiconductor substrate by patterning the etch stop film; forming a semiconductor layer on the semiconductor substrate; forming a hard mask film pattern exposing regions, for forming trenches for recess gates, on the semiconductor substrate; removing the semiconductor layer using the hard mask film pattern as a mask until the etch stop film pattern is exposed; forming the trenches for recess gates by removing the etch stop film pattern from the semiconductor substrate; and forming gate stacks, each of which is formed in the corresponding one of the trenches for recess gates.
    Type: Application
    Filed: December 29, 2006
    Publication date: November 8, 2007
    Applicant: Hynix Semiconductor Inc.
    Inventors: Yong Seok Eun, Su Ho Kim, An Bae Lee, Hai Won Kim
  • Patent number: 6974745
    Abstract: Disclosed is a method of manufacturing semiconductor devices, which can improve electrical characteristics of semiconductor devices.
    Type: Grant
    Filed: September 9, 2003
    Date of Patent: December 13, 2005
    Assignee: Hynix Semiconductor Inc.
    Inventors: Min Yong Lee, Yong Seok Eun
  • Patent number: 6949480
    Abstract: Disclosed is a method for depositing a silicon nitride layer of a semiconductor device. The method includes the steps of providing Al-based compound as a catalyst, and reacting DCS with NH3 by using the Al catalyst, thereby depositing the silicon nitride layer. DCS is reacted with NH3 by using the Al catalyst when depositing the silicon nitride layer, so dissolution of DCS is promoted by means of the Al catalyst, so that the silicon nitride layer is deposited at a high speed, thereby improving productivity of semiconductor devices. The silicon nitride layer is deposited by using DCS under a low-temperature condition of about 500 to 800° C., without deteriorating device characteristics.
    Type: Grant
    Filed: July 12, 2004
    Date of Patent: September 27, 2005
    Assignee: Hynix Semiconductor Inc.
    Inventors: Hyung Kyun Kim, Sung Hoon Jung, Yong Seok Eun
  • Publication number: 20050136575
    Abstract: Disclosed is a method for forming a gate of a semiconductor device. The method includes the steps of forming a first oxide layer on a substrate divided into a cell area and a peripheral circuit area, forming a photoresist film pattern on a cell area, thereby exposing a surface of the first oxide layer, removing the exposed first oxide layer formed in the peripheral circuit area, and then, removing the photoresist film, forming a second oxide layer on a surface of the silicon substrate, in which the first oxide layer of the peripheral circuit area is removed, and on a first gate oxide layer of the cell area, forming a poly silicon layer on the second oxide layer, forming a tungsten silicide layer on the poly silicon layer, and sequentially patterning the tungsten silicide layer, the poly silicon layer, the second oxide layer, and the first oxide layer.
    Type: Application
    Filed: July 12, 2004
    Publication date: June 23, 2005
    Inventors: Su Ho Kim, Sang Ho Woo, Yong Seok Eun
  • Publication number: 20040115924
    Abstract: Disclosed is a method of manufacturing semiconductor devices, which can improve electrical characteristics of semiconductor devices.
    Type: Application
    Filed: September 9, 2003
    Publication date: June 17, 2004
    Inventors: Min Yong Lee, Yong Seok Eun