Patents by Inventor Yong Soo Ahn

Yong Soo Ahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080197427
    Abstract: A method of forming double gate dielectric layers composed of an underlying oxide layer and an overlying oxy-nitride layer is provided to prevent degradation of gate dielectric properties due to plasma-induced charges. In the method, the oxide layer is thermally grown on a silicon substrate under oxygen gas atmosphere to have a first thickness, and then the oxy-nitride layer is thermally grown on the oxide layer under nitrogen monoxide gas atmosphere to have a second thickness smaller than the first thickness. The substrate may have a high voltage area and a low voltage area, and the oxide layer may be partially etched in the low voltage area so as to have a reduced thickness. The oxy-nitride layer behaves like a barrier, blocking the inflow of the plasma-induced charges.
    Type: Application
    Filed: April 24, 2008
    Publication date: August 21, 2008
    Applicant: DONGBU ELECTRONICS CO., LTD.
    Inventor: Yong Soo Ahn
  • Patent number: 7378319
    Abstract: A method of forming double gate dielectric layers composed of an underlying oxide layer and an overlying oxy-nitride layer is provided to prevent degradation of gate dielectric properties due to plasma-induced charges. In the method, the oxide layer is thermally grown on a silicon substrate under oxygen gas atmosphere to have a first thickness, and then the oxy-nitride layer is thermally grown on the oxide layer under nitrogen monoxide gas atmosphere to have a second thickness smaller than the first thickness. The substrate may have a high voltage area and a low voltage area, and the oxide layer may be partially etched in the low voltage area so as to have a reduced thickness. The oxy-nitride layer behaves like a barrier, blocking the inflow of the plasma-induced charges.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: May 27, 2008
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Yong Soo Ahn
  • Publication number: 20080081014
    Abstract: Disclosed herein is a rapid preparation process of aerogel. More specifically, the present invention relates to a rapid preparation process of aerogel which enables a considerable reduction in preparation time and preparation costs via simultaneous treatment of solvent exchange and surface-modification of hydrophilic-to-hydrophobic transition. The rapid preparation process comprises mixing a cation exchange resin with sodium silicate (water glass) as a starting material, and removing the sodium ion from the sodium silicate, to subject the sodium silicate to ion exchange; adding a base catalyst and an organosilane compound to the sodium silicate to subject the sodium silicate to gelation; aging the gellized silica gel at room temperature for 2 to 4 hours to discharge water from the silica gel and to modify the surface of the silica gel into hydrophobicity; and drying the hydrophobic silica gel at atmospheric pressure for 18 to 27 hours.
    Type: Application
    Filed: April 19, 2007
    Publication date: April 3, 2008
    Applicant: KOREA INSTITUTE OF ENERGY RESEARCH
    Inventors: Yong-Soo AHN, Jeong-Gu Yeo, Moon-Hee Han, Churl-Hee Cho, Sharad D. Bhagat, Yong-Ha Kim, Ho-Sung Park
  • Patent number: 7202157
    Abstract: A method for forming a metallic interconnect in a semiconductor device is disclosed. An example method forms an IDL on a substrate including predetermined devices, forms a via hole in the IDL, depositing a first metal diffusion preventive layer and a metal layer to form a via plug on the IDL, and performs a planarization process using the first metal diffusion preventive layer using as an etching stop layer. In addition, the example method forms a metallic interconnect on the first metal diffusion preventive layer, deposits the other metal diffusion preventive layer on the metallic interconnect, and etches a predetermined part of first and second metal diffusion preventive layers and the metallic interconnect using a mask pattern.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: April 10, 2007
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Yong Soo Ahn
  • Publication number: 20070075395
    Abstract: A capacitor of a semiconductor device and a method of fabricating a capacitor in a semiconductor device are disclosed. The capacitor may include a bottom electrode formed on a semiconductor substrate, an insulation layer having different regions having different thicknesses, and a top electrode over a region of the insulation layer that has a relatively great thickness.
    Type: Application
    Filed: October 2, 2006
    Publication date: April 5, 2007
    Inventor: Yong-Soo Ahn