Abstract: A printed circuit board includes an insulating layer and a circuit layer disposed on the insulating layer. The circuit layer includes a first circuit pattern and a second circuit pattern. Each of the first and second circuit patterns has a first side surface, a second side surface opposing the first side surface, and a top surface connected to ends of the first and second side surfaces, when viewed in a cross section direction. The first side surface of the first circuit pattern and the first side surface of the second circuit pattern face each other. A height of the first side surface of the first circuit pattern is greater than a height of the second side surface of the first circuit pattern, and a height of the first side surface of the second circuit pattern is greater than a height of the second side surface of the second circuit pattern.

Abstract: A connection structure embedded substrate includes: a printed circuit board including a plurality of first insulating layers and a plurality of first wiring layers, respectively disposed on or between the plurality of first insulating layers; and a connection structure disposed in the printed circuit board and including a plurality of internal insulating layers and a plurality of internal wiring layers, respectively disposed on or between the plurality of internal insulating layers. Among the plurality of internal wiring layers, an internal wiring layer disposed in one surface of the connection structure is in contact with one surface of a first insulating layer, among the plurality of first insulating layers.

Abstract: A connection structure embedded substrate includes: a printed circuit board including a plurality of first insulating layers and a plurality of first wiring layers, respectively disposed on or between the plurality of first insulating layers; and a connection structure disposed in the printed circuit board and including a plurality of internal insulating layers and a plurality of internal wiring layers, respectively disposed on or between the plurality of internal insulating layers. Among the plurality of internal wiring layers, an internal wiring layer disposed in one surface of the connection structure is in contact with one surface of a first insulating layer, among the plurality of first insulating layers.

Abstract: A connection structure embedded substrate includes a printed circuit board including a plurality of first insulating layers, and a plurality of first wiring layers disposed on or between the plurality of first insulating layers; and a connection structure embedded in the printed circuit board, and including a plurality of second insulating layers and a plurality of second wiring layers disposed on or between the plurality of second insulating layers. A lowermost second insulating layer of the plurality of second insulating layers includes an organic insulating material, and is in contact with an upper surface of one of the plurality of first insulating layers.

Abstract: A connection structure embedded substrate includes: a printed circuit board including a plurality of first insulating layers and a plurality of first wiring layers, respectively disposed on or between the plurality of first insulating layers; and a connection structure disposed in the printed circuit board and including a plurality of internal insulating layers and a plurality of internal wiring layers, respectively disposed on or between the plurality of internal insulating layers. Among the plurality of internal wiring layers, an internal wiring layer disposed in one surface of the connection structure is in contact with one surface of a first insulating layer, among the plurality of first insulating layers.

Abstract: A connection structure embedded substrate includes a printed circuit board including a plurality of first insulating layers, and a plurality of first wiring layers disposed on or between the plurality of first insulating layers; and a connection structure embedded in the printed circuit board, and including a plurality of second insulating layers and a plurality of second wiring layers disposed on or between the plurality of second insulating layers. A lowermost second insulating layer of the plurality of second insulating layers includes an organic insulating material, and is in contact with an upper surface of one of the plurality of first insulating layers.

Abstract: A printed circuit board includes an insulating layer and a circuit layer disposed on the insulating layer. The circuit layer includes a first circuit pattern and a second circuit pattern. Each of the first and second circuit patterns has a first side surface, a second side surface opposing the first side surface, and a top surface connected to ends of the first and second side surfaces, when viewed in a cross section direction. The first side surface of the first circuit pattern and the first side surface of the second circuit pattern face each other. A height of the first side surface of the first circuit pattern is greater than a height of the second side surface of the first circuit pattern, and a height of the first side surface of the second circuit pattern is greater than a height of the second side surface of the second circuit pattern.

Abstract: A printed circuit board includes a first insulating layer, an embedded pattern embedded in one surface of the first insulating layer, a pad formed on the one surface of the first insulating layer, and a post, wherein the center of a side surface of the post is in contact with the one surface of the first insulating layer.

Abstract: A package substrate includes a wiring substrate comprising an insulating layer, a first wiring layer, and a second wiring layer, wherein the first wiring layer comprises a first pad pattern, and the second wiring layer comprises a second pad pattern; a first passivation layer disposed on the insulating layer, and having a first opening portion passing through a region corresponding to at least a portion of the first pad pattern; a second passivation layer disposed on the insulating layer, and having a second opening portion passing through a region corresponding to at least a portion of the second pad pattern; and a reinforcing layer disposed on the second passivation layer, and having a through portion exposing the second opening portion. An upper surface of the first wiring layer is located in a position higher than a position of the lower surface of the insulating layer.

Abstract: A package substrate includes a wiring substrate comprising an insulating layer, a first wiring layer, and a second wiring layer, wherein the first wiring layer comprises a first pad pattern, and the second wiring layer comprises a second pad pattern; a first passivation layer disposed on the insulating layer, and having a first opening portion passing through a region corresponding to at least a portion of the first pad pattern; a second passivation layer disposed on the insulating layer, and having a second opening portion passing through a region corresponding to at least a portion of the second pad pattern; and a reinforcing layer disposed on the second passivation layer, and having a through portion exposing the second opening portion. An upper surface of the first wiring layer is located in a position higher than a position of the lower surface of the insulating layer.

Abstract: A printed circuit board includes a first insulating layer, an embedded pattern embedded in one surface of the first insulating layer, a pad formed on the one surface of the first insulating layer, and a post, wherein the center of a side surface of the post is in contact with the one surface of the first insulating layer.

Abstract: A printed circuit board includes a first insulating layer, an embedded pattern embedded in one surface of the first insulating layer, a pad formed on the one surface of the first insulating layer, and a post, wherein the center of a side surface of the post is in contact with the one surface of the first insulating layer.

Abstract: A package substrate includes an insulating layer; and circuit patterns formed on the insulating layer and divided into pad areas and pattern areas that have different heights. In one aspect, there can be a non-conductive paste (NCP) interposed between the circuit patterns and pads of a die connected to the circuit patterns to fix the die onto the insulating layer.

Abstract: A package substrate includes an insulating layer; and circuit patterns formed on the insulating layer and divided into pad areas and pattern areas that have different heights. In one aspect, there can be a non-conductive paste (NCP) interposed between the circuit patterns and pads of a die connected to the circuit patterns to fix the die onto the insulating layer.

Abstract: The present invention relates to an electronic component embedded printed circuit board and a method for manufacturing the same. An electronic component embedded printed circuit board of the present invention includes a core having a cavity; an electronic component inserted in the cavity and having a bonding coating layer on an outer peripheral surface; insulating layers laminated on and under the core and in contact with the bonding coating layer; and circuit patterns provided on the insulating layers.

Abstract: A hole plugging method for a printed circuit board, a hole plugging device in accordance therewith and a manufacturing method in accordance therewith where a mask for selectively exposing a via hole, a through hole and a surface pattern of the printed circuit board is positioned on the board having the via hole and the through hole to electrically connect circuit patterns formed on the surface of the board and in the board and an insulating material is plugged in the via hole by abutting and pushing the material on the surface of the board. Therefore, the insulating material can be plugged smoothly without a void, the processing is simplified by plugging the insulating material just to the height of the circuit pattern in a space between the circuit patterns and accordingly, damage to the circuit pattern can be prevented.

Abstract: A hole plugging method for a printed circuit board, a hole plugging device in accordance therewith and a manufacturing method in accordance therewith where a mask for selectively exposing a via hole, a through hole and a surface pattern of the printed circuit board is positioned on the board having the via hole and the through hole to electrically connect circuit patterns formed on the surface of the board and in the board and an insulating material is plugged in the via hole by abutting and pushing the material on the surface of the board. Therefore, the insulating material can be plugged smoothly without a void, the processing is simplified by plugging the insulating material just to the height of the circuit pattern in a space between the circuit patterns and accordingly, damage to the circuit pattern can be prevented.

Abstract: A printed circuit board (PCB) and method of forming same is performed without incoming lines for plating. The plating is preferably performed on ball pad areas and/or bonding pad areas being the top layer of a multi-layer PCB. A metal layer that later forms circuit patterns serves to supply a power for plating ball pads for solder-ball bonding and bonding pads for wire-bonding with gold (Au). Thus, the gold (Au)-plating is performed prior to forming the circuit patterns. A positive-type first photoresist is coated on the metal layer to form the ball pads and the bonding pads. The coated first photoresist is also used to form circuit patterns. The gold (Au)-plated metal layer of ball pad areas and the bonding pad areas are protected by a second photoresist, which is reactive with a larger quantity of light than the first photoresist. Both first and second photoresists can be concurrently developed.

Abstract: A hole plugging method for a printed circuit board, a hole plugging device in accordance therewith and a manufacturing method in accordance therewith where a mask for selectively exposing a via hole, a through hole and a surface pattern of the printed circuit board is positioned on the board having the via hole and the through hole to electrically connect circuit patterns formed on the surface of the board and in the board and an insulating material is plugged in the via hole by abutting and pushing the material on the surface of the board. Therefore, the insulating material can be plugged smoothly without a void, the processing is simplified by plugging the insulating material just to the height of the circuit pattern in a space between the circuit patterns and accordingly, damage to the circuit pattern can be prevented.

Abstract: A plating method for a printed circuit board includes: a first step of providing a substrate having a plurality of connection pads and circuit patterns connected to the connection pads; a second step of using some of the circuit patterns provided on a surface of the substrate as a power connection portion and connecting the power connection portion to an external power source; a third step of covering a surface of the substrate excepting the connection pads with a plating resistance resist to shield it; a fourth step of supplying power to the connection pad through the power connection portion and forming a gold-plated layer on the connection pad; and a fifth step of making the power connection portion and the external power source to be electrically short. With this method, a printed circuit board without a power supply line for gold-plating can be obtained.