Patents by Inventor Yong-Su Lee

Yong-Su Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240130171
    Abstract: A display may include flexible substrate, a blocking layer on the flexible substrate, a pixel on the flexible substrate and the blocking layer, and a scan line, a data line, a driving voltage line, and an initialization voltage line connected to the pixel. The pixel may include an organic light emitting diode, a switching transistor connected to the scan line, and a driving transistor to apply a current to the organic light emitting diode. The blocking layer is in an area that overlaps the switching transistor on a plane, and between the switching transistor and the flexible substrate, and receives a voltage through a contact hole that exposes the blocking layer.
    Type: Application
    Filed: December 8, 2023
    Publication date: April 18, 2024
    Applicant: Samsung Display Co., Ltd.
    Inventors: Seong Min WANG, Young-In HWANG, Yong Ho YANG, Yong Su LEE, Jae Seob LEE, Gyoo Chul JO
  • Publication number: 20240099064
    Abstract: A display device includes a semiconductor layer positioned on a substrate and including a driving transistor and a plurality of transistors; a gate conductive layer positioned on the semiconductor layer; and a data conductive layer positioned on the gate conductive layer. The driving transistor has a linear shape in which a plurality of grooves are formed.
    Type: Application
    Filed: August 2, 2023
    Publication date: March 21, 2024
    Applicant: Samsung Display Co., LTD.
    Inventors: Yong Su LEE, SEUNG-JUN LEE, JAEWOO LEE, Sung Chan JO
  • Publication number: 20240081099
    Abstract: An organic light emitting diode display according to an exemplary embodiment includes: a substrate; a first buffer layer on the substrate; a first semiconductor layer on the first buffer layer; a first gate insulating layer on the first semiconductor layer; a first gate electrode and a blocking layer on the first gate insulating layer; a second buffer layer on the first gate electrode; a second semiconductor layer on the second buffer layer; a second gate insulating layer on the second semiconductor layer; and a second gate electrode on the second gate insulating layer.
    Type: Application
    Filed: November 9, 2023
    Publication date: March 7, 2024
    Applicant: Samsung Display Co., Ltd.
    Inventors: Joon Woo BAE, So Young KOO, Han Bit KIM, Thanh Tien NGUYEN, Kyoung Won LEE, Yong Su LEE, Jae Seob LEE, Gyoo Chul JO
  • Patent number: 11925098
    Abstract: A display device includes a first transistor including a first active layer, a first gate electrode overlapping the first active layer, a gate insulating layer between the first active layer and the first gate electrode, a first source electrode, and a first drain electrode; a second transistor including a second active layer, a second gate electrode overlapping the second active layer, a second source electrode and a second drain electrode; a capacitor including a first capacitor electrode connected to the second transistor; a lower electrode disposed under the first active layer; a connecting member connecting the first active layer to the lower electrode; and a first metal pattern contacting the connecting member and disposed on a same layer with the first gate electrode.
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: March 5, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Myoung Geun Cha, Sang Gun Choi, Joon Woo Bae, Ji Yeong Shin, Yong Su Lee
  • Patent number: 11910664
    Abstract: A display device includes a substrate including a display area including a plurality of pixels, a peripheral area around the display area, and a bending area disposed in the peripheral area. A plurality of transistors is disposed in each pixel; a driving voltage line is disposed in the display area and transmits a driving voltage; a driving voltage transmission line is disposed in the peripheral area and is connected to the driving voltage line; and a conductive overlap layer overlaps at least one of the plurality of transistors.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: February 20, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Myoung Geun Cha, Sang Gun Choi, Ji Yeong Shin, Yong Su Lee
  • Publication number: 20240042320
    Abstract: A method for determining an action of a bot automatically playing a champion within a battlefield of League of Legends (LoL), and a computing system for performing same. The computing system comprising: an acquisition module for periodically acquiring observation data observable in the computer game at each predetermined observation unit time while a game is in progress in a battlefield of the computer game; an agent module for, when the acquisition module acquires observation data, determining an action that the bot is to execute, by using the acquired observation data and a predetermined policy network, wherein the policy network is a deep neural network that outputs a probability of each of multiple executable actions that the bot is able to execute; and a learning module for periodically learning the policy network at each predetermined learning unit time while a game is in progress in the battlefield.
    Type: Application
    Filed: October 4, 2023
    Publication date: February 8, 2024
    Inventors: Min Seo KIM, Yong Su LEE
  • Publication number: 20240023374
    Abstract: An organic light emitting diode display includes a first thin film transistor of which a channel is formed in a polycrystalline transistor, a second thin film transistor of which a channel is formed in an oxide semiconductor layer, an organic light emitting diode electrically connected to the first thin film transistor, a storage capacitor having a first electrode and a second electrode, wherein the second electrode of the storage capacitor is electrically connected to a gate electrode of the first thin film transistor, and an overlapping layer overlapping the oxide semiconductor layer in a plan view and receiving a positive voltage. The oxide semiconductor layer is positioned higher than the gate electrode of the first thin film transistor and the second electrode of the storage capacitor.
    Type: Application
    Filed: September 21, 2023
    Publication date: January 18, 2024
    Inventors: MYOUNG GEUN CHA, SANG GUN CHOI, SANG SUB KIM, JI YEONG SHIN, YONG SU LEE, KI SEOK CHOI
  • Patent number: 11864430
    Abstract: A display may include flexible substrate, a blocking layer on the flexible substrate, a pixel on the flexible substrate and the blocking layer, and a scan line, a data line, a driving voltage line, and an initialization voltage line connected to the pixel. The pixel may include an organic light emitting diode, a switching transistor connected to the scan line, and a driving transistor to apply a current to the organic light emitting diode. The blocking layer is in an area that overlaps the switching transistor on a plane, and between the switching transistor and the flexible substrate, and receives a voltage through a contact hole that exposes the blocking layer.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: January 2, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Seong Min Wang, Young-In Hwang, Yong Ho Yang, Yong Su Lee, Jae Seob Lee, Gyoo Chul Jo
  • Publication number: 20230422529
    Abstract: Disclosed herein are a multi-level device which has a ternary characteristic and can reduce hysteresis, and a method of manufacturing the same. The multi-level device can have a plurality of turn-on voltages, that is, a plurality of threshold voltages, thereby providing multi-level conductivity as a ternary device characteristic. In addition, a double insulating layer made of a dielectric layer and an organic polymer layer is used as a separation layer for channel layer separation, and by removing the hysteresis due to a trap charge at an interface between a channel layer and an insulating layer, a uniform ternary characteristic can always be maintained, and by forming the channel layer on an organic polymer layer, the channel layer can be more stably formed on the insulating layer.
    Type: Application
    Filed: January 27, 2023
    Publication date: December 28, 2023
    Applicant: POSTECH Research and Business Development Foundation
    Inventors: Byoung Hun LEE, Yong Su LEE
  • Patent number: 11856818
    Abstract: An organic light emitting diode display according to an exemplary embodiment includes: a substrate; a first buffer layer on the substrate; a first semiconductor layer on the first buffer layer; a first gate insulating layer on the first semiconductor layer; a first gate electrode and a blocking layer on the first gate insulating layer; a second buffer layer on the first gate electrode; a second semiconductor layer on the second buffer layer; a second gate insulating layer on the second semiconductor layer; and a second gate electrode on the second gate insulating layer.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: December 26, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Joon Woo Bae, So Young Koo, Han Bit Kim, Thanh Tien Nguyen, Kyoung Won Lee, Yong Su Lee, Jae Seob Lee, Gyoo Chul Jo
  • Publication number: 20230232671
    Abstract: An organic light emitting diode display includes a substrate, an overlap layer on the substrate, a semiconductor layer on the overlap layer, a first gate conductor on the semiconductor layer, a second gate conductor on the first gate conductor, a data conductor on the second gate conductor, a driving transistor on the overlap layer, and an organic light emitting diode connected with the driving transistor. The driving transistor includes, in the semiconductor layer, a first electrode, a second electrode, with a channel therebetween. A gate electrode of the first gate conductor overlaps the channel. The overlap layer overlaps the channel of the driving transistor and at least a portion of the first electrode. A storage line of the second gate conductor receives a driving voltage through a driving voltage line in the data conductor. The overlap layer receives a constant voltage.
    Type: Application
    Filed: March 16, 2023
    Publication date: July 20, 2023
    Applicant: Samsung Display Co., Ltd.
    Inventors: Joon Woo BAE, Mee Jae KANG, Thanh Tien NGUYEN, Kyoung Won LEE, Yong Su LEE, Jae Seob LEE, Gyoo Chul JO, Myoung Geun CHA
  • Publication number: 20230223478
    Abstract: A display device and method of fabricating the same are provided. The display device includes a substrate and a thin-film transistor formed on the substrate. The thin-film transistor includes a lower gate conductive layer disposed on the substrate, and a lower gate insulating film disposed on the lower gate conductive layer The lower gate insulating film includes an upper surface and sidewalls. The thin-film transistor includes an active layer disposed on the upper surface of the lower gate insulating film, the active layer including sidewalls. At least one of the sidewalls of the lower gate insulating film and at least one of the sidewalls of the active layer are aligned with each other.
    Type: Application
    Filed: March 17, 2023
    Publication date: July 13, 2023
    Applicant: Samsung Display Co., LTD.
    Inventors: Sang Sub KIM, Keun Woo KIM, Ji Yeong SHIN, Yong Su LEE, Myoung Geun CHA, Ki Seok CHOI, Sang Gun CHOI
  • Publication number: 20230215954
    Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
    Type: Application
    Filed: February 28, 2023
    Publication date: July 6, 2023
    Inventors: YONG SU LEE, Yoon Ho KHANG, Dong Jo KIM, Hyun Jae NA, Sang Ho PARK, Se Hwan YU, Chong Sup CHANG, Dae Ho KIM, Jae Neung Kim, Myoung Geun CHA, Sang Gab KIM, Yu-Gwang JEONG
  • Publication number: 20230131089
    Abstract: A display device is provided. A display device comprises a light emitting element disposed on a substrate, a driving transistor that provides a driving current to the light emitting element according to a voltage of a gate electrode, a first transistor supplying a data voltage to the gate electrode of the driving transistor, a first capacitor comprising a first capacitor electrode electrically connected to a first driving voltage line to which a first driving voltage is applied and a common capacitor electrode electrically connected to a first electrode of the first transistor, and a second capacitor comprising a second capacitor electrode electrically connected to the gate electrode of the driving transistor and the common capacitor electrode of the first capacitor, wherein the first capacitor electrode, the common capacitor electrode, and the second capacitor electrode overlap each other in a thickness direction of the substrate.
    Type: Application
    Filed: August 12, 2022
    Publication date: April 27, 2023
    Applicant: Samsung Display Co., LTD.
    Inventors: Seung Jun LEE, Yong Su LEE, Jae Woo LEE
  • Patent number: 11626429
    Abstract: A display device and method of fabricating the same are provided. The display device includes a substrate and a thin-film transistor formed on the substrate. The thin-film transistor includes a lower gate conductive layer disposed on the substrate, and a lower gate insulating film disposed on the lower gate conductive layer The lower gate insulating film includes an upper surface and sidewalls. The thin-film transistor includes an active layer disposed on the upper surface of the lower gate insulating film, the active layer including sidewalls. At least one of the sidewalls of the lower gate insulating film and at least one of the sidewalls of the active layer are aligned with each other.
    Type: Grant
    Filed: October 15, 2020
    Date of Patent: April 11, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sang Sub Kim, Keun Woo Kim, Ji Yeong Shin, Yong Su Lee, Myoung Geun Cha, Ki Seok Choi, Sang Gun Choi
  • Patent number: 11616108
    Abstract: An organic light emitting diode display includes a substrate, an overlap layer on the substrate, a semiconductor layer on the overlap layer, a first gate conductor on the semiconductor layer, a second gate conductor on the first gate conductor, a data conductor on the second gate conductor, a driving transistor on the overlap layer, and an organic light emitting diode connected with the driving transistor. The driving transistor includes, in the semiconductor layer, a first electrode, a second electrode, with a channel therebetween. A gate electrode of the first gate conductor overlaps the channel. The overlap layer overlaps the channel of the driving transistor and at least a portion of the first electrode. A storage line of the second gate conductor receives a driving voltage through a driving voltage line in the data conductor. The overlap layer receives a constant voltage.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: March 28, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Joon Woo Bae, Mee Jae Kang, Thanh Tien Nguyen, Kyoung Won Lee, Yong Su Lee, Jae Seob Lee, Gyoo Chul Jo, Myoung Geun Cha
  • Publication number: 20230068662
    Abstract: A display device includes a first transistor including a first active layer, a first gate electrode overlapping the first active layer, a gate insulating layer between the first active layer and the first gate electrode, a first source electrode, and a first drain electrode; a second transistor including a second active layer, a second gate electrode overlapping the second active layer, a second source electrode and a second drain electrode; a capacitor including a first capacitor electrode connected to the second transistor; a lower electrode disposed under the first active layer; a connecting member connecting the first active layer to the lower electrode; and a first metal pattern contacting the connecting member and disposed on a same layer with the first gate electrode.
    Type: Application
    Filed: November 8, 2022
    Publication date: March 2, 2023
    Applicant: Samsung Display Co., Ltd.
    Inventors: Myoung Geun CHA, Sang Gun CHOI, Joon Woo BAE, Ji Yeong SHIN, Yong Su LEE
  • Patent number: 11594639
    Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: February 28, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yong Su Lee, Yoon Ho Khang, Dong Jo Kim, Hyun Jae Na, Sang Ho Park, Se Hwan Yu, Chong Sup Chang, Dae Ho Kim, Jae Neung Kim, Myoung Geun Cha, Sang Gap Kim, Yu-Gwang Jeong
  • Publication number: 20220399428
    Abstract: A display device includes: a substrate; a transistor disposed on the substrate; a first electrode connected to the transistor; an emission layer disposed on the first electrode; a second electrode disposed on the emission layer; a common voltage line connected to the second electrode; and a third electrode and a fourth electrode disposed between the common voltage line and the second electrode.
    Type: Application
    Filed: March 7, 2022
    Publication date: December 15, 2022
    Inventors: Myoung Geun CHA, Sang Gun CHOI, Tae Wook KANG, Bum Mo SUNG, Yun Jung OH, Yong Su LEE
  • Patent number: D999228
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: September 19, 2023
    Assignee: AHAM CO., LTD.
    Inventors: Min Seo Kim, Yong Su Lee