Abstract: A method for forming a capacitor for use in a semiconductor device having electrode plugs surrounded by an insulating film and connected to underlying contact pads, includes sequentially forming an etch stop film and a mold oxide film on the insulating film and the electrode plugs, forming recesses in portions of the mold oxide film and the etching stopper film, the recesses exposing the electrode plugs, forming storage node electrodes in the recesses, filling the recesses in which the storage node electrodes are formed with an artificial oxide film, planarizing the storage node electrodes and the artificial oxide film so that the storage node electrodes are separated from one another, and selectively removing the mold oxide film and the artificial oxide film using a diluted hydrofluoric acid solution containing substantially no ammonium bifluoride.

Abstract: In a cleaning solution and a method of cleaning a semiconductor substrate, the cleaning solution includes about 1 to about 10 percent by weight of sulfuric acid, about 0.5 to about 5 percent by weight of aqueous hydrogen peroxide solution, and about 85 to about 98.5 percent by weight of hydrogen fluoric acid solution. Various polymers attached to a metal wiring formed on a substrate are removed by immersing the substrate into the cleaning solution. The substrate is rinsed to remove the cleaning solution remaining on the substrate. Thus, the polymers can be completely removed without damage to the metal wiring and an underlying oxide film.

Abstract: An instantaneous pressure reducing heating and drying apparatus for an object, such as a wafer, includes a pressure reducing chamber; a vacuum pump for reducing a pressure in the pressure reducing chamber to below atmospheric pressure; a drying chamber installed within the pressure reducing chamber for drying the object that is loaded in the drying chamber; a pressure regulating valve installed in a wall of the drying chamber, wherein when the pressure regulating valve is opened a pressure in the drying chamber is instantaneously reduced to the pressure of the pressure reducing chamber; and a heating means for heating the drying chamber. In operation, the vacuum pump reduces a pressure of the pressure reducing chamber to below atmospheric pressure, and the pressure regulating valve installed in a wall of the drying chamber opens thereby instantaneously reducing the pressure the drying chamber to the reduced pressure of the pressure reducing chamber.

Abstract: A method of forming a recess channel trench pattern for forming a recess channel transistor is provided. A mask layer is formed on a semiconductor substrate, which is then patterned to expose an active region and a portion of an adjacent device isolating layer with an isolated hole type pattern. Using this mask layer the semiconductor substrate and the device isolating layer portion are selectively and anisotropically etched, thereby forming a recess channel trench with an isolated hole type pattern. The mask layer may be patterned to be a curved line type. In this case, the once linear portion is curved to allow the device isolating layer portion exposed by the patterned mask layer to be spaced apart from an adjacent active region. The semiconductor substrate and the device isolating layer portion are then etched, thereby forming a recess channel trench with a curved line type pattern.

Abstract: For planarizing an IC (integrate circuit) material, a first slurry is dispensed for a first planarization of the IC material using the first slurry, and a second slurry is dispensed for a second planarization of the IC material using the second slurry. The first and second slurries are different. For example, the first slurry is silica based for faster planarization during the first planarization. Thereafter, the second planarization is performed with the second slurry that is ceria based with higher planarity for attaining sufficient planarization of the IC material.

Abstract: In a cleaning solution and a method of cleaning a semiconductor substrate, the cleaning solution includes about 1 to about 10 percent by weight of sulfuric acid, about 0.5 to about 5 percent by weight of aqueous hydrogen peroxide solution, and about 85 to about 98.5 percent by weight of hydrogen fluoric acid solution. Various polymers attached to a metal wiring formed on a substrate are removed by immersing the substrate into the cleaning solution. The substrate is rinsed to remove the cleaning solution remaining on the substrate. Thus, the polymers can be completely removed without damage to the metal wiring and an underlying oxide film.

Abstract: A wafer having a dielectric layer and an electrode partially protruding from the top surface of the dielectric layer is provided. The dielectric layer is etched with a chemical solution such as LAL. Prior to etching, the protruding portion of the electrode is removed or reduced to prevent any bubbles included in the chemical solution from adhering to the electrode. Thus, the chemical solution can etch the dielectric layers without being blocked by any bubbles included in a chemical solution.

Abstract: Provided is a method of fabricating a shallow trench isolation (STI) structure having a high aspect ratio and improved insulating properties. The exemplary method includes filling a shallow trench isolation region opening with an undoped polysilicon layer, removing an upper portion of the undoped polysilicon layer to form a second opening having a reduced aspect ratio relative to the original opening and filling the second opening with an insulating material to complete the STI structure. Additional protective layers including silicon oxide, silicon nitride and/or a capping layer may be provided on the sidewalls of the opening before depositing the undoped polysilicon.

Abstract: The chemical mechanical polishing (CMP) apparatus includes an insert pad that forms a local step on an upper surface of a polishing pad assembly. The insert pad is interposed between a rotatable platen and the polishing pad assembly.

Abstract: A wafer having a dielectric layer and an electrode partially protruding from the top surface of the dielectric layer is provided. An etchant or chemical solution is applied to the dielectric layer and bubbles in the etchant are prevented from adhering to the electrode. In one embodiment, prior to etching, the protruding portion is covered with a buffer layer to prevent bubbles in the etchant from adhering to the electrode. Thus, the etchant can etch the dielectric layers without being blocked by bubbles included therein.

Abstract: A method of forming a contact hole of a semiconductor device that is able to prevent excessive etching of an interlayer dielectric pattern includes forming a gate pattern including a first insulation layer pattern, a conductive layer pattern, a capping insulation layer pattern, and a second insulation layer pattern on a substrate; forming a spacer using an insulating material on a sidewall of the gate pattern; forming an interlayer dielectric on the substrate on which the gate pattern and the spacer are formed; forming a contact hole and an interlayer dielectric pattern for exposing the substrate by etching the interlayer dielectric; forming a liner spacer on a sidewall of the spacer and the interlayer dielectric pattern; and cleaning the resultant structure using a cleaning solution. The cleaning solution preferably includes includes ozone water and hydrogen fluoride (HF).

Abstract: A method of fabricating a semiconductor device including sequentially forming a polysilicon layer, a first insulating layer, and a photoresist layer over a gate oxide film positioned on a semiconductor substrate. A photoresist pattern with a first groove is formed by selectively patterning the photoresist layer to partially expose a surface of the first insulating layer. A second insulating layer is formed over the photoresist pattern with the first groove and over the exposed surface of the first insulating layer. A sacrificial spacer is formed on each inner wall of the first groove by etching back the second insulating layer and forming a second groove in the first insulating layer in communication with the first groove to expose a surface of the polysilicon layer at the bottom of the second groove. The photoresist pattern is removed, and an arbitrary layer pattern is formed over the polysilicon layer at the bottom of the second groove.

Abstract: After a silicidation blocking pattern is formed on a substrate including silicon, the silicidation blocking pattern is hardened by a thermal annealing process. The substrate is rinsed to remove a native oxide film formed on the substrate, and then a silicide film is formed on a portion of the substrate exposed by the silicidation blocking pattern. The silicide film can thus be formed in an exact portion of the substrate, and the substrate is not damaged during rinsing.

Abstract: A Local interconnection wiring structure method for forming the same reduces the likelihood of a short between a local interconnection layer of gate electrodes and an active region by forming a common aperture so as to have a determined aperture between the local interconnection layer and the active region on an insulation film of a semiconductor substrate. Methods of forming the local interconnection wire can include forming a first etching mask pattern that has a size longer than a length between inner ends of adjacent gate electrodes formed on a semiconductor substrate and covered with an insulation film. The etching mask simultaneously has a length the same as or shorter than the length between outer ends of the gate electrodes. The insulation film exposed in the first etching mask pattern is subsequently etched so that the insulation film remains higher than a highest height of the gate electrodes, so as to form a recess pattern.

Abstract: Etching compositions for selectively etching silicon germanium faster than other silicon containing compositions may be produced by controlling the ratios of de-ionized water used in the etching compositions with respect to the amounts of nitric acid, hydrofluoric acid, and/or acetic acid. Methods for selectively etching silicon germanium without damaging a silicon substrate or a silicon layer are possible using the etching compositions.

Abstract: A spin chuck for wafer processing includes: a rotary unit having a top surface adapted to receive and rotate a wafer; a plurality of wafer gripping units mounted on the rotary unit; a set of first gripping members; and a set of second gripping members. Each of the wafer gripping units has at least one of a first gripping member and a second gripping member that are configured to engage a wafer. The wafer gripping units are movable between first and second gripping positions, wherein in the first gripping position, the first gripping members are positioned to engage a wafer received on the rotary unit and the second gripping members are spaced apart from the wafer, and in the second gripping position, the second gripping members are positioned to engage the wafer, and the first gripping members are spaced apart from the wafer.

Abstract: A method of cleaning damaged layers and polymer residue on semiconductor devices includes mixing HF and ozone water in a vessel to form a solution of HF and ozone water, and dipping a semiconductor device in the vessel containing the solution of HF and ozone water. Preferably, ozone water is subsequently introduced into the vessel to replace the solution of HF and ozone water in the vessel.

Abstract: A method of forming a contact hole of a semiconductor device that is able to prevent excessive etching of an interlayer dielectric pattern includes forming a gate pattern including a first insulation layer pattern, a conductive layer pattern, a capping insulation layer pattern, and a second insulation layer pattern on a substrate; forming a spacer using an insulating material on a sidewall of the gate pattern; forming an interlayer dielectric on the substrate on which the gate pattern and the spacer are formed; forming a contact hole and an interlayer dielectric pattern for exposing the substrate by etching the interlayer dielectric; forming a liner spacer on a sidewall of the spacer and the interlayer dielectric pattern; and cleaning the resultant structure using a cleaning solution. The cleaning solution preferably includes includes ozone water and hydrogen fluoride (HF).

Abstract: In a cleaning solution and a method of cleaning a semiconductor substrate, the cleaning solution includes about 1 to about 10 percent by weight of sulfuric acid, about 0.5 to about 5 percent by weight of aqueous hydrogen peroxide solution, and about 85 to about 98.5 percent by weight of hydrogen fluoric acid solution. Various polymers attached to a metal wiring formed on a substrate are removed by immersing the substrate into the cleaning solution. The substrate is rinsed to remove the cleaning solution remaining on the substrate. Thus, the polymers can be completely removed without damage to the metal wiring and an underlying oxide film.

Abstract: Cleaning solutions for integrated circuit devices and methods of cleaning integrated circuit devices using the same are disclosed. The cleaning solution includes about 30% aqueous ammonia solution, acetic acid by a volume percent higher then a volume percent of the aqueous ammonia solution, and deionized water by a volume percent higher then the volume percent of the acetic acid. Additionally, disclosed are methods wherein the cleaning solution is formed on integrated circuit substrates having an exposed metal pattern formed thereon, and further providing mega-sonic energy to the film of the cleaning solution.