Abstract: Disclosed herein is a method for transmitting information using a monitor brightness change. The method may include generating a transmission data frame structure for transmitting digital information, encoding the bit of the digital information, and converting the encoded bit of the digital information into a wireless signal that is a brightness change signal of blue (B) color, among red, green, and blue (RGB) for configuring colors on a monitor.

Abstract: In the case of a gas in which several gases are mixed, a type and concentration of the gas may be incorrectly measured when measured using only an optical band-pass filter. The invention of the present application is directed to providing a technology in which a plurality of broadband band-pass filters having overlapping regions are provided to calculate a magnitude of absorption for each wavelength band for light passing through each broadband band-pass filter, thereby identifying the presence of a gas of interest and the presence of a gas other than the gas of interest.

Abstract: An electronic device includes a substrate with a conductive structure and a substrate encapsulant. The conductive structure has a lead with a lead via and a lead protrusion. The lead via can include via lateral sides defined by first concave portions and the lead protrusion can include protrusion lateral sides defined by second concave portions. The substrate encapsulant covers the first concave portions at a first side of the substrate but not the second concave portions so that the lead protrusion protrudes from the substrate encapsulant at a second side of the substrate. An electronic component can be adjacent to the first side of the substrate and electrically coupled to the conductive structure. A body encapsulant encapsulates portions of the electronic component and the substrate. The lead can further include a lead trace at the second side of the substrate.

Abstract: Disclosed are systems and methods for improving front-side process uniformity by back-side doping. In some implementations, a highly conductive doped layer can be formed on the back side of a semiconductor wafer prior to certain process steps such as plasma-based processes. Presence of such a back-side doped layer reduces variations in, for example, thickness of a deposited and/or etched layer resulting from the plasma-based processes. Such reduction in thickness variations can result from reduced variation in radio-frequency (RF) coupling during the plasma-based processes.

Abstract: Aspects of this disclosure relate to bulk acoustic wave devices that have a piezoelectric layer between a first electrode and a second electrode and a suspended frame structure that is suspended over a gap. The gap can be between the first electrode and the piezoelectric layer or between the second electrode and the piezoelectric layer. The bulk acoustic wave devices can have an inner raised frame portion inside of the suspended frame. The gap can be disposed between portions of the first and second electrodes that extend past an end of the piezoelectric layer. A conductive material can extend through an opening in a passivation layer at a location directly above the gap.

Abstract: Aspects of this disclosure relate to bulk acoustic wave devices that have a piezoelectric layer between a first electrode and a second electrode and a suspended frame structure that is suspended over a gap. The gap can be between the first electrode and the piezoelectric layer or between the second electrode and the piezoelectric layer. The bulk acoustic wave devices can have an inner raised frame portion inside of the suspended frame. The gap can be disposed between portions of the first and second electrodes that extend past an end of the piezoelectric layer. A conductive material can extend through an opening in a passivation layer at a location directly above the gap.

Abstract: A semiconductor device includes a substrate, a gate electrode disposed on an upper surface of the substrate, a source region disposed on a first side of the gate electrode, a drain region disposed on a second side of the gate electrode opposite to the first side of the gate electrode in a horizontal direction, and an insulating structure at least partially buried inside the substrate on the substrate. The insulating structure includes a first portion disposed between the substrate and the gate electrode, and a second portion in contact with the drain region. An uppermost surface of the second portion of the insulating structure is lower than an uppermost surface of the first portion of the insulating structure. At least a part of the gate electrode is disposed on the uppermost surface of the second portion of the insulating structure.

Abstract: An electronic device is provided. The electronic device includes a mounting surface configured to accept another electronic device, a holder recess provided in the mounting surface and configured to hold the other electronic device at certain angles, and a rotatable clip installed in the mounting surface, and configured to control at least one part of the other electronic device, wherein other electronic device is accommodated at one end by the holder recess, and is accommodated at another end by the rotatable clip, such that the other electronic device is combined with the electronic device.

Abstract: A semiconductor device includes a first well disposed in a substrate and including a first impurity of a first conductivity type, a second well disposed in the substrate, including a second impurity of a second conductivity type different from the first conductivity type, and having first to third portions, and a gate structure formed on the first well and the second well, wherein the second portion is disposed between the first portion and the third portion, the first portion and the third portion are formed deeper than the second portion, and concentration of the second impurity of the first portion and the third portion is greater than concentration of the second impurity of the second portion.

Abstract: According to example embodiments, a semiconductor device includes a first fin, a second fin that is separated from the first fin, and a gate on the first fin and the second fin. The gate crosses the first fin and the second fin. The first fin includes a first doped area at both sides of the gate. The first doped area is configured to have a first voltage applied thereto. The second fin includes a second doped area at both sides of the gate. The second doped area is configured to have a second voltage applied thereto. The second voltage is different than the first voltage.

Abstract: An electronic device is provided. The electronic device includes a mounting surface configured to accept another electronic device, a holder recess provided in the mounting surface and configured to hold the other electronic device at certain angles, and a rotatable clip installed in the mounting surface, and configured to control at least one part of the other electronic device, wherein other electronic device is accommodated at one end by the holder recess, and is accommodated at another end by the rotatable clip, such that the other electronic device is combined with the electronic device.

Abstract: An electronic device is provided. The electronic device includes a mounting surface configured to accept another electronic device, a holder recess provided in the mounting surface and configured to hold the other electronic device at certain angles, and a rotatable clip installed in the mounting surface, and configured to control at least one part of the other electronic device, wherein other electronic device is accommodated at one end by the holder recess, and is accommodated at another end by the rotatable clip, such that the other electronic device is combined with the electronic device.

Abstract: An apparatus for generating an image may include a plurality of scintillator layers configured to convert an incident beam into an optical signal; a plurality of micro cells configured to turn on or off depending on whether or not the micro cells detect the optical signal; a reaction depth determining unit configured to detect a decay pattern of the optical signal, on the basis of on/off signals of the micro cells, and configured to determine a type of the scintillator layers with which the incident beam has reacted; and/or a reading unit configured to decide an occurrence location of the incident beam and then generates a photographed image.

Abstract: A semiconductor device includes a first well disposed in a substrate and including a first impurity of a first conductivity type, a second well disposed in the substrate, including a second impurity of a second conductivity type different from the first conductivity type, and having first to third portions, and a gate structure formed on the first well and the second well, wherein the second portion is disposed between the first portion and the third portion, the first portion and the third portion are formed deeper than the second portion, and concentration of the second impurity of the first portion and the third portion is greater than concentration of the second impurity of the second portion.

Abstract: According to example embodiments, a semiconductor device includes a first fin, a second fin that is separated from the first fin, and a gate on the first fin and the second fin. The gate crosses the first fin and the second fin. The first fin includes a first doped area at both sides of the gate. The first doped area is configured to have a first voltage applied thereto. The second fin includes a second doped area at both sides of the gate. The second doped area is configured to have a second voltage applied thereto. The second voltage is different than the first voltage.

Abstract: According to example embodiments, a semiconductor device includes a first fin, a second fin that is separated from the first fin, and a gate on the first fin and the second fin. The gate crosses the first fin and the second fin. The first fin includes a first doped area at both sides of the gate. The first doped area is configured to have a first voltage applied thereto. The second fin includes a second doped area at both sides of the gate. The second doped area is configured to have a second voltage applied thereto. The second voltage is different than the first voltage.

Abstract: In one embodiment, a light-sensing apparatus includes a light-sensing pixel array that has a plurality of light-sensing pixels arranged in rows and columns; and a gate driver configured to provide the light-sensing pixels with a gate voltage and a reset signal that have inverted phases. Each of the light-sensing pixels includes a light sensor transistor configured to sense light and a switch transistor configured to output a light-sensing signal from the light-sensor transistor. The gate driver includes a plurality of gate lines connected to gates of the switch transistors, a plurality of reset lines connected to gates of the light sensor transistors, and a plurality of phase inverters each connected between a corresponding reset line and a gate line. Thus, when a gate voltage is applied to one of the plurality of gate lines, a reset signal with an inversed phase to the gate voltage may be applied to a corresponding reset line.

Abstract: According to example embodiments, a semiconductor device includes a first fin, a second fin that is separated from the first fin, and a gate on the first fin and the second fin. The gate crosses the first fin and the second fin. The first fin includes a first doped area at both sides of the gate. The first doped area is configured to have a first voltage applied thereto. The second fin includes a second doped area at both sides of the gate. The second doped area is configured to have a second voltage applied thereto. The second voltage is different than the first voltage.

Abstract: A semiconductor device includes a substrate having a first conductive type active region, a second conductive type drift region in the active region, a gate covering the active region on the drift region, a gate insulating film disposed between the active region and the gate, a second conductive type drain region in a location spaced apart from the gate in the drift region and having a higher doping concentration than that of the drift region, a first conductive type shallow well region spaced apart from the drain region in the drift region and between the gate and the drain region, and a second conductive type source region formed in the first conductive type shallow well region between the gate and the drain region and having a higher doping concentration than that of the first conductive type shallow well region.

Abstract: A key assembly which is configured to provide improved click feeling to a user and an electronic device having the same are provided. The key assembly includes a key body of elastic materials and contact projections, each of the contact projections which is protruded and formed from the key body and presses a switch device spaced apart from the key body by a gap providing a certain interval, wherein the key body is installed such that a contact surface of each of the contact projections is in contact with and pushed back by a certain distance by a pre-loading force of the switch device.