Patents by Inventor Yong Woo Lee

Yong Woo Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9649991
    Abstract: A structure for mounting a rear camera for a vehicle, may include a rear glass in which a mounting hole is perforated; a camera housing in which a camera module is embedded; and a wiper pivot which enters the mounting hole from an internal side of the rear glass, and has an end of an external side coupled with a wiper blade, in which the camera housing is mounted so that the wiper pivot passes through the camera housing, and is fixed between the wiper blade and the rear glass, in a manner that the camera housing is coupled so that the wiper pivot passes through an upper portion of the camera housing, and a camera module is located at a lower portion of the camera housing.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: May 16, 2017
    Assignees: Hyundai Motor Company, Kia Motor Corporation
    Inventors: Yong-Hun Lee, Soo-Kyoung Yang, Yong Lee, Sang-Sul Lee, Tae-Yub Kim, Ju-Yong Park, Yun-Seok Oh, Yong-Woo Lee
  • Patent number: 9653140
    Abstract: A memory device may include: an active controller configured to output a row active signal in response to a refresh control signal and a row enable signal when an active signal is activated; a refresh controller configured to generate and store a flag bit for controlling a refresh operation in response to a refresh signal, a precharge signal, and a precharge stop signal, and output the row enable signal corresponding to the stored flag bit to the active controller; and a cell array circuit configured to perform a refresh operation in memory cell array areas in response to the row active signal.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: May 16, 2017
    Assignee: SK hynix Inc.
    Inventors: Chang Hyun Kim, Min Chang Kim, Do Yun Lee, Yong Woo Lee, Jae Jin Lee, Hun Sam Jung, Hoe Kwon Jung
  • Publication number: 20170117363
    Abstract: A method of fabricating a semiconductor device is provided as follows. A channel layer is formed on a strain relaxed buffer (SRB) layer. A first etching process is performed on the channel layer and the SRB layer to form a plurality of trenches. The trenches penetrate through the channel layer and into the SRB layer to a first depth. First liners are formed on first sidewalls of the trenches having the first depth. The first liners cover the first sidewalls. A second etching process is performed on the SRB layer exposed through the trenches. The second etching process is performed on the SRB layer using a gas etchant having etch selectivity with respect to the first liners so that after the performing of the second etching process, the first liners remain on the first sidewalls.
    Type: Application
    Filed: May 3, 2016
    Publication date: April 27, 2017
    Inventors: DONG-KWON KIM, YONG-WOO LEE
  • Publication number: 20170109086
    Abstract: A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.
    Type: Application
    Filed: October 13, 2016
    Publication date: April 20, 2017
    Inventors: Min-Chang KIM, Chang-Hyun KIM, Do-Yun LEE, Yong-Woo LEE, Jae-Jin LEE, Hoe-Kwon JUNG
  • Publication number: 20170109069
    Abstract: A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.
    Type: Application
    Filed: October 13, 2016
    Publication date: April 20, 2017
    Inventors: Min-Chang KIM, Chang-Hyun KIM, Do-Yun LEE, Yong-Woo LEE, Jae-Jin LEE, Hoe-Kwon JUNG
  • Publication number: 20170110176
    Abstract: A memory device may include: an active controller configured to output a row active signal in response to a refresh control signal and a row enable signal when an active signal is activated; a refresh controller configured to generate and store a flag bit for controlling a refresh operation in response to a refresh signal, a precharge signal, and a precharge stop signal, and output the row enable signal corresponding to the stored flag bit to the active controller; and a cell array circuit configured to perform a refresh operation in memory cell array areas in response to the row active signal.
    Type: Application
    Filed: March 2, 2016
    Publication date: April 20, 2017
    Inventors: Chang Hyun KIM, Min Chang KIM, Do Yun LEE, Yong Woo LEE, Jae Jin LEE, Hun Sam JUNG, Hoe Kwon JUNG
  • Publication number: 20170109277
    Abstract: A memory system includes: a memory unit including first and second memories of different types; a processor separated from the memory unit, and suitable for executing an operating system (OS) and an application to access the data storage memory through the memory unit; and a combined memory controller suitable for transferring data between the memory unit and the processor.
    Type: Application
    Filed: October 14, 2016
    Publication date: April 20, 2017
    Inventors: Min-Chang KIM, Chang-Hyun KIM, Do-Yun LEE, Yong-Woo LEE, Jae-Jin LEE, Hun-Sam JUNG
  • Publication number: 20170109077
    Abstract: A memory system includes: a memory module including: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data and a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.
    Type: Application
    Filed: October 14, 2016
    Publication date: April 20, 2017
    Inventors: Yong-Woo LEE, Min-Chang KIM, Chang-Hyun KIM, Do-Yun LEE, Jae-Jin LEE, Hun-Sam JUNG
  • Publication number: 20170109072
    Abstract: A memory system includes a system main memory including first and second memories, wherein the first memory includes a cached subset of the second memory and the second memory includes a cached subset of a data storage memory; a processor suitable for executing an operating system (OS) and an application to access the data storage memory through the system main memory, wherein the system main memory is separated from the processor; a memory controller suitable for transferring data between the system main memory and the processor; and a write buffer suitable for buffering write data, based on which the second memory is updated.
    Type: Application
    Filed: October 14, 2016
    Publication date: April 20, 2017
    Inventors: Min-Chang KIM, Chang-Hyun KIM, Do-Yun LEE, Yong-Woo LEE, Jae-Jin LEE, Hun-Sam JUNG
  • Publication number: 20170109075
    Abstract: A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.
    Type: Application
    Filed: October 14, 2016
    Publication date: April 20, 2017
    Inventors: Yong-Woo LEE, Min-Chang KIM, Chang-Hyun KIM, Do-Yun LEE, Jae-Jin LEE, Hun-Sam JUNG
  • Publication number: 20170109074
    Abstract: A memory system includes: a system main memory including a first memory device and a second memory device, wherein each of the first and second memory devices maintains latency information thereof; a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the system main memory, wherein the system main memory is separated from the processor and the processor and the first and second memory devices are electrically coupled to one another through a common bus; and a memory controller suitable for transferring data between the system main memory and the processor.
    Type: Application
    Filed: October 14, 2016
    Publication date: April 20, 2017
    Inventors: Do-Yun LEE, Min-Chang KIM, Chang-Hyun KIM, Yong-Woo LEE, Jae-Jin LEE, Hun-Sam JUNG
  • Publication number: 20170109068
    Abstract: A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.
    Type: Application
    Filed: October 13, 2016
    Publication date: April 20, 2017
    Inventors: Min-Chang KIM, Chang-Hyun KIM, Do-Yun LEE, Yong-Woo LEE, Jae-Jin LEE, Hoe-Kwon JUNG
  • Publication number: 20170109073
    Abstract: A memory system includes: a plurality of first memory devices directly or indirectly coupled to one another, each first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a multi-processor including a plurality of processors, each processor executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.
    Type: Application
    Filed: October 14, 2016
    Publication date: April 20, 2017
    Inventors: Chang-Hyun KIM, Min-Chang KIM, Do-Yun LEE, Yong-Woo LEE, Jae-Jin LEE, Hoe-Kwon JUNG
  • Publication number: 20170109071
    Abstract: A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.
    Type: Application
    Filed: October 14, 2016
    Publication date: April 20, 2017
    Inventors: Min-Chang KIM, Chang-Hyun KIM, Do-Yun LEE, Yong-Woo LEE, Jae-Jin LEE, Hoe-Kwon JUNG
  • Publication number: 20170109043
    Abstract: A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access data from a data storage memory through the first and second memory devices.
    Type: Application
    Filed: October 14, 2016
    Publication date: April 20, 2017
    Inventors: Min-Chang KIM, Chang-Hyun KIM, Do-Yun LEE, Yong-Woo LEE, Jae-Jin LEE, Hun-Sam JUNG
  • Publication number: 20170109065
    Abstract: A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.
    Type: Application
    Filed: October 13, 2016
    Publication date: April 20, 2017
    Inventors: Min-Chang KIM, Chang-Hyun KIM, Do-Yun LEE, Yong-Woo LEE, Jae-Jin LEE, Hoe-Kwon JUNG
  • Publication number: 20170109274
    Abstract: A memory system includes: a first memory device including a plurality of first memories and a first memory controller suitable for controlling the plurality of first memories to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.
    Type: Application
    Filed: October 12, 2016
    Publication date: April 20, 2017
    Inventors: Do-Yun LEE, Min-Chang KIM, Chang-Hyun KIM, Yong-Woo LEE, Jae-Jin LEE, Hoe-Kwon JUNG
  • Publication number: 20170110207
    Abstract: A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application, and accessing data storage memory through the first and second memory devices.
    Type: Application
    Filed: October 12, 2016
    Publication date: April 20, 2017
    Inventors: Hoe-Kwon JUNG, Min-Chang KIM, Chang-Hyun KIM, Do-Yun LEE, Yong-Woo LEE, Jae-Jin LEE
  • Publication number: 20170109063
    Abstract: A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application, and accessing data storage memory through the first and second memory devices.
    Type: Application
    Filed: October 12, 2016
    Publication date: April 20, 2017
    Inventors: Do-Yun LEE, Min-Chang KIM, Chang-Hyun KIM, Yong-Woo LEE, Jae-Jin LEE, Hoe-Kwon JUNG
  • Publication number: 20170109061
    Abstract: A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.
    Type: Application
    Filed: October 11, 2016
    Publication date: April 20, 2017
    Inventors: Jae-Jin LEE, Min-Chang KIM, Chang-Hyun KIM, Do-Yun LEE, Yong-Woo LEE, Hoe-Kwon JUNG