Abstract: Disclosed are a semiconductor device and a method for manufacturing the same. The semiconductor device includes a semiconductor substrate, in which active and inactive regions are separated by a field oxidation film; source/drain junctions contacting the field oxidation film and formed in the active regions of the semiconductor substrates; a buffer oxidation film formed at designated portions of the source/drain junctions, and a gate electrode formed on the semiconductor substrate adjacent to the buffer oxidation film; and a silicide film formed at designated portions of the source/drain junctions and the upper surface of the gate electrode.

Abstract: A method of forming a floating gate of a flash memory device that can include steps of forming isolation layers in a semiconductor substrate to define active regions, forming a tunnel oxide layer over the active regions of the semiconductor substrate and forming a gate layer by depositing doped polysilicon over the isolation layers and the tunnel oxide layer, forming photoresist patterns having apertures through which portions of the gate layer spatially corresponding to the isolation layers are exposed, forming ion implantation regions by implanting impurity ions into the exposed portions of the gate layer using the photoresist patterns as masks, forming floating gates by etching the ion implantation regions using the photoresist patterns as masks, and then removing the photoresist patterns.

Abstract: A method for fabricating a semiconductor device is provided. The method includes forming a pad oxide layer on a semiconductor substrate, forming a pad nitride layer on the pad oxide layer, forming a capping layer on the pad nitride layer, patterning the capping layer, the pad nitride layer, and the pad oxide layer by a photolithography method to expose portions of the semiconductor substrate, forming a field oxidation layer having bird's beaks, the bird's beaks being formed under the pad nitride layer, forming trenches in the semiconductor substrate by anisotropically etching the field oxide layer and the semiconductor substrate using the pad nitride layer as a mask, removing the capping layer, the pad nitride layer, the pad oxide layer, and the bird's beaks, and forming an isolation region in the trenches.

Abstract: A semiconductor device may be fabricated according to a method that reduces stain difference of a passivation layer in the semiconductor device. The method may include forming top wiring patterns in a substrate, depositing a primary undoped silicate glass (USG) layer on the top wiring patterns to fill a gap between the top wiring patterns, and coating a SOG layer on the substrate on which the primary USG layer has been deposited. Next, the SOG layer on the surface of the substrate may be removed until the primary USG layer is exposed, and a secondary USG layer may be deposited on the substrate on which the primary USG layer has been exposed.

Abstract: A method of manufacturing a semiconductor device including forming a gate oxide layer, a first conductive layer, a capacitor dielectric layer, and a second conductive layer on a semiconductor substrate. The method also includes patterning the first and second conductive layers, the gate oxide layer, and the field oxide layer so as to form a gate pattern and a capacitor pattern; selectively wet-etching the first and second conductive layer so as to project out an outward part of the capacitor dielectric layer; implanting ions into the semiconductor substrate using the gate pattern and the protruding portion of the capacitor dielectric layer as an implantation mask; and removing the protruding portion of the capacitor dielectric layer so that the patterned capacitor dielectric layer has the same width as the gate electrode and the first capacitor electrode.

Abstract: Methods of fabricating MIM capacitors are provided. One example method includes forming an insulating layer including a void on a semiconductor substrate, forming a first hole connected to the void by patterning the insulating layer, forming a lower electrode by forming a tungsten layer filling in the first hole such that the tungsten flows into the void, forming a dielectric layer, forming a second hole penetrating the dielectric layer and protruding toward the insulating layer, forming a connecting contact connected to the lower electrode by filling in the second hole, and forming an upper electrode on the dielectric layer.

Abstract: Methods of fabricating MIM capacitors are provided. One example method includes forming an insulating layer including a void on a semiconductor substrate, forming a first hole connected to the void by patterning the insulating layer, forming a lower electrode by forming a tungsten layer filling in the first hole such that the tungsten flows into the void, forming a dielectric layer, forming a second hole penetrating the dielectric layer and protruding toward the insulating layer, forming a connecting contact connected to the lower electrode by filling in the second hole, and forming an upper electrode on the dielectric layer.

Abstract: A method of manufacturing a semiconductor device including forming a gate oxide layer, a first conductive layer, a capacitor dielectric layer, and a second conductive layer on a semiconductor substrate. The method also includes patterning the first and second conductive layers, the gate oxide layer, and the field oxide layer so as to form a gate pattern and a capacitor pattern; selectively wet-etching the first and second conductive layer so as to project out an outward part of the capacitor dielectric layer; implanting ions into the semiconductor substrate using the gate pattern and the protruding portion of the capacitor dielectric layer as an implantation mask; and removing the protruding portion of the capacitor dielectric layer so that the patterned capacitor dielectric layer has the same width as the gate electrode and the first capacitor electrode.