Abstract: A display panel and a fabricating method thereof, and a displaying device. The display panel includes a substrate, a resistance reducing trace, an inter-layer-medium layer and a signal line. The substrate is divided into a plurality of sub-pixel regions and a pixel separating region. The resistance reducing trace is provided on the pixel separating region of the substrate. The inter-layer-medium layer is provided on the substrate, and the inter-layer-medium layer has an opening exposing the resistance reducing trace. The signal line is provided within the opening, the signal line is connected to the resistance reducing trace, the signal line is distributed in a column direction along the display panel, and in a row direction along the display panel, a width of the opening is greater than or equal to a width of the signal line.

Abstract: The overload protection device used on a high-speed dental handpiece includes a valve body, a piston, an elastic member, and a valve plug. The valve body is provided with an air chamber and an air intake passage in communication with each other. The piston is arranged in the air chamber. The valve plug is arranged at an end of the air chamber away from the air intake passage and is connected with the valve body. The elastic member is arranged between the piston and the valve plug. An outer surface of the valve body is provided with a plurality of air discharging holes which is in communication with the air chamber. The piston is capable of opening or closing the air discharging holes when moving vertically within the air chamber. The present invention further discloses a high-speed dental handpiece with an overload protection device.

Abstract: A method for controlling a charging time of a display panel includes: during t0+k?t in a (k+1)-th blanking time, writing a data voltage to a gate of a driving transistor, and detecting a voltage Vk_(j,i) of a second electrode of the driving transistor; during a t0+(k+r)?t in a (k+1+r)-th blanking time, writing the data voltage to the gate of the driving transistor, and detecting a voltage Vk+1_(j,i) of the second electrode of the driving transistor; determining whether ?Vj,i=Vk+1_ji?Vk_ji is less than or equal to a target voltage difference VT; if ?Vj,i?VT, taking the T=t0+k?t as an expected charging time of a sub-pixel; if ?Vj,i>VT, cyclically performing the charging step described above to obtain ?Vj,i=Vk+p+1_(j,i)?Vk+p_(j,i), and comparing ?Vj,i with the target voltage difference VT, until ?Vj,i?VT, taking t0+(k+p+r?1)?t as the expected charging time of the sub-pixel. p is taken from 1, and increases by 1 for each cycle.

Abstract: A method for controlling a charging time of a display panel includes: during t0+k?t in a (k+1)-th blanking time, writing a data voltage to a gate of a driving transistor, and detecting a voltage Vk_(j,i) of a second electrode of the driving transistor; during a t0+(k+r)?t in a (k+1+r)-th blanking time, writing the data voltage to the gate of the driving transistor, and detecting a voltage Vk+i_(j,i) of the second electrode of the driving transistor; determining whether ?Vj,i=Vk+1_ji?Vk_ji is less than or equal to a target voltage difference VT; if ?Vj,i?VT, taking the T=t0+k?t as an expected charging time of a sub-pixel; if ?Vj,i>VT, cyclically performing the charging step described above to obtain ?Vj,i=Vk+p+1_(j,i)?Vk+p_(j,i), and comparing ?Vj,i with the target voltage difference VT, until ?Vj,i?VT, taking t0+(k+p+r?1)?t as the expected charging time of the sub-pixel. p is taken from 1, and increases by 1 for each cycle.

Abstract: The present disclosure provides a display substrate, a method for manufacturing the display substrate, and a display device. The display substrate includes a first conductive line extending in a first direction on a base substrate, a second conductive line extending in a second direction crossing the first direction on the base substrate, and an insulation layer arranged between the first conductive line and the second conductive line. The display substrate further includes a buffer layer arranged between the first conductive line and the base substrate, a groove extending in the first direction is formed in the buffer layer, the first conductive line is arranged in the groove, and a surface of the first conductive line away from the base substrate is flush with a surface of the buffer layer away from the base substrate.

Abstract: A thin film transistor, a display panel and a preparation method thereof and a display apparatus are provided. The thin film transistor includes: a substrate; a gate metal located on a side of the substrate; a gate insulating layer located on a side of the gate metal away from the substrate; an active layer located on a side of the gate insulating layer away from the substrate; a first metal oxide and a second metal oxide which are located on a side of the active layer away from the substrate and are arranged on a same layer; and a source metal and a drain metal which are located on sides of the first metal oxide and the second metal oxide away from the substrate and are arranged in a same layer.

Abstract: A thin-film transistor includes: an active layer having a first side and a second side opposing to the first side; a main gate electrode spaced from the active layer on the first side, and including a conductive material; an auxiliary gate electrode spaced from the active layer on the second side, wherein the auxiliary gate electrode includes a phase change material having a phase change temperature; the auxiliary gate electrode is configured to have a transition between insulating and conductive based on a temperature of the auxiliary gate electrode; and the main gate electrode and the auxiliary gate electrode are electrically coupled to each other when the auxiliary gate electrode is conductive.

Abstract: A thin film transistor and a manufacturing method thereof, an array substrate and a display device are provided. The thin film transistor is formed on a substrate and includes: an active layer on the substrate, the active layer including a source region, a drain region, and a channel region between the source region and the drain region; a first gate electrode on a side of the active layer away from the substrate; and a second gate electrode on a side of the first gate electrode away from the substrate, wherein a thickness of the first gate electrode is smaller than a thickness of the second gate electrode.

Abstract: An array substrate is provided, including a base substrate, a semiconductor active layer, a gate electrode, a source electrode, and a drain electrode that are sequentially provided, and further including a first insulating layer, a second insulating layer, a third insulating layer, at least one first via, and at least one second via. Each first via penetrates through the third insulating layer, and in each pixel unit with plural chromatic color resists, each first via is between adjacent two chromatic color resists and filled by one of the adjacent two chromatic color resists. Each second via penetrates through the second insulating layer, the at least one second via is in one-to-one correspondence with the at least one first via, each second via is filled by a chromatic color resist having a same color as that of the chromatic color resist in the corresponding first via.

Abstract: Embodiments of the present disclosure relate to the field of electronic sensing technologies, and provide a chemical sensing unit, a chemical sensor, and a chemical sensing device. The chemical sensing unit includes a thin film transistor arranged on a substrate, and a light emitting diode coupled to the thin film transistor. The thin film transistor includes a semiconductor active layer, a source, and a drain, and the semiconductor active layer is mainly composed of a chemically sensitive semiconductor material. The chemical sensing unit is provided with a via hole in a region between the source and the drain, such that the semiconductor active layer is exposed at a position corresponding to the via hole. The light emitting diode includes a first electrode, a light-emitting functional layer, and a second electrode which are stacked in sequence, wherein the first electrode is coupled to the drain.

Abstract: The present invention relates to the field of display technologies, and provides an array substrate, a manufacturing method thereof, and a display device. The array substrate includes a first electrode layer. The first electrode layer may include an indium tin oxide layer and a planarization layer. The indium tin oxide layer is disposed on a substrate and includes indium tin oxide particles; the planarization layer is disposed on a side of the indium tin oxide layer away from the substrate, and fills at least part of gaps between the indium tin oxide particles, and the planarization layer can conduct electricity.

Abstract: A display panel has pixel regions each includes sub-pixel regions, one of the sub-pixel regions is a white sub-pixel region, and remaining sub-pixel regions are color sub-pixel regions. The display panel includes signal lines and at least one filter group. The signal lines include two signal lines, a portion of each of the two signal lines is disposed between one white sub-pixel region and an adjacent color sub-pixel region, and there is a space between the two signal lines. Each filter group includes a first filter block and a second filter block, and a light transmission wavelength range of the first filter block does not overlap with that of the second filter block. An overlapping portion of the first filter block and the second filter block that are in one filter group covers a portion of the space disposed between the white sub-pixel region and the adjacent color sub-pixel region.

Abstract: An array substrate includes an insulation layer and one or more stepped holes each penetrating through the insulation layer in a direction perpendicular to the insulation layer. Each stepped hole includes a first hole and a second hole under the first hole, a radius of the first hole at a bottom is a first radius, a radius of the second hole at a top is a second radius which is substantially smaller than the first radius, and a difference between the first radius and the second radius is 0.2 ?m to 0.6 ?m.

Abstract: An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate; a first signal line on the base substrate; a first buffer layer provided on the base substrate and covering the first signal line; a second signal line on a side of the first buffer layer facing away from the base substrate; a first insulating layer provided on the base substrate and covering the second signal line; and a thin film transistor on a side of the first insulating layer facing away from the base substrate, the thin film transistor including a gate electrode, a source electrode and a drain electrode. A thickness of the first signal line is greater than that of the gate electrode, and a thickness of the second signal line is greater than that of the source electrode or the drain electrode.

Abstract: A method for manufacturing a thin film transistor includes forming a light shielding layer and a buffer layer covering the light shielding layer on a substrate. The method includes forming an active layer including a peripheral region and a channel region. The method includes forming a gate insulating layer covering the channel region and forming a contact hole exposing the light shielding layer. The method includes forming a source region and a drain region disposed on both sides of the channel region. The method includes forming an electrode layer including a gate electrode, a source electrode and a drain electrode spaced apart one another. The method includes forming a dielectric layer covering the gate electrode, the source electrode, the drain electrode and the buffer layer.

Abstract: A thin film transistor, a method of manufacturing the same, an array substrate and a display panel are disclosed. The thin film transistor includes a light blocking layer, an electrode layer, and a combination layer, which are sequentially stacked. The electrode layer includes a gate electrode, a source electrode and a drain electrode which are separated from one another, and the gate electrode is located between the source electrode and the drain electrode. The light blocking layer includes a first portion of which an orthogonal projection is located between an orthogonal projection of the gate electrode and an orthogonal projection of the source electrode; and a second portion of which an orthogonal projection is located between the orthogonal projection of the gate and an orthogonal projection of the drain. The combination layer includes an active layer.

Abstract: Provided are a display panel and a manufacturing method thereof and a display device. The display panel includes a substrate and pixel units formed on the substrate, wherein, along a thickness direction of the display panel, at least one of the pixel units includes a driving and light filtering structure and a light emitting element formed at a side of the driving and light filtering structure facing away from the substrate, and wherein the driving and light filtering structure includes a driving part and a light filtering part, and the light filtering part is disposed in an accommodating hole penetrating through an insulating layer in the driving part along the thickness direction.

Abstract: A display panel, a method for manufacturing the display panel, and a display apparatus are provided. The display panel includes a base substrate; a thin film transistor; an OLED structure formed on the thin film transistor including a first and second electrodes arranged opposite to each other and an organic light emitting layer arranged between the first and second electrodes; a light shielding layer arranged between the first electrode and the organic light emitting layer. The light shielding layer includes a first and a second light shielding layers. The first light shielding layer includes a first light shielding portion and a first opening portion corresponding to a pixel area. The second light shielding layer includes a second light shielding portion and a second opening portion corresponding to a pixel area. The second light shielding portion includes a first and second parts.

Abstract: A fabrication method for fabricating a thin-film transistor includes: forming a light shielding layer on a substrate; forming a buffer layer covering the light shielding layer, and forming a semiconductor material layer stacked on a surface of the buffer layer away from the substrate; forming a through hole penetrating through the buffer layer and the semiconductor material layer; patterning the semiconductor material layer to form an active layer covering a partial region of the buffer layer; forming a gate insulator layer on a surface of the active layer away from the substrate and a gate stacked on a surface of the gate insulator layer away from the substrate; forming a source and a drain on the surface of the buffer layer away from the substrate; and forming a dielectric layer covering the gate, the source, the drain, and the buffer layer, and being recessed into the through hole to form a groove.

Abstract: A method for manufacturing a thin film transistor includes forming a light shielding layer and a buffer layer covering the light shielding layer on a substrate. The method includes forming an active layer including a peripheral region and a channel region. The method includes forming a gate insulating layer covering the channel region and forming a contact hole exposing the light shielding layer. The method includes forming a source region and a drain region disposed on both sides of the channel region. The method includes forming an electrode layer including a gate electrode, a source electrode and a drain electrode spaced apart one another. The method includes forming a dielectric layer covering the gate electrode, the source electrode, the drain electrode and the buffer layer.