Abstract: A power device includes a substrate, a drift layer disposed on the substrate, a terminal region and an active region disposed in the drift layer, an electrode layer disposed on the active region, a Schottky contact layer disposed between the electrode layer and the active region, a passivation layer including a first portion that is disposed on the drift layer, and a second portion that is connected to the first portion and that has an end surface distal from the drift layer. The end surface of the second portion is flush with a top surface of the electrode layer distal from the drift layer. Another two power devices are also provided.

Abstract: A power device includes a substrate, a drift layer disposed on the substrate, a terminal region and an active region disposed in the drift layer, an electrode layer disposed on the active region, a Schottky contact layer disposed between the electrode layer and the active region, a passivation layer disposed on the drift layer, and an isolation layer disposed between the passivation layer and the electrode layer so that the passivation layer and the electrode layer are at least partially separated from each other. The isolation layer, the electrode layer, and the passivation layer each respectively has a thermal expansion coefficient a, b, c, and a>b>c.

Abstract: A semiconductor structure includes a substrate, a semiconductor epitaxial layer, an active region and a terminal region, a field oxide layer, an anode layer, and a passivation layer. The anode layer is configured to extend from the active region to be arranged on a portion of the field oxide layer. The side wall and the top wall of the anode layer are connected to each other through a curved connection surface. By setting the upper corner of the side wall of the anode layer to be curved, the transition between the side wall and the top wall of the anode layer is smooth, preventing a sharp change in the inclination angle and preventing the stress concentration of the passivation layer at the corner of the side wall.

Abstract: A silicon carbide power diode device has a silicon carbide substrate on which a silicon carbide epitaxial layer with an active region is provided. A Schottky metal layer is on the active region, and a first electrode layer is on the Schottky metal layer. A first ohmic contact is on the silicon carbide substrate, and a second electrode layer is on the first ohmic contact. The active region of the silicon carbide epitaxial layer has a plurality of first P-type regions, a plurality of second P-type regions, and N-type regions. The first P-type regions and the second P-type regions lacking an ohmic contact are spaced apart with dimensions of the second P-type regions being minimized and the N-type regions being maximized for given dimensions of the first P-type region. Second ohmic contacts are located between the first P-type region and the Schottky metal layer.

Abstract: A semiconductor device includes a semiconductor substrate, an epitaxial layer disposed on the semiconductor substrate, a cell zone including multiple unit cells disposed in the epitaxial layer opposite to the semiconductor substrate, a transition zone having a doped region and surrounding the cell zone, a source electrode unit disposed on the epitaxial layer opposite to the semiconductor substrate, and multiple gate electrode units. Each unit cell includes a well region, a source region disposed in the well region, and a well contact region extending through the source region to contact the well region. A method for manufacturing the semiconductor device is also disclosed.

Abstract: A semiconductor device includes a semiconductor substrate, an epitaxial layer disposed on the semiconductor substrate, a cell zone including multiple unit cells disposed in the epitaxial layer opposite to the semiconductor substrate, a transition zone having a doped region and surrounding the cell zone, a source electrode unit disposed on the epitaxial layer opposite to the semiconductor substrate, and multiple gate electrode units. Each unit cell includes a well region, a source region disposed in the well region, and a well contact region extending through the source region to contact the well region. A method for manufacturing the semiconductor device is also disclosed.

Abstract: A silicon carbide metal oxide semiconductor field effect transistor device includes a substrate, an epitaxial layer, and a plurality of cell units each of which includes a first cell and a second cell that are disposed in the epitaxy layer and connected to each other in the epitaxy layer. The first cell includes a first Schottky region, a first junction field effect region, a first well region, a first well contact structure, a first source region, a first Schottky metal, a first ohmic contact metal, and a first gate structure. The second cell includes a second Schottky region, a second junction field effect region, a second well region, a second well contact structure, a second source region, a second Schottky metal, a second ohmic contact metal, and a second gate structure. In the epitaxial layer, the first junction field effect region is connected to the second Schottky region.

Abstract: A sensor interface circuit (5) for an amperometric electrochemical sensor (3). The circuit includes: a current-to-voltage converter (9, Rf) connected to a first terminal (WRK) of the sensor (3) for converting an electric current through the sensor (3) to a voltage at an output terminal (10) of the current-to-voltage converter (9, Rf); a first amplifier (7) connected between a second terminal (REF) and a third terminal (CNTR) of the sensor (3) for maintaining a substantially fixed voltage difference between the first and second terminals (WRK, REF) of the sensor (3); a power supply (11) for powering the voltage converter (9, Rf) and for powering a first portion (31) of the first amplifier (7); and a negative voltage converter (17) configured to power a second portion of the first amplifier (7) through its low-side supply terminal (41), while a high-side supply terminal (39) of the second portion of the first amplifier (7) is configured to be connected to the power supply (11).

Abstract: A temperature sensor arrangement (10), including a bandgap voltage generator (12), which is configured to provide an output voltage (Vbg); at least one semiconductor junction (14) for temperature sensing, which is biased by a biasing current flowing through said semiconductor junction (14); and at least one poly-resistor (Rb3) which is connected between the output (23) of the bandgap voltage generator (12) and the semiconductor junction (14), thereby providing said biasing current from the bandgap voltage generator (12) to the semiconductor junction (14).

Abstract: A power device includes a substrate, a drift layer disposed on the substrate, a terminal region and an active region disposed in the drift layer, an electrode layer disposed on the active region, a Schottky contact layer disposed between the electrode layer and the active region, a passivation layer disposed on the drift layer, and an isolation layer disposed between the passivation layer and the electrode layer so that the passivation layer and the electrode layer are at least partially separated from each other. The isolation layer, the electrode layer, and the passivation layer each respectively has a thermal expansion coefficient a, b, c, and a>b>c.

Abstract: A silicon carbide power diode device has a silicon carbide substrate on which a silicon carbide epitaxial layer with an active region is provided. A Schottky metal layer is on the active region, and a first electrode layer is on the Schottky metal layer. A first ohmic contact is on the silicon carbide substrate, and a second electrode layer is on the first ohmic contact. The active region of the silicon carbide epitaxial layer has a plurality of first P-type regions, a plurality of second P-type regions, and N-type regions. The first P-type regions and the second P-type regions lacking an ohmic contact are spaced apart with dimensions of the second P-type regions being minimized and the N-type regions being maximized for given dimensions of the first P-type region. Second ohmic contacts are located between the first P-type region and the Schottky metal layer.

Abstract: A silicon carbide power diode device has a silicon carbide substrate on which a silicon carbide epitaxial layer with an active region is provided. A Schottky metal layer is on the active region, and a first electrode layer is on the Schottky metal layer. A first ohmic contact is on the silicon carbide substrate, and a second electrode layer is on the first ohmic contact. The active region of the silicon carbide epitaxial layer has a plurality of first P-type regions, a plurality of second P-type regions, and N-type regions. The first P-type regions and the second P-type regions lacking an ohmic contact are spaced apart with dimensions of the second P-type regions being minimized and the N-type regions being maximized for given dimensions of the first P-type region. Second ohmic contacts are located between the first P-type region and the Schottky metal layer.

Abstract: A semiconductor device includes a semiconductor substrate, an epitaxial layer disposed on the semiconductor substrate, a cell zone including multiple unit cells disposed in the epitaxial layer opposite to the semiconductor substrate, a transition zone having a doped region and surrounding the cell zone, a source electrode unit disposed on the epitaxial layer opposite to the semiconductor substrate, and multiple gate electrode units. Each unit cell includes a well region, a source region disposed in the well region, and a well contact region extending through the source region to contact the well region. A method for manufacturing the semiconductor device is also disclosed.

Abstract: A silicon carbide power diode device has a silicon carbide substrate on which a silicon carbide epitaxial layer with an active region is provided. A Schottky metal layer is on the active region, and a first electrode layer is on the Schottky metal layer. A first ohmic contact is on the silicon carbide substrate, and a second electrode layer is on the first ohmic contact. The active region of the silicon carbide epitaxial layer has a plurality of first P-type regions, a plurality of second P-type regions, and N-type regions. The first P-type regions and the second P-type regions lacking an ohmic contact are spaced apart with dimensions of the second P-type regions being minimized and the N-type regions being maximized for given dimensions of the first P-type region. Second ohmic contacts are located between the first P-type region and the Schottky metal layer.

Abstract: An electronic measuring device for measuring a physical parameter includes a differential analogue sensor formed from two capacitances—an excitation circuit of the differential analogue sensor providing to the sensor two electrical excitation signals which are inverted—a measuring circuit which generates an analogue electrical voltage which is a function determined from the value of the sensor, and a circuit for compensating for a possible offset of the sensor, which is formed from a compensation capacitance, which is excited by its own electrical excitation signal. The excitation circuit is arranged in order to be able to provide to an additional capacitance of the compensation circuit its own electrical excitation signal having a linear dependence on the absolute temperature with a determined proportionality factor in order to compensate for a drift in temperature of an electrical assembly of the measuring device comprising at least the compensation capacitance.

Abstract: A sensor interface circuit (5) for an amperometric electrochemical sensor (3). The circuit includes: a current-to-voltage converter (9, Rf) connected to a first terminal (WRK) of the sensor (3) for converting an electric current through the sensor (3) to a voltage at an output terminal (10) of the current-to-voltage converter (9, Rf); a first amplifier (7) connected between a second terminal (REF) and a third terminal (CNTR) of the sensor (3) for maintaining a substantially fixed voltage difference between the first and second terminals (WRK, REF) of the sensor (3); a power supply (11) for powering the voltage converter (9, Rf) and for powering a first portion (31) of the first amplifier (7); and a negative voltage converter (17) configured to power a second portion of the first amplifier (7) through its low-side supply terminal (41), while a high-side supply terminal (39) of the second portion of the first amplifier (7) is configured to be connected to the power supply (11).

Abstract: A temperature sensor arrangement (10), including a bandgap voltage generator (12), which is configured to provide an output voltage (Vbg); at least one semiconductor junction (14) for temperature sensing, which is biased by a biasing current flowing through said semiconductor junction (14); and at least one poly-resistor (Rb3) which is connected between the output (23) of the bandgap voltage generator (12) and the semiconductor junction (14), thereby providing said biasing current from the bandgap voltage generator (12) to the semiconductor junction (14).

Abstract: The present invention relates to an interface circuit for a capacitive accelerometer sensor for measuring an acceleration value sensed by the sensor. The interface circuit comprises a plurality of electrical switches and three programmable capacitors. Two of the programmable capacitors are arranged to implement gain trimming of the interface circuit, while one of the programmable capacitors is arranged to implement acceleration range selection.

Abstract: A capacitive accelerometer for measuring an acceleration value is provided, including a first and a second electrode; a third mobile electrode arranged therebetween, and forming with the first electrode a first capacitor, and with the second electrode a second capacitor, the third electrode being displaced when the accelerometer is subject to acceleration and generates a capacitance difference value transformable to electrical charges; a first and a second voltage source configured to selectively apply first and second voltages to the first and the second electrodes, respectively, and a third voltage to the third electrode, and to generate electrostatic forces acting on the third electrode, the first, second and/or third voltages applied during electrical charge transfers for collecting the electrical charges to measure the acceleration; and an electrostatic force compensator to compensate for missing electrostatic forces due to a modified charge transfer rate, a compensation amount dependent on the modified

Abstract: An electronic measuring device for measuring a physical parameter includes a differential analogue sensor formed from two capacitances—an excitation circuit of the differential analogue sensor providing to the sensor two electrical excitation signals which are inverted—a measuring circuit which generates an analogue electrical voltage which is a function determined from the value of the sensor, and a circuit for compensating for a possible offset of the sensor, which is formed from a compensation capacitance, which is excited by its own electrical excitation signal. The excitation circuit is arranged in order to be able to provide to an additional capacitance of the compensation circuit its own electrical excitation signal having a linear dependence on the absolute temperature with a determined proportionality factor in order to compensate for a drift in temperature of an electrical assembly of the measuring device comprising at least the compensation capacitance.