Patents by Inventor Yongjun Xu

Yongjun Xu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12284715
    Abstract: Aspects of the present disclosure include methods, apparatuses, and computer readable media for determining a connected mode discontinuous reception (C-DRX) short cycle value, transmitting a C-DRX short cycle request to a base station, the C-DRX short cycle request including the C-DRX short cycle value, receiving a first confirmation indicating the base station accepting the C-DRX short cycle value associated with the C-DRX short cycle request, determining an averaging window value based on the C-DRX short cycle value, transmitting an averaging window request to the base station, the averaging window request including the averaging window value, receiving a second confirmation indicating the base station accepting the averaging window value associated with the averaging window request, and communicating with the base station based on the C-DRX short cycle value and the averaging window value.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: April 22, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Nan Zhang, Yongjun Xu, Long Han
  • Patent number: 12266075
    Abstract: The present disclosure relates to methods and apparatus for display processing. For example, disclosed techniques facilitate regional processing of images for under-display device displays. Aspects of the present disclosure can identify a subsection of a set of frame layers, the identified subsection corresponding to a lower pixel density region, relative to at least one other region, of a display. Aspects of the present disclosure can also blend first pixel data for each frame layer corresponding to the identified subsection to generate second pixel data. Further, aspects of the present disclosure can populate a buffer layer based on the second pixel data. Additionally, aspects of the present disclosure can blend pixel data from the set of frame layers and the buffer layers to generate a blended image. Aspects of the present disclosure can also transmit the blended image for presentment via the display.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: April 1, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Nan Zhang, Yongjun Xu, Dileep Marchya
  • Patent number: 12249017
    Abstract: Devices and methods for reducing a DPU transfer time to compensate for a delayed GPU render time. After completion of rendering a second frame that follows a first frame, a frame processor determines whether the first frame is currently transferring to a display panel or has already been transferred to the display panel. At least one clock is used with a first set of clock speeds when the first frame is determined to be currently transferring and used with a second set of clock speeds when the first frame is determined to have already been transferred, the second set of clock speeds being faster than the first set of clock speeds. After completion of the transfer of the first frame, the second frame is transferred based on the set of clock speeds.
    Type: Grant
    Filed: February 21, 2020
    Date of Patent: March 11, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Yongjun Xu, Nan Zhang, Wenkai Yao, Long Han
  • Patent number: 12249298
    Abstract: This disclosure provides systems, devices, apparatus and methods, including computer programs encoded on storage media, for reducing gamut mapping luminance loss. A gain value of at least one primary color may be reduced in a native color gamut based on an analog technique (e.g., using a DDIC in a display panel) to provide a reduced color gamut that is smaller than the native color gamut. The reduced color gamut may have a same luminance as the native color gamut. One or more colors included in the native color gamut may be mapped via a digital technique (e.g., using a DPU or other processor) to the reduced color gamut. The mapping may be configured to provide a threshold level of color accuracy in the reduced color gamut.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: March 11, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Xinchao Yang, Nan Zhang, Yongjun Xu
  • Publication number: 20250028576
    Abstract: Certain aspects of the present disclosure provide techniques and apparatus for scheduling execution of machine learning model operations on a multiprocessor computing device. The method generally includes during execution of operations in a first portion of a machine learning model on a first processing unit of the computing device, measuring a temperature for each of a plurality of locations on the computing device. It is determined that a temperature measured for the first processing unit exceeds a threshold temperature. Based on one or more operating parameters for the computing device, a second processing unit of the computing device is selected to use in executing operations in a second portion of the machine learning model. Execution of operations in the second portion of the machine learning model on the second processing unit is scheduled.
    Type: Application
    Filed: February 28, 2022
    Publication date: January 23, 2025
    Inventors: Nan ZHANG, Yongjun XU, Zhiguo LI
  • Publication number: 20250022440
    Abstract: Aspects presented herein relate to methods and devices for display processing including an apparatus, e.g., a DPU. The apparatus may transmit, to a display panel, a first frame including a border filling region with a plurality of first pixels, where each of the plurality of first pixels includes a border filling color. The apparatus may also configure at least one second frame including a valid pixel region with a plurality of second pixels, where the at least one second frame includes second content data and a second pixel resolution. The apparatus may also transmit, to the display panel, the at least one second frame including the valid pixel region with the plurality of second pixels. Further, the apparatus may obtain an indication of a resolution update for the at least one second frame. The apparatus may also adjust the valid pixel region of the at least one second frame.
    Type: Application
    Filed: December 15, 2022
    Publication date: January 16, 2025
    Inventors: Nan ZHANG, Yongjun XU
  • Patent number: 12200348
    Abstract: An example image capture device includes a display configured to display captured images, a camera sensor, the camera sensor being disposed to receive light through at least a portion of the display, memory configured to store captured images, and one or more processors coupled to the camera sensor, the display, and the memory. The one or more processors are configured to receive a signal from a sensor. The one or more processors are configured to determine, based at least in part on the signal, a user interface mode. The user interface mode includes a first mode having a first number of black pixels or a second mode having a second number of black pixels. The first number is greater than the second number. The one or more processors are also configured to receive image data from the camera sensor.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: January 14, 2025
    Assignee: QUALCOMM Incorporated
    Inventors: Yongjun Xu, Zack Qing Zhou, Nan Zhang
  • Publication number: 20250014140
    Abstract: A video processing system includes a graphics subsystem including a graphics processing unit (GPU) and a frame buffer. The GPU is configured to obtain a physical pixel layout corresponding to a display architecture of an electronic display, wherein the physical pixel layout is characterized by a non-uniform subpixel arrangement; receive image data, including a matrix of logical pixel chroma values; subsample the matrix of logical pixel chroma values according to the physical pixel layout to produce subsampled image data having a subpixel rendered format corresponding to the non-uniform subpixel arrangement; store the subsampled image data in the frame buffer; and enable transfer of the subsampled image data to a display processing unit (DPU) of the electronic display for composition of frames having the non-uniform subpixel arrangement.
    Type: Application
    Filed: December 17, 2021
    Publication date: January 9, 2025
    Inventors: Nan Zhang, Bo Du, Yongjun Xu
  • Patent number: 12170071
    Abstract: Methods and apparatuses are provided for alignment of hardware and software Vsync signals through filtering out delayed timestamp signals in a hardware timestamp signal used to generate the software Vsync. The alignment may occur when a display client is operating in a video mode but not a command mode. A compositor or processing unit may receive a hardware Vsync signal from a display using a video mode, generate a hardware timestamp signal based on the hardware Vsync signal, determine a delay for a pulse in the hardware timestamp signal based on a delay for a set of previous frames, determine whether the delay for the pulse is over a threshold, and control rendering and transmission of a frame to the display based on the delay for the pulse being over the threshold. Thus, accurate Vsync signal synchronization may occur.
    Type: Grant
    Filed: January 26, 2024
    Date of Patent: December 17, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Nan Zhang, Long Han, Yongjun Xu
  • Publication number: 20240412711
    Abstract: Aspects presented herein relate to methods and devices for display processing including an apparatus, e.g., a DPU. The apparatus may configure at least one mask layer including a set of mask units associated with a set of physical sub-pixel values, the at least one mask layer being configured based on a target display configuration. The apparatus may also store the at least one mask layer to a device storage of a device. Further, the apparatus may retrieve the at least one mask layer from the device storage during a run-time period. The apparatus may also compare the target display configuration to a current display configuration of a display panel. The apparatus may also apply or refrain from applying the at least one mask layer to the display panel during the run-time period based on the comparison of the target display configuration to the current display configuration.
    Type: Application
    Filed: February 14, 2022
    Publication date: December 12, 2024
    Inventors: Nan ZHANG, Yongjun XU
  • Publication number: 20240403257
    Abstract: A method for changing operating frequency in a serial data link includes transmitting first datagrams over the serial data link using a first physical layer interface configured for a first frequency of operation, configuring a second physical layer interface for a second frequency of operation different from the first frequency of operation while the first datagrams are transmitted over the serial data link, transmitting configuration information over the serial data link using the first physical layer interface after the second physical layer interface has been configured for the second frequency of operation, idling the serial data link by terminating transmissions by the first physical layer interface, decoupling the first physical layer interface from the serial data link, coupling the second physical layer interface to the serial data link, and transmitting second datagrams over the serial data link using the second physical layer interface and the second frequency of operation.
    Type: Application
    Filed: December 15, 2021
    Publication date: December 5, 2024
    Inventors: Nan ZHANG, Zhibing ZHOU, Yongjun XU
  • Publication number: 20240386646
    Abstract: Aspects presented herein relate to methods and devices for display processing including an apparatus, e.g., a DPU. The apparatus may receive each of a plurality of frames in a scene. The apparatus may also convert a data format for each of the plurality of frames to one or more DSC bit streams for each of the plurality of frames. Further, the apparatus may store the one or more DSC bit streams for each of the plurality of frames in a first memory or a first cache. The apparatus may also read the one or more DSC bit streams for each of the plurality of frames from the first memory or the first cache. The apparatus may also transmit, to a display panel, the one or more DSC bit streams for each of the plurality of frames.
    Type: Application
    Filed: October 19, 2021
    Publication date: November 21, 2024
    Inventors: Nan ZHANG, Mark STERNBERG, Yongjun XU
  • Publication number: 20240381044
    Abstract: Various embodiments provide systems and methods for managing a first earpiece and a second earpiece for presenting an audio stream from a wireless device. Various embodiments may include monitoring a battery level of the first earpiece and a battery level of the second earpiece, determining whether the battery level of the first earpiece meets a threshold, and configuring the wireless device to send a monophonic audio stream to the second earpiece in response to determining that the battery level of the first earpiece meets the threshold.
    Type: Application
    Filed: October 28, 2021
    Publication date: November 14, 2024
    Inventors: Nan ZHANG, Yongjun XU, Weipeng FU
  • Patent number: 12143199
    Abstract: The present invention relates to a multi-carrier resource allocation method based on a wireless-powered backscatter communication network. The method comprises following steps: S1.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: November 12, 2024
    Assignee: CHONGQING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS
    Inventors: Yongjun Xu, Qianbin Chen, Guoquan Li, Qilie Liu
  • Publication number: 20240323992
    Abstract: Systems, methods, and apparatus for controlling radio frequency (RF) interference at a mobile communication device are described. A data communication apparatus has a wireless transceiver configured to transmit and receive RF signals, a bus interface circuit coupled to a serial bus and configured for operation as a display serial interface (DSI), and a controller. The controller is configured to receive a measurement of a reference signal representative of RF signal quality at the mobile communication device, determine whether the measurement of the reference signal indicates that the RF signal quality is less than a minimum RF signal quality level, and reduce signal strength of a transmitter in the bus interface circuit when the RF signal quality falls below the minimum RF signal quality level.
    Type: Application
    Filed: August 23, 2021
    Publication date: September 26, 2024
    Inventors: Nan ZHANG, Junzhi ZHAO, Yongjun XU
  • Patent number: 12094028
    Abstract: In some aspects, the present disclosure provides a method for high dynamic range (HDR) video rotation. The method includes receiving, by a display processor, an indication that a frame rotation animation process for video playback has been initiated, the display processor comprising a display processor pipeline. The method also includes determining whether the video playback is an HDR format or another format. In response to the determination and receiving the indication: bypassing a loading of the frame rotation animation into a first portion of the display processor pipeline, and loading the frame rotation animation into a second portion of the display processor pipeline if the video playback is in an HDR format.
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: September 17, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Zhibing Zhou, Mohammed Naseer Ahmed, Xinchao Yang, Nan Zhang, Yongjun Xu
  • Patent number: 12056881
    Abstract: Certain aspects of the present disclosure provide methods and apparatus for generating, in a display panel, a virtual mask layer around a cutout region for a front camera. The front camera may be positioned under the display panel and receive light through the cutout region. The mask layer may hide defects of the cutout region that does not have functional pixels. The disclosed techniques may improve aesthetic appearance of displays having punch-hole cameras with reduced hole sizes and increased production quality conformance rate.
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: August 6, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Nan Zhang, Yongjun Xu
  • Publication number: 20240242690
    Abstract: Methods and apparatuses are provided for alignment of hardware and software Vsync signals through filtering out delayed timestamp signals in a hardware timestamp signal used to generate the software Vsync. The alignment may occur when a display client is operating in a video mode but not a command mode. A compositor or processing unit may receive a hardware Vsync signal from a display using a video mode, generate a hardware timestamp signal based on the hardware Vsync signal, determine a delay for a pulse in the hardware timestamp signal based on a delay for a set of previous frames, determine whether the delay for the pulse is over a threshold, and control rendering and transmission of a frame to the display based on the delay for the pulse being over the threshold. Thus, accurate Vsync signal synchronization may occur.
    Type: Application
    Filed: January 26, 2024
    Publication date: July 18, 2024
    Inventors: Nan ZHANG, Long HAN, Yongjun XU
  • Publication number: 20240177691
    Abstract: Systems, methods, and non-transitory media are provided for dynamically switching frame rates without changing a display refresh rate. An example method can include receiving, from a display device associated with a computing device, a set of control signals indicating a display refresh rate implemented by the display device; adjusting a frame rate associated with application data from one or more applications executed on the computing device; synchronizing, based on the set of control signals, the adjusted frame rate with two or more display refresh cycles, each display refresh cycle being based on the display refresh rate; providing, to the display device, a first frame at the adjusted frame rate, the first frame being generated based on the application data; and displaying the first frame at the display device implementing the display refresh rate.
    Type: Application
    Filed: February 5, 2024
    Publication date: May 30, 2024
    Inventors: Nan ZHANG, Xinchao YANG, Yongjun XU
  • Patent number: 11990082
    Abstract: The present disclosure provides methods and apparatus for configuring an image data transfer time for sending image data from a processor to a display panel along a display path. One method includes receiving, by the processor from the display panel, a display panel refresh interval indication indicating a display panel refresh interval of the display panel. The display panel refresh interval of the display panel corresponds to a time duration of a display period of the display panel. The display panel is configured to refresh each display period. The image data transfer time is computed based on the display panel refresh interval. One or more components of the display path are configured to support the computed image data transfer time.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: May 21, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Nan Zhang, Junzhi Zhao, Yongjun Xu