Patents by Inventor Yonglin GUO
Yonglin GUO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20250046247Abstract: A pixel driving circuit, a method for driving the same and a display apparatus. The pixel driving circuit includes: a light-emitting device; a driving transistor which generates a current for driving the light-emitting device to emit light according to a data voltage; a first control circuit which conducts a first electrode of the driving transistor to a first node; a second control circuit which forms a current path from the first node to a first initialization signal terminal in a case where the first control circuit conducts the first electrode of the driving transistor to the first node, to allow a threshold voltage of the driving transistor to be input to the first node; a data writing circuit which inputs the data voltage of a data signal terminal to the first node.Type: ApplicationFiled: September 30, 2022Publication date: February 6, 2025Inventors: Dan CAO, Wenhui GAO, Yonglin GUO, Huijuan YANG, Tiaomei ZHANG
-
Patent number: 12217697Abstract: A display panel and a display apparatus are disclosed. The display panel includes: a display region, including M first display regions sequentially disposed along a first direction, and a non-display region, including M first GOA circuits and M clock signal line groups; a first display region includes multiple first signal lines sequentially disposed along the first direction and extending along a second direction intersecting with the first direction, a clock signal line group includes multiple clock signal lines, signals of at least two clock signal lines respectively in at least two clock signal line groups are same; a first GOA circuit includes multiple first GOA units, multiple first GOA units in an m-th first GOA circuit are connected with at least one clock signal line in an m-th clock signal line group, and are connected with multiple first signal lines in an m-th first display region in one-to-one correspondence.Type: GrantFiled: June 30, 2022Date of Patent: February 4, 2025Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Yonglin Guo, Yunsheng Xiao, Wenhui Gao
-
Publication number: 20250029563Abstract: Provided is a shift register unit. The shift register unit includes: a first input circuit, coupled to a first clock terminal, an input terminal, a first node and a second node; a second input circuit, coupled to the first node, the first clock terminal, a first power terminal and a third node; a first control circuit, coupled to the input terminal, the first clock terminal, the second node, a second power terminal, a second clock terminal and the third node; a second control circuit, coupled to the third node, the second clock terminal, the first node, the first power terminal, the second power terminal, a fourth node and a fifth node; and an output circuit, coupled to the fourth node, the fifth node, the first power terminal, the second power terminal and an output terminal.Type: ApplicationFiled: October 28, 2022Publication date: January 23, 2025Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Yonglin GUO, Zhiliang JIANG, Ming HU, Ziyang YU
-
Publication number: 20250022415Abstract: A display substrate and a display device. The display substrate includes a base substrate and a plurality of sub-pixels arranged on the base substrate. A plurality of sub-pixel driving circuitries in the plurality of sub-pixels is arranged in columns, the columns of sub-pixel driving circuitries are divided into a plurality of column units, and each column unit includes at least two adjacent columns of sub-pixel driving circuitries. The display substrate further includes a first initialization signal transmission layer including a first initialization bus and a plurality of first initialization branches. The first initialization branch includes a first branch body member and a plurality of first branch extending members. The first branch body member is coupled to the sub-pixel driving circuitries in a corresponding column unit through the plurality of first branch extending members.Type: ApplicationFiled: May 30, 2023Publication date: January 16, 2025Inventors: Dan CAO, Wenhui GAO, Miao WANG, Cong LIU, Binyan WANG, Jingwen ZHANG, Yonglin GUO, Gukhwan SONG, Zhen LIU
-
Publication number: 20250006126Abstract: A pixel driving circuit and a driving method therefor, and a display panel and a display apparatus. The pixel driving circuit comprises a write-in transistor, a driving transistor, a storage capacitor, a coupling capacitor and a light-emitting unit, wherein one electrode of the storage capacitor and a gate electrode of the driving transistor are both electrically connected to a first node; and one electrode of the coupling capacitor is electrically connected to a control voltage end, and the other electrode thereof is electrically connected to the first node, and the coupling capacitor is configured to adjust the voltage of the first node in a light emission phase, such that the voltage of the first node is converted from a first voltage into a second voltage.Type: ApplicationFiled: May 10, 2023Publication date: January 2, 2025Inventors: Xiaomin YUAN, Huaisen REN, Yonglin GUO
-
Publication number: 20250006132Abstract: A pixel driving circuit includes: a driving circuit, connecting a first node, a second node, and a third node, and configured to provide a driving current to the third node by using the second node; a compensation circuit, connecting the third node, a fourth node, and a first gate driving signal end, and configured to conduct the third node and the fourth node; a first reset circuit, connecting a first initial signal end, a fifth node, and a first reset signal end, and configured to transmit a signal of the first initial signal end to the fifth node; a first isolation circuit, connecting the first node and the fourth node, and configured to conduct the first node and the fourth node; and a second isolation circuit, connecting the first node and the fifth node, and configured to conduct the first node and the fifth node.Type: ApplicationFiled: June 24, 2022Publication date: January 2, 2025Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Yonglin GUO, Cong LIU, Dan CAO, Tiaomei ZHANG
-
Publication number: 20240423021Abstract: Provided is a display substrate, including a base substrate and a plurality of pixel units, the plurality of pixel units includes regular pixel units and redundant pixel units, each regular pixel unit includes at least one constant voltage terminal and at least one dual-gate transistor, each dual-gate transistor includes two gates which are spaced apart, and a part of an active region of the dual-gate transistor, which is located between the two gates, is an intermediate part; the display substrate further includes a plurality of compensation structures, each compensation structure is connected to one constant voltage terminal of the pixel unit, and compensates for the at least one dual-gate transistor of a regular pixel unit; the compensation structure overlaps and is insulated from the intermediate part of the dual-gate transistor for which the compensation structure compensates.Type: ApplicationFiled: August 30, 2024Publication date: December 19, 2024Inventors: Yonglin GUO, Hongmei FAN, Xinyu WEI, Yuqian PANG, Kai ZHANG
-
Publication number: 20240407195Abstract: The present disclosure relates to a display substrate, a manufacturing method thereof, and a display device. The display substrate includes a flexible substrate, and a TFT driver circuit on the flexible substrate. The TFT driver circuit includes a patterned semiconductor layer on the flexible substrate. The display substrate further includes a shielding layer configured to shield fluoride ions from entering the flexible substrate. The shielding layer is arranged at a same layer as the semiconductor layer, and/or the shielding layer is located between the semiconductor layer and the flexible substrate.Type: ApplicationFiled: August 9, 2023Publication date: December 5, 2024Applicants: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Ge Wang, Ming Hu, Zhiliang Jiang, Hong Chen, Yonglin Guo, Xiangnan Pan, Xiaomin Yuan, Chi Yu, Qingqing Yan, Qing He, Min Chen
-
Publication number: 20240404470Abstract: The present disclosure provides a timing controller applied to a display device, where the display device includes a plurality of pixel circuits, a first driving circuit and a second driving circuit, each of the pixel circuits includes a driving transistor and a writing and compensation circuit; the first driving circuit is configured to sequentially output a first effective level signal to each of first control signal lines, according to a first driving start signal; the second driving circuit is configured to sequentially output a second effective level signal to each of second control signal lines, according to a second driving start signal; and the timing controller is configured to provide the first driving start signal and the second driving start signal during a refresh frame, where the number W of effective pulses in the first driving start signal is more than or equal to 2.Type: ApplicationFiled: August 30, 2022Publication date: December 5, 2024Inventors: Tianyi CHENG, Yonglin GUO
-
Publication number: 20240365587Abstract: A display substrate includes pixel circuits and light-emitting devices. The pixel circuits include first pixel circuits and second pixel circuits. The light-emitting devices include first light-emitting devices and second light-emitting devices. A first pixel circuit is coupled to a first light-emitting device, and the first pixel circuit is at least partially opposite to the first light-emitting device. A second pixel circuit is coupled to a second light-emitting device, and an orthographic projection of the second pixel circuit and an orthographic projection of the second light-emitting device have no overlap. A width-to-length ratio of a channel of a driving transistor in the first pixel circuit is greater than a width-to-length ratio of a channel of a driving transistor in the second pixel circuit; and/or a channel capacitance of a compensation transistor in the first pixel circuit is larger than a channel capacitance of a compensation transistor in the second pixel circuit.Type: ApplicationFiled: April 24, 2023Publication date: October 31, 2024Applicants: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Dan CAO, Xiaoqing SHU, Wenhui GAO, Yonglin GUO, Yunsheng XIAO
-
Patent number: 12114532Abstract: Provided is a display substrate, including a base substrate and a plurality of pixel units arranged on the base substrate; each pixel unit includes constant voltage terminals and a dual-gate transistor; a part of an active region of each dual-gate transistor, which is located between two gates, is an intermediate part; except the pixel units closest to the first side, each pixel unit includes a compensation structure; the compensation structure is connected to one of the constant voltage terminals of the pixel unit where the compensation structure is located, and compensates for at least one dual-gate transistor of a pixel unit adjacent to the pixel unit where the compensation structure is located in a direction toward the first side; the compensation structure overlaps and is insulated from the intermediate part of the dual-gate transistor for which the compensation structure compensates.Type: GrantFiled: March 9, 2021Date of Patent: October 8, 2024Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Yonglin Guo, Hongmei Fan, Xinyu Wei, Yuqian Pang, Kai Zhang
-
Publication number: 20240312404Abstract: A pixel circuit, a driving method therefor, and a display device are disclosed. In the pixel circuit, a first reset transistor is coupled between a first electrode of a light emitting device and a first initialization signal terminal, and a gate of the first reset transistor is coupled to a first light emitting control terminal; a second electrode of the light emitting device is coupled to a first power supply terminal; a compensation transistor is coupled between a gate and a first electrode of a drive transistor, and a gate of the compensation transistor is coupled to a first scan control terminal; a data writing transistor is coupled between a second electrode of the drive transistor and a data signal terminal, and a gate of the data writing transistor is coupled to a second scan control terminal.Type: ApplicationFiled: May 26, 2022Publication date: September 19, 2024Inventors: Jingwen ZHANG, Yonglin GUO
-
Publication number: 20240290259Abstract: In a pixel circuit, a first reset transistor is coupled between a gate of a drive transistor and an initialization signal terminal, and a gate of the first reset transistor is coupled to a reset control terminal; a compensation transistor is coupled between the gate and a first electrode of the drive transistor, and a gate of the compensation transistor is coupled to a first scan control terminal; a data writing transistor is coupled between a second electrode of the drive transistor and a data signal terminal, and a gate of the data writing transistor is coupled to a second scan control terminal; a first light emitting control transistor is coupled between the second electrode of the drive transistor and a first power supply terminal, and a gate of the first light emitting control transistor is coupled to a light emitting control terminal.Type: ApplicationFiled: May 30, 2022Publication date: August 29, 2024Inventors: Yonglin GUO, Jingwen ZHANG, Tingliang LIU
-
Publication number: 20240274085Abstract: A display panel and a display apparatus are disclosed. The display panel includes: a display region, including M first display regions sequentially disposed along a first direction, and a non-display region, including M first GOA circuits and M clock signal line groups; a first display region includes multiple first signal lines sequentially disposed along the first direction and extending along a second direction intersecting with the first direction, a clock signal line group includes multiple clock signal lines, signals of at least two clock signal lines respectively in at least two clock signal line groups are same; a first GOA circuit includes multiple first GOA units, multiple first GOA units in an m-th first GOA circuit are connected with at least one clock signal line in an m-th clock signal line group, and are connected with multiple first signal lines in an m-th first display region in one-to-one correspondence.Type: ApplicationFiled: June 30, 2022Publication date: August 15, 2024Inventors: Yonglin GUO, Yunsheng XIAO, Wenhui GAO
-
Patent number: 11968870Abstract: The present disclosure provides a display panel and a display device. The display panel includes a display region; the display region includes a first display region and a second display region arranged in a second direction; each scanning signal line in the first display region is electrically connected with less pixels than each scanning signal line in the second display region; the first display region is divided into a first sub-display region and a second sub-display region arranged in the second direction; and the first sub-display region is located at the side far away from the second display region.Type: GrantFiled: July 20, 2020Date of Patent: April 23, 2024Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Yonglin Guo, Kai Zhang, Yunsheng Xiao, Tingliang Liu
-
Patent number: 11910668Abstract: Provided are a display panel and a manufacturing method thereof, and a display device. At least one sub-pixel comprises a light emitting element; a first transistor comprising a first active layer comprising first and second electrode regions connected to data line and power line respectively; a capacitor; a second transistor comprising a second active layer; a third transistor comprising a third gate connected to a reset line, and a third active layer comprising a third channel region. Orthographic projections of the power line, the reset line, the third channel region and the data line are first, second, third and fourth projections respectively. The region of first, second, and third projections overlapping with each other is first region, and regions of first projection overlapping with second projection and not overlapping with third projection comprise a third region and a second region having an area not smaller than the third region.Type: GrantFiled: February 27, 2020Date of Patent: February 20, 2024Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Yonglin Guo, Kai Zhang, Dan Cao, Sangwon Lee
-
Patent number: 11611100Abstract: A cell (1) includes a flat electrode assembly formed by superposing and winding respective starting ends of a first electrode sheet (10), a first separator (30), a second electrode sheet (20), and a second separator (40). A first electrode tab (50) and a second electrode tab (60) are both located in grooves of the membranes. Respective starting ends of a second outer membrane (202) and a second inner membrane (203) are both aligned with a starting end of the second current collector (201), and a starting end of a first outer membrane (102) is aligned with a starting end of the first current collector (101). A first head section (106) is provided on a surface of the first current collector (101) facing a center of the cell, and a starting end of the first head section (106) is aligned with the first current collector (101).Type: GrantFiled: June 27, 2019Date of Patent: March 21, 2023Assignee: NINGDE AMPEREX TECHNOLOGY LIMITEDInventor: Yonglin Guo
-
Publication number: 20230005410Abstract: A display panel and a display device are provided. The display panel includes: a display region and a peripheral region surrounding the display region. The display region comprises a first display sub-region and a second display sub-region. The width-to-length ratio of a channel region of an output transistor in a second gate shift register corresponding to the second display sub-region is decreased so as to reduce the charging time of pixels in the second display sub-region, so that the brightness of the pixels in the second display sub-region is consistent with the brightness region of pixels in the first display sub-region. The configuration facilitates achieving a narrow bezel while improving the display uniformness of the display panel without changing the existing circuit structure and occupying the additional bezel area.Type: ApplicationFiled: January 13, 2021Publication date: January 5, 2023Inventors: Xinyu WEI, Kai ZHANG, Yonglin GUO, Yunsheng XIAO, Miao WANG, Hongmei FAN
-
Patent number: 11495647Abstract: Disclosed herein is a display substrate of a display panel, comprising: a support; a second layer on the support; a window extending through the second layer and optically coupled with an image sensor; and a sidewall at least partially surrounding the window; wherein the sidewall is configured to attenuate transmission of light through the sidewall.Type: GrantFiled: February 2, 2019Date of Patent: November 8, 2022Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.Inventors: Yonglin Guo, Tingliang Liu, Kai Zhang, Yuan Yao, Yi Zhang
-
Patent number: 11488522Abstract: A display substrate and a method for driving the display substrate are provided in the present disclosure. The display substrate includes a plurality of pixel units arranged in an array and a power supply signal structure configured to apply a power supply voltage signal to each pixel unit. The power supply signal structure includes: a plurality of driving voltage signal VDD lines, a first power supply voltage signal VDD1 line connected to a first end of each driving voltage signal VDD line, and configured to apply a first power supply voltage V1 to the first end of the driving voltage signal line, and a second power supply voltage signal VDD2 line connected to a second end of the driving voltage signal VDD line, and configured to apply a power supply voltage V2 to the second end of the driving voltage signal VDD line.Type: GrantFiled: August 31, 2020Date of Patent: November 1, 2022Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., Beijing BOE Technology Development Co., Ltd.Inventors: Yonglin Guo, Yidan Zhu, Tingliang Liu, Yiran Li, Xinyu Wei, Kai Zhang