Abstract: Provided is a display substrate, including a base substrate and a plurality of pixel units arranged on the base substrate; each pixel unit includes constant voltage terminals and a dual-gate transistor; a part of an active region of each dual-gate transistor, which is located between two gates, is an intermediate part; except the pixel units closest to the first side, each pixel unit includes a compensation structure; the compensation structure is connected to one of the constant voltage terminals of the pixel unit where the compensation structure is located, and compensates for at least one dual-gate transistor of a pixel unit adjacent to the pixel unit where the compensation structure is located in a direction toward the first side; the compensation structure overlaps and is insulated from the intermediate part of the dual-gate transistor for which the compensation structure compensates.

Abstract: A pixel circuit, a driving method therefor, and a display device are disclosed. In the pixel circuit, a first reset transistor is coupled between a first electrode of a light emitting device and a first initialization signal terminal, and a gate of the first reset transistor is coupled to a first light emitting control terminal; a second electrode of the light emitting device is coupled to a first power supply terminal; a compensation transistor is coupled between a gate and a first electrode of a drive transistor, and a gate of the compensation transistor is coupled to a first scan control terminal; a data writing transistor is coupled between a second electrode of the drive transistor and a data signal terminal, and a gate of the data writing transistor is coupled to a second scan control terminal.

Abstract: In a pixel circuit, a first reset transistor is coupled between a gate of a drive transistor and an initialization signal terminal, and a gate of the first reset transistor is coupled to a reset control terminal; a compensation transistor is coupled between the gate and a first electrode of the drive transistor, and a gate of the compensation transistor is coupled to a first scan control terminal; a data writing transistor is coupled between a second electrode of the drive transistor and a data signal terminal, and a gate of the data writing transistor is coupled to a second scan control terminal; a first light emitting control transistor is coupled between the second electrode of the drive transistor and a first power supply terminal, and a gate of the first light emitting control transistor is coupled to a light emitting control terminal.

Abstract: A display panel and a display apparatus are disclosed. The display panel includes: a display region, including M first display regions sequentially disposed along a first direction, and a non-display region, including M first GOA circuits and M clock signal line groups; a first display region includes multiple first signal lines sequentially disposed along the first direction and extending along a second direction intersecting with the first direction, a clock signal line group includes multiple clock signal lines, signals of at least two clock signal lines respectively in at least two clock signal line groups are same; a first GOA circuit includes multiple first GOA units, multiple first GOA units in an m-th first GOA circuit are connected with at least one clock signal line in an m-th clock signal line group, and are connected with multiple first signal lines in an m-th first display region in one-to-one correspondence.

Abstract: The present disclosure provides a display panel and a display device. The display panel includes a display region; the display region includes a first display region and a second display region arranged in a second direction; each scanning signal line in the first display region is electrically connected with less pixels than each scanning signal line in the second display region; the first display region is divided into a first sub-display region and a second sub-display region arranged in the second direction; and the first sub-display region is located at the side far away from the second display region.

Abstract: Provided are a display panel and a manufacturing method thereof, and a display device. At least one sub-pixel comprises a light emitting element; a first transistor comprising a first active layer comprising first and second electrode regions connected to data line and power line respectively; a capacitor; a second transistor comprising a second active layer; a third transistor comprising a third gate connected to a reset line, and a third active layer comprising a third channel region. Orthographic projections of the power line, the reset line, the third channel region and the data line are first, second, third and fourth projections respectively. The region of first, second, and third projections overlapping with each other is first region, and regions of first projection overlapping with second projection and not overlapping with third projection comprise a third region and a second region having an area not smaller than the third region.

Abstract: A cell (1) includes a flat electrode assembly formed by superposing and winding respective starting ends of a first electrode sheet (10), a first separator (30), a second electrode sheet (20), and a second separator (40). A first electrode tab (50) and a second electrode tab (60) are both located in grooves of the membranes. Respective starting ends of a second outer membrane (202) and a second inner membrane (203) are both aligned with a starting end of the second current collector (201), and a starting end of a first outer membrane (102) is aligned with a starting end of the first current collector (101). A first head section (106) is provided on a surface of the first current collector (101) facing a center of the cell, and a starting end of the first head section (106) is aligned with the first current collector (101).

Abstract: A display panel and a display device are provided. The display panel includes: a display region and a peripheral region surrounding the display region. The display region comprises a first display sub-region and a second display sub-region. The width-to-length ratio of a channel region of an output transistor in a second gate shift register corresponding to the second display sub-region is decreased so as to reduce the charging time of pixels in the second display sub-region, so that the brightness of the pixels in the second display sub-region is consistent with the brightness region of pixels in the first display sub-region. The configuration facilitates achieving a narrow bezel while improving the display uniformness of the display panel without changing the existing circuit structure and occupying the additional bezel area.

Abstract: Disclosed herein is a display substrate of a display panel, comprising: a support; a second layer on the support; a window extending through the second layer and optically coupled with an image sensor; and a sidewall at least partially surrounding the window; wherein the sidewall is configured to attenuate transmission of light through the sidewall.

Abstract: A display substrate and a method for driving the display substrate are provided in the present disclosure. The display substrate includes a plurality of pixel units arranged in an array and a power supply signal structure configured to apply a power supply voltage signal to each pixel unit. The power supply signal structure includes: a plurality of driving voltage signal VDD lines, a first power supply voltage signal VDD1 line connected to a first end of each driving voltage signal VDD line, and configured to apply a first power supply voltage V1 to the first end of the driving voltage signal line, and a second power supply voltage signal VDD2 line connected to a second end of the driving voltage signal VDD line, and configured to apply a power supply voltage V2 to the second end of the driving voltage signal VDD line.

Abstract: A display substrate includes: a base substrate having a display area and a peripheral area surrounding the display area; an electroluminescent device disposed on the base substrate and located in the display area, the electroluminescent device including an anode, an electroluminescent layer, and a cathode disposed in this order on the base substrate; a negative power line disposed on the base substrate and located in the peripheral area, the negative power line extending along a side of the base substrate and being electrically connected to the cathode; and an insulating layer between the base substrate and the negative power line, a side of the insulating layer close to the negative power line being provided with at least a trench. The trench is located in the peripheral area and extends in an extending direction of the negative power line, a part of the negative power line being located in the trench.

Abstract: Provided are a display panel and a manufacturing method thereof, and a display device. At least one sub-pixel comprises a light emitting element; a first transistor comprising a first active layer comprising first and second electrode regions connected to data line and power line respectively; a capacitor; a second transistor comprising a second active layer; a third transistor comprising a third gate connected to a reset line, and a third active layer comprising a third channel region. Orthographic projections of the power line, the reset line, the third channel region and the data line are first, second, third and fourth projections respectively. The region of first, second, and third projections overlapping with each other is first region, and regions of first projection overlapping with second projection and not overlapping with third projection comprise a third region and a second region having an area not smaller than the third region.

Abstract: The present disclosure provides an electroluminescent display panel and a display apparatus. The electroluminescent display panel includes at least one regular-shaped display region and at least one irregular-shaped display region, and the display panel further includes at least one first load compensation circuit in the at least one irregular-shaped display region. The at least one first load compensation circuit is electrically coupled to one of the at least one gate line, and the at least one first load compensation circuit is electrically coupled to a same gate line to which the at least one pixel unit is electrically coupled, at a side close to the at least one gate line signal input terminal with respect to the at least one pixel unit.

Abstract: Provided is a display substrate, including a base substrate and a plurality of pixel units arranged on the base substrate; each pixel unit includes constant voltage terminals and a dual-gate transistor; a part of an active region of each dual-gate transistor, which is located between two gates, is an intermediate part; except the pixel units closest to the first side, each pixel unit includes a compensation structure; the compensation structure is connected to one of the constant voltage terminals of the pixel unit where the compensation structure is located, and compensates for at least one dual-gate transistor of a pixel unit adjacent to the pixel unit where the compensation structure is located in a direction toward the first side; the compensation structure overlaps and is insulated from the intermediate part of the dual-gate transistor for which the compensation structure compensates.

Abstract: The present disclosure provides a pixel driving circuit, a display panel and a display apparatus. The pixel driving circuit includes: a first connection line, a second power supply line and a data writing unit. The first connection line is coupled to a gate of at least one transistor in the data writing unit. The first connection line includes at least a first section and a second section coupled to each other, a width of the first section is greater than a width of the second section, and an orthographic projection of the first connection line on the substrate and an orthographic projection of the second power supply line on the substrate overlap with each other to form a first overlapping region, and the first section extends through the first overlapping region.

Abstract: The present disclosure provides a display panel and a display device. The display panel includes a display region; the display region includes a first display region and a second display region arranged in a second direction; each scanning signal line in the first display region is electrically connected with less pixels than each scanning signal line in the second display region; the first display region is divided into a first sub-display region and a second sub-display region arranged in the second direction; and the first sub-display region is located at the side far away from the second display region.

Abstract: The present disclosure provides a display substrate, including: a display area having a contour, at least a portion of the contour having a curved shape, the display area being divided into a plurality of sub-display areas, at least one of the sub-display areas close to an edge of the display area having a contour conformal to the contour of the display area. The at least one sub-display area includes a plurality of sub-pixels arranged therein along an extending direction of the contour of the sub-display area.

Abstract: An encapsulation structure includes a first inorganic layer, a first organic layer and a second inorganic layer, all of which are sequentially stacked in a thickness direction of the encapsulation structure. At least one of the first inorganic layer or the second inorganic layer is a crack-resistant layer.

Abstract: A display substrate and a method for driving the display substrate are provided in the present disclosure. The display substrate includes a plurality of pixel units arranged in an array and a power supply signal structure configured to apply a power supply voltage signal to each pixel unit. The power supply signal structure includes: a plurality of driving voltage signal VDD lines, a first power supply voltage signal VDD1 line connected to a first end of each driving voltage signal VDD line, and configured to apply a first power supply voltage V1 to the first end of the driving voltage signal line, and a second power supply voltage signal VDD2 line connected to a second end of the driving voltage signal VDD line, and configured to apply a power supply voltage V2 to the second end of the driving voltage signal VDD line.

Abstract: Disclosed herein is a display substrate of a display panel, comprising: a support; a second layer on the support; a window extending through the second layer and optically coupled with an image sensor; and a sidewall at least partially surrounding the window; wherein the sidewall is configured to attenuate transmission of light through the sidewall.