Patents by Inventor Yongsheng Liu
Yongsheng Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12270757Abstract: Disclosed is a method for determining the dynamic adsorption retention of polymer capsules, belonging to the technical field of oil and gas field development engineering, which includes: (1) carrying out a thermal aging experiment to establish relational expressions between a capsule concentration and an aging time, as well as a polymer release concentration and the aging time; (2) setting up a polymer capsule displacement experimental device to determine the release concentration of polymers in effluent; (3) releasing polymers encapsulated by capsules in the effluent to acquire a total adsorption retention of polymers in a porous medium; and (4) inverting respective adsorption retentions of the capsule particles and the polymers in the porous medium.Type: GrantFiled: November 10, 2024Date of Patent: April 8, 2025Assignee: CHINA UNIVERSITY OF PETROLEUM (EAST CHINA)Inventors: Bei Wei, Yongsheng Liu, Jian Hou, Jiahe Sun, Kang Zhou, Yu Xue, Ningyu Zheng, Qingjun Du, Xuwen Qin, Yongge Liu
-
Publication number: 20250053613Abstract: Matrix multiply units can take advantage of input sparsity by zero gating ALUs, which saves power consumption, but compute throughput does not increase. To improve compute throughput from sparsity, processing resources in a matrix accelerator can skip computation with zero involved in input or output. If zeros in input can be skipped, the processing units can focus calculations on generating meaningful non-zero output.Type: ApplicationFiled: August 22, 2024Publication date: February 13, 2025Applicant: Intel CorporationInventors: Chunhui Mei, Hong Jiang, Jiasheng Chen, Yongsheng Liu, Yan Li
-
Publication number: 20240427486Abstract: Example icon moving methods and apparatus are described. In one example, an electronic device displays a first number of application icons. The electronic device detects a first user operation including selecting a first application icon, and displays a second number of application icons in response to the first user operation. The electronic device detects a second user operation of releasing the first application icon, and changes an arrangement of the first application icon to a second location.Type: ApplicationFiled: September 27, 2022Publication date: December 26, 2024Inventors: Kai FAN, Yongsheng LIU, Xiongwei CAO
-
Publication number: 20240393321Abstract: The present disclosure provides a colloidal gold immunochromatographic joint inspection card for diquat and paraquat in the field of on-site rapid detection, as well as a preparation method and application. The joint inspection card includes a PVC base plate, where the PVC base plate is sequentially provided with a sample pad, a gold-labelled pad, a nitrocellulose membrane and a water-absorbing pad along the chromatographic direction; the gold-labelled pad is adsorbed with an antibody solution labeled with paraquat colloidal gold and an antibody solution labeled with diquat colloidal gold; the nitrocellulose membrane is provided with a T1 detection line, a T2 detection line and a quality control line along the chromatographic direction; and an area of the T1 detection line is coated with paraquat complete antigen, an area of the T2 detection line is coated with diquat complete antigen, and the quality control line is coated with goat anti-mouse IgG.Type: ApplicationFiled: April 25, 2024Publication date: November 28, 2024Inventors: Shangcheng XU, Guanyan FU, Yongsheng LIU, Yu DUAN, Tao LI, Wanjiang ZHAO, Wen PEI, Maosen ZHANG
-
Publication number: 20240320000Abstract: An apparatus to facilitate utilizing structured sparsity in systolic arrays is disclosed. The apparatus includes a processor comprising a systolic array to receive data from a plurality of source registers, the data comprising unpacked source data, structured source data that is packed based on sparsity, and metadata corresponding to the structured source data; identify portions of the unpacked source data to multiply with the structured source data, the portions of the unpacked source data identified based on the metadata; and output, to a destination register, a result of multiplication of the portions of the unpacked source data and the structured source data.Type: ApplicationFiled: March 29, 2024Publication date: September 26, 2024Applicant: Intel CorporationInventors: Subramaniam Maiyuran, Jorge Parra, Ashutosh Garg, Chandra Gurram, Chunhui Mei, Durgesh Borkar, Shubra Marwaha, Supratim Pal, Varghese George, Wei Xiong, Yan Li, Yongsheng Liu, Dipankar Das, Sasikanth Avancha, Dharma Teja Vooturi, Naveen K. Mellempudi
-
Patent number: 12086205Abstract: Matrix multiply units can take advantage of input sparsity by zero gating ALUs, which saves power consumption, but compute throughput does not increase. To improve compute throughput from sparsity, processing resources in a matrix accelerator can skip computation with zero involved in input or output. If zeros in input can be skipped, the processing units can focus calculations on generating meaningful non-zero output.Type: GrantFiled: March 24, 2021Date of Patent: September 10, 2024Assignee: Intel CorporationInventors: Chunhui Mei, Hong Jiang, Jiasheng Chen, Yongsheng Liu, Yan Li
-
Patent number: 12057291Abstract: An oxygen reduction device in an ion source region of inductively coupled plasma is provided. The oxygen reduction device includes a torch and an inflation sleeve. An upper end of the inflation sleeve is sealed and sleeved outside the torch, and a lower end of the inflation sleeve and the torch are arranged at an interval to form an inflation gap. An inflation hole communicating with the inflation gap is formed in an outer side wall of the inflation sleeve. An outer side face of the lower end of the inflation sleeve is protruded outwards to form an annular gas guiding protrusion. The annular gas guiding protrusion is configured for being arranged opposite to a sampling cone base arranged below the torch, and a gas outlet gap is formed between the annular gas guiding protrusion and the sampling cone base.Type: GrantFiled: October 31, 2022Date of Patent: August 6, 2024Assignees: China University of Geosciences, Hangzhou PuYu Technology Development Co., Ltd.Inventors: Yongsheng Liu, Xin Jiang, Xiaofeng Xia, Haibo Ding, Wengui Liu, Jie Lin, Chengyi Zhang, Shuimiao Lu, Lifei Chen
-
Publication number: 20240231957Abstract: Embodiments described herein provide a technique to facilitate the synchronization of workgroups executed on multiple graphics cores of a graphics core cluster. One embodiment provides a graphics core including a cache memory and a graphics core coupled with the cache memory. The graphics core includes execution resources to execute an instruction via a plurality of hardware threads and barrier circuitry to synchronize execution of the plurality of hardware threads, wherein the barrier circuitry is configured to provide a plurality of re-usable named barriers.Type: ApplicationFiled: October 25, 2022Publication date: July 11, 2024Applicant: Intel CorporationInventors: Fangwen Fu, Chunhui Mei, John A. Wiegert, Yongsheng Liu, Ben J. Ashbaugh
-
Publication number: 20240220335Abstract: Synchronization for data multicast in compute core clusters is described. An example of an apparatus includes one or more processors including at least a graphics processing unit (GPU), the GPU including one or more clusters of cores and a memory, wherein each cluster of cores includes a plurality of cores, each core including one or more processing resources, shared local memory, and gateway circuitry, wherein the GPU is to initiate broadcast of a data element from a producer core to one or more consumer cores, and synchronize the broadcast of the data element utilizing the gateway circuitry of the producer core and the one or more consumer cores, and wherein synchronizing the broadcast of the data element includes establishing a multi-core barrier for broadcast of the data element.Type: ApplicationFiled: December 30, 2022Publication date: July 4, 2024Applicant: Intel CorporationInventors: Chunhui Mei, Yongsheng Liu, John A. Wiegert, Vasanth Ranganathan, Ben J. Ashbaugh, Fangwen Fu, Hong Jiang, Guei-Yuan Lueh, James Valerio, Alan M. Curtis, Maxim Kazakov
-
Publication number: 20240220420Abstract: Locally biased cache replacement for a clustered cache architecture is described. An example of an apparatus includes clusters of cores; a clustered cache including multiple cache partitions for the clusters of cores, each cache partition including multiple cachelines; and a computer memory including memory partitions, each of the cache partitions being associated with a respective local memory partition, wherein each cacheline of the cache partitions includes a cacheline tag, each cacheline tag including a local tag to indicate whether data stored in the cacheline is local data stored in the local memory partition or remote data stored in a remote memory partition, and a used tag to indicate whether data stored in the cacheline is recently accessed; and wherein the clustered cache includes circuitry to select cachelines for cache replacement in a cache partition based on values of the tags of the cachelines.Type: ApplicationFiled: December 30, 2022Publication date: July 4, 2024Applicant: Intel CorporationInventors: Chunhui Mei, Doddaballapur Jayasimha, Aravindh V. Anantaraman, Yongsheng Liu, Hong Jiang
-
Publication number: 20240220254Abstract: Data multicast in compute core clusters is described. An example of an apparatus includes one or more processors including at least a first processor, the first processor including one or more clusters of cores and a memory, wherein each cluster of cores includes multiple cores, each core including one or more processing resources, shared memory, and broadcast circuitry; and wherein a first core in a first cluster of cores is to request a data element, determine whether any additional cores in the first cluster require the data element, and, upon determining that one or more additional cores in the first cluster require the data element, broadcast the data element to the one or more additional cores via interconnects between the broadcast circuitry of the cores of the first core cluster.Type: ApplicationFiled: December 30, 2022Publication date: July 4, 2024Applicant: Intel CorporationInventors: Chunhui Mei, Yongsheng Liu, John A. Wiegert, Vasanth Ranganathan, Ben J. Ashbaugh, Fangwen Fu, Hong Jiang, Guei-Yuan Lueh, James Valerio, Alan M. Curtis, Maxim Kazakov
-
Publication number: 20240211258Abstract: Remote atomics for clustered processing operations are described. An example of a graphics processor includes a clustered processing architecture including multiple clusters and one or more memory elements, including a first memory element containing a home agent, the apparatus to receive, at a first caching agent for a first cluster, a request for performance of an atomic operation requiring a data stored in a cacheline at a memory address associated with the home agent; evaluate one or more factors including a current ownership of the memory address; and, based at least in part on the factors, determine whether to perform the atomic operation at the first caching agent or to forward the atomic operation to the home agent for performance of the atomic operation.Type: ApplicationFiled: December 22, 2022Publication date: June 27, 2024Applicant: Intel CorporationInventors: Yuvraj Dhillon, Doddaballapur Jayasimha, Aravindh V. Anantaraman, Yongsheng Liu
-
Publication number: 20240183270Abstract: A gel particle-containing discontinuous phase seepage experimental apparatus includes a micro-liquid volume injection system, a pressure acquisition and transmission system, a microscopic observation system, and an in-microchannel particle screening and transfer system. According to the established discontinuous phase seepage experimental apparatus, particle sizes of gel particles are accurately screened by using a customized microfluidic chip, and transfer forms, existing states, pressure fluctuations, and the like of gel particles in a single-channel microfluidic chip under the conditions of different sizes, different elastic modulus, and different quantities are monitored in real-time by using a high-precision pressure sensing system and a microscopic observation system.Type: ApplicationFiled: July 28, 2023Publication date: June 6, 2024Inventors: Jian Hou, Bei Wei, Yongsheng Liu, Kang Zhou, Qingjun Du, Yongge Liu, Ermeng Zhao, Dejun Wu
-
Patent number: 11977885Abstract: An apparatus to facilitate utilizing structured sparsity in systolic arrays is disclosed. The apparatus includes a processor comprising a systolic array to receive data from a plurality of source registers, the data comprising unpacked source data, structured source data that is packed based on sparsity, and metadata corresponding to the structured source data; identify portions of the unpacked source data to multiply with the structured source data, the portions of the unpacked source data identified based on the metadata; and output, to a destination register, a result of multiplication of the portions of the unpacked source data and the structured source data.Type: GrantFiled: November 30, 2020Date of Patent: May 7, 2024Assignee: INTEL CORPORATIONInventors: Subramaniam Maiyuran, Jorge Parra, Ashutosh Garg, Chandra Gurram, Chunhui Mei, Durgesh Borkar, Shubra Marwaha, Supratim Pal, Varghese George, Wei Xiong, Yan Li, Yongsheng Liu, Dipankar Das, Sasikanth Avancha, Dharma Teja Vooturi, Naveen K. Mellempudi
-
Publication number: 20240134719Abstract: Embodiments described herein provide a technique to facilitate the synchronization of workgroups executed on multiple graphics cores of a graphics core cluster. One embodiment provides a graphics core including a cache memory and a graphics core coupled with the cache memory. The graphics core includes execution resources to execute an instruction via a plurality of hardware threads and barrier circuitry to synchronize execution of the plurality of hardware threads, wherein the barrier circuitry is configured to provide a plurality of re-usable named barriers.Type: ApplicationFiled: October 24, 2022Publication date: April 25, 2024Applicant: Intel CorporationInventors: Fangwen Fu, Chunhui Mei, John A. Wiegert, Yongsheng Liu, Ben J. Ashbaugh
-
Patent number: 11912932Abstract: An encapsulated polymer flooding method and system for enhancing oil recovery includes: (1) determining reservoir parameters, a well deployment, and a development dynamic state of a target oil reservoir; (2) determining a near-wellbore targeted profile control area and a far-wellbore targeted viscosification area; (3) designing and synthesizing an encapsulated polymer according to conditions of the target oil reservoir; (4) evaluating and determining whether the anti-shearing performance, the sustained release and viscosification performance, the injection performance, and the profile control performance of the encapsulated polymer meet expected performance requirements based on laboratory tests; (5) formulating an injection scheme for an encapsulated polymer flooding field; and (6) monitoring the development dynamic state of the oil reservoir; according to the present disclosure, the polymer is wrapped with a shell layer, which greatly reduces the shear degradation during injection of the polymer and effectiType: GrantFiled: June 21, 2023Date of Patent: February 27, 2024Assignee: CHINA UNIVERSITY OF PETROLEUM (EAST CHINA)Inventors: Jian Hou, Bei Wei, Yongsheng Liu, Kang Zhou, Qingjun Du, Yongge Liu
-
Patent number: 11801289Abstract: The present disclosure provides a subunit vaccine of contagious caprine pleuropneumonia and preparation method and use thereof, belonging to the technical field of preparation of animal infectious disease vaccine. The combination of Mycoplasma capricolum subsp. capripneumoniae immunoproteins comprises Mycoplasma capricolum subsp. capripneumoniae immunoproteins A, B, C, D and E; the mass ratio of Mycoplasma capricolum subsp. capripneumoniae immunoproteins A, B, C, D and E is (0.5-1.5):(0.5-1.5):(0.5-1.5):(0.5-1.5):(0.5-1.5). The subunit vaccine of contagious caprine pleuropneumonia comprises the combination of Mycoplasma capricolum subsp. capripneumoniae immunoproteins and adjuvant; the subunit vaccine has the advantages of high safety, good immunization effect, high stability and minor adverse effects.Type: GrantFiled: June 1, 2021Date of Patent: October 31, 2023Assignee: Lanzhou Veterinary Research Institute, Chinese Academy of Agricultural SciencesInventors: Yuefeng Chu, Shengli Chen, Huafang Hao, Xinmin Yan, Lina Ma, Yongsheng Liu
-
Patent number: 11709281Abstract: The present invention discloses a high-precision point positioning method and device based on a smartphone. The method of the present invention, which belongs to the technical field of satellite positioning, improves the conventional PPP uncombined positioning model, and only uses original GNSS observation values received by a smartphone to carry out high-precision positioning without GNSS reference stations.Type: GrantFiled: January 16, 2020Date of Patent: July 25, 2023Assignee: SOUTHEAST UNIVERSITYInventors: Chengfa Gao, Bo Chen, Yongsheng Liu, Puyu Sun
-
Patent number: D1025442Type: GrantFiled: November 2, 2023Date of Patent: April 30, 2024Inventor: Yongsheng Liu
-
Patent number: D1025443Type: GrantFiled: November 2, 2023Date of Patent: April 30, 2024Inventor: Yongsheng Liu