Abstract: There is provided a multi-mode power amplifier operable in a low power mode having a preset power range and in a high power mode having a power range higher than the power range of the low power mode. The multi-mode power amplifier includes: a high power amplifying unit including at least one cascode amplifier to amplify an input signal to a high power level having a preset power range; a low power amplifying unit sharing a common source node of the at least one cascode amplifier to amplify the input signal to a low power level having a power range lower than the high power level; and a coupling unit coupling a transfer path of a signal output from the high power amplifying unit and a transfer path of a signal output from the low power amplifying unit to each other.

Abstract: There is provided a power amplifier including an amplifying unit having at least two cascode amplifiers connected in parallel to amplify an input signal; and a bias supply unit supplying bias power to a common gate node of the two cascode amplifiers, and removing a signal of a pre-set frequency band corresponding to a baseband at the common gate node by controlling impedance of the common gate node.

Abstract: Disclosed is a CMOS power amplifier. A temperature compensation circuit of a CMOS power amplifier may include: a bias circuit unit supplying a gate bias voltage to a power amplification circuit part; a bias detection unit determining a class type of the power amplification circuit part according to the gate bias voltage; a temperature detection unit detecting a temperature-proportional voltage in proportion to ambient temperature; a temperature compensation control unit generating a compensation control value according to the temperature-proportion voltage in the class type determined by the bias detection unit; and a conversion unit converting the compensation control value of the temperature compensation control unit into a linear bias control value and providing the linear bias control value to the bias circuit unit, wherein the bias circuit unit compensates the gate bias voltage according to the linear bias control value of the conversion unit.

Abstract: Disclosed herein is a power amplifier. The power amplifier includes a first common source transistor for amplifying an input signal into a predetermined level, a second common source transistor for compensating for input capacitance and performing auxiliary amplification for the first common source transistor, and a common gate transistor connected to the first common source transistor in a cascode structure, configured to be connected in parallel to the second common source transistor and prevent the first common source transistor from breaking down, and configured to output a signal amplified by a value obtained by adding the gain of the first common source transistor and the gain of the second common source transistor to each other.

Abstract: There is provided a power amplifier capable of supplying variable bias to an amplifier circuit by accurately transferring the envelope components of an input signal during the supply of active bias power to the amplifier circuit. The power amplifier includes: an envelope detector detecting an envelope of an input signal; a bias power generator including at least one P-type MOSFET and one N-type MOSFET connected to each other in an inverter manner between a driving power terminal supplying driving power having a preset voltage level and a reference bias power terminal supplying preset reference bias power to generate bias power varied according to detection results from the envelope detector; and an amplifier amplifying the input signal according to the bias power level from the bias power generator.

Abstract: There is provided a power amplifier reducing a gain mismatch in order to reduce a gain mismatch between an N MOS amplifier and a P MOS amplifier by cross-connecting outputs from a two-stage amplification unit in a power amplifier having amplification units with a stacked structure in which the N MOS amplifier and the P MOS amplifier are connected in series with each other.

Abstract: There is provided a power amplifier that can maintain a constant gain by detecting a level of a signal being input and a level of a signal being output. A power amplifier according to an aspect of the invention may include: an amplification section having at least one amplification unit amplifying an input signal according to an adjustable gain to thereby output the amplified input signal; a detection section detecting signal levels of an input signal and an output signal of the amplification section; and a gain maintaining section controlling a bias power according to a detection result of the detection section so that a gain of the amplification section is maintained within a predetermined gain range.

Abstract: There is provided a power amplifier with a variable supply of bias power according to a look-up table having a voltage value determined based on a level of an RF signal being input to the power amplifier to thereby increase power efficiency. A power amplifier according to an aspect of the invention may include an amplification section amplifying an input signal according to a bias voltage being supplied; and a bias supply section comparing a level of the input signal with a look-up table set in advance and supplying a bias voltage to the amplification section according to a result of the comparison.

Abstract: Disclosed is a power amplifier. A power amplifier according to an aspect of the invention may include: a first amplification section having a first N metal oxide semiconductor (MOS) amplifier and a second N MOS amplifier connected in a cascode configuration and amplifying an input signal; a second amplification section having a first P MOS amplifier and a second P MOS amplifier connected in a cascode configuration and amplifying the input signal; and a power combining section combining respective output signals of the first amplification section and the second amplification section.

Abstract: Disclosed is a CMOS power amplifier. A temperature compensation circuit of a CMOS power amplifier may include: a bias circuit unit supplying a gate bias voltage to a power amplification circuit part; a bias detection unit determining a class type of the power amplification circuit part according to the gate bias voltage; a temperature detection unit detecting a temperature-proportional voltage in proportion to ambient temperature; a temperature compensation control unit generating a compensation control value according to the temperature-proportion voltage in the class type determined by the bias detection unit; and a conversion unit converting the compensation control value of the temperature compensation control unit into a linear bias control value and providing the linear bias control value to the bias circuit unit, wherein the bias circuit unit compensates the gate bias voltage according to the linear bias control value of the conversion unit.

Abstract: A received signal strength indicator according to an aspect of the invention may include a gain calibration section including a calibration limiter, a calibration load unit and a comparison and adjustment unit. The calibration load unit is connected to output terminals of the calibration limiter, and generating an output differential voltage whose gain is a unit gain when a predetermined input differential voltage is input to the calibration limiter, and a comparison and adjustment unit comparing the input differential voltage with the output differential voltage, and adjusting an output of a variable current source included in the calibration limiter so that the input differential voltage becomes identical to the output differential voltage.

Abstract: A buffer amplifier has high input impedance and is less affected by temperature by supplying independent bias power to each of amplification units. The buffer amplifier includes a bias supply unit supplying bias power having a preset voltage level, an amplification unit receiving preset driving power and the bias power from the bias supply unit to amplify an input signal, and a compensation unit compensating for current unbalance of the driving power supplied to the amplification unit.

Abstract: An active balun with a stacked structure includes: a first amplification unit including a first transistor having a first terminal connected with a first input terminal, a second terminal connected with a power voltage terminal, and a third terminal connected with an output terminal; a second amplification unit including a second transistor having a first terminal connected with a second input terminal, a second terminal connected with the output terminal, and a third terminal connected with a ground; and a capacitance matching unit connected between the first terminal and the third terminal of the first transistor and having a pre-set matching capacitance.

Abstract: Disclosed is a step variable gain amplifier for linearly amplifying a signal received from an antenna. The step variable gain amplifier includes: an amplification unit for converting and amplifying a voltage component of a received signal into a current voltage according to a step amplification control signal; a controller for generating a step amplification control signal of the received signal and controlling on/off of the amplification unit according to the control signal; and an output unit connected to the amplification unit, the output unit outputting a voltage component from the signal that has been subjected to conversion into the current component and amplification processes.

Abstract: The present relates to a fractional-N frequency synthesizer improving noise characteristics and a method thereof.

Abstract: There is provided a power amplifier that can maintain a constant gain by detecting a level of a signal being input and a level of a signal being output. A power amplifier according to an aspect of the invention may include: an amplification section having at least one amplification unit amplifying an input signal according to an adjustable gain to thereby output the amplified input signal; a detection section detecting signal levels of an input signal and an output signal of the amplification section; and a gain maintaining section controlling a bias power according to a detection result of the detection section so that a gain of the amplification section is maintained within a predetermined gain range.

Abstract: Disclosed herein is a power amplifier. The power amplifier includes a first common source transistor for amplifying an input signal into a predetermined level, a second common source transistor for compensating for input capacitance and performing auxiliary amplification for the first common source transistor, and a common gate transistor connected to the first common source transistor in a cascode structure, configured to be connected in parallel to the second common source transistor and prevent the first common source transistor from breaking down, and configured to output a signal amplified by a value obtained by adding the gain of the first common source transistor and the gain of the second common source transistor to each other.

Abstract: Disclosed herein is a power amplification module for a mobile communication terminal. The power amplification module includes a balanced power amplifier configured to divide an input signal using a phase difference, amplify resulting signals, and combine the amplified signals with each other, and a transmission power detection unit connected to an isolation terminal formed on an output side of the balanced power amplifier and configured to amplify a micro-power signal, which is transmitted to the isolation terminal from an outside of the transmission power detection unit, and to transmit the amplified signal. Accordingly, since the detection signal to input terminal and detection signal output terminal of a transmission power detection unit can be easily implemented using an internal circuit, the entire size of the power amplification module can be reduced. Further, characteristic of isolation between the detection signal input terminal and the detection signal output terminal can be improved.

Abstract: There is provided a power amplifier with a variable supply of bias power according to a look-up table having a voltage value determined based on a level of an RF signal being input to the power amplifier to thereby increase power efficiency. A power amplifier according to an aspect of the invention may include an amplification section amplifying an input signal according to a bias voltage being supplied; and a bias supply section comparing a level of the input signal with a look-up table set in advance and supplying a bias voltage to the amplification section according to a result of the comparison.

Abstract: There is provided a wide-band amplifier circuit with improved gain flatness. The wide-band amplifier circuit includes a first resonant load unit connected to an operating power terminal, providing a preset first load, and forming a preset first resonant point, a second resonant load unit connected to the operating power terminal, providing a preset second load, and forming a second resonant point set to a frequency different from the first resonant point; a first amplification unit receiving operating power via the first load of the first resonant load unit, having an amplification band characteristic determined according to the first resonant point of the first resonant load unit, and amplifying an input signal; and a second amplification unit receiving operating power via the second load, having an amplification band characteristic determined according to the second resonant point, and amplifying an input signal from the first amplification unit.