Patents by Inventor Yoojin Kim
Yoojin Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11954502Abstract: Disclosed is an electronic apparatus, including: a storage; and a processor configured to execute a first execution code based on first configuration information in response to an execution event of a program including the first execution code and the first configuration information stored in the storage, update the program by replacing the first execution code and the first configuration information with a second execution code and second configuration information in response to an update event of the program, and update the first configuration information to the second configuration information while maintaining the first execution code in response to the update event of the first configuration information.Type: GrantFiled: April 19, 2019Date of Patent: April 9, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kyungmin Kang, Iksoon Kim, Yoojin Park, Surngkyo Oh, Bongwon Seo, Cheulhee Hahm
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Publication number: 20240095532Abstract: A method of processing data includes identifying a sparsity among information, included in input data, based on valid information or invalid information included in the input data, rearranging the input data based on the sparsity among the information indicating a distribution of the invalid values included in the input data, and generating, by performing an operation on the rearranged input data in the neural network, an output data.Type: ApplicationFiled: November 29, 2023Publication date: March 21, 2024Applicant: Samsung Electronics Co., Ltd.Inventors: Hyunsun PARK, Yoojin KIM, Hyeongseok YU, Sehwan LEE, Junwoo JANG
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Publication number: 20240074270Abstract: A light-emitting device includes: a plurality of first electrodes respectively disposed in a first subpixel, a second subpixel, and a third subpixel; a second electrode facing the plurality of first electrodes; a first emission layer disposed in the first subpixel to emit a first-color light; a second emission layer disposed in the second subpixel to emit a second-color light; a first layer disposed between the second electrode and each of the first emission layer and the second emission layer, and integrated with the first subpixel, the second subpixel, and the third subpixel; a hole transport region disposed between the plurality of first electrodes and each of the first layer, the first emission layer, and the second emission layer; a first auxiliary layer disposed between the hole transport region and the first emission layer; and a first intermediate layer disposed between the first auxiliary layer and the first emission layer.Type: ApplicationFiled: October 25, 2023Publication date: February 29, 2024Inventors: Pyungeun Jeon, Yoojin Sohn, Juwon Lee, Wonjong Kim
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Patent number: 11875255Abstract: A method of processing data in a neural network, includes identifying a sparsity of input data, based on valid information included in the input data in which the input data includes valid values and invalid values, generate rearranged input data, based on a form of the sparsity by rearranging, in the input data, location of at least one of the valid values and the invalid values, and generating, by performing a convolution on the rearranged input data in the neural network, an output.Type: GrantFiled: February 27, 2020Date of Patent: January 16, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Hyunsun Park, Yoojin Kim, Hyeongseok Yu, Sehwan Lee, Junwoo Jang
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Patent number: 11840574Abstract: The present invention relates to an antibody that specifically binds to death receptor 5 (DR5) and has a function of killing cancer cells. Specifically, provided are an anti-DR5 antibody or antigen-binding fragment thereof, and a use of the antibody or antigen-binding fragment for preventing or treating cancer. The present invention is characterized in that the anti-DR5 antibody or antigen-binding fragment thereof is improved in terms of affinity to DR5, stability, and an effect of killing cancer cells.Type: GrantFiled: February 8, 2018Date of Patent: December 12, 2023Assignee: DONG-A ST CO., LTD.Inventors: Hyounmie Doh, Dongsop Lee, Hanyoung Lee, Yoojin Kim, Kyungmi Han, Eunee Jung, Donghyeon Kim, Eongsup Song, Kum-Joo Shin, Soyon Woo
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Patent number: 11797461Abstract: A data transmission method for a convolution operation, and a convolution operation apparatus including a fetcher that includes a loader, at least one sender, a buffer controller, and a reuse buffer. The method includes loading, by the loader, input data of an input feature map according to a loading order, based on input data stored in the reuse buffer, a shape of a kernel to be used for a convolution operation, and two-dimensional (2D) zero-value information of weights of the kernel; storing, by the buffer controller, the loaded input data in the reuse buffer of an address cyclically assigned according to the loading order; and selecting, by each of the at least one sender, input data corresponding to each output data of a convolution operation among the input data stored in the reuse buffer, based on one-dimensional (1D) zero-value information of the weights, and outputting the selected input data.Type: GrantFiled: July 6, 2022Date of Patent: October 24, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Hyunsun Park, Jun-Woo Jang, Yoojin Kim, Channoh Kim
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Patent number: 11763153Abstract: A processor-implemented neural network method includes: generating a bit vector based on whether each of a plurality of input activations within a neural network is 0; merging the bit vector into the input activations such that bit values within the neural network included in the bit vector are most significant bits (MSBs) of multi bit expressions of the input activations; merging the bit vector into weights such that the bit values included in the bit vector are MSBs of multi bit expressions of the weights; sorting the input activations and the weights based on bits corresponding to the MSBs; and implementing the neural network, including performing operations between the sorted input activations and the sorted weights.Type: GrantFiled: October 12, 2022Date of Patent: September 19, 2023Assignees: Samsung Electronics Co., Ltd., Seoul National University R&DB FoundationInventors: Yoojin Kim, Soonhoi Ha, Donghyun Kang, Jintaek Kang
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Publication number: 20230133381Abstract: The present invention relates to an antibody that specifically binds to death receptor 5 (DR5) and has a function of killing cancer cells. Specifically, provided are an anti-DR5 antibody or antigen-binding fragment thereof, and a use of the antibody or antigen-binding fragment for preventing or treating cancer. The present invention is characterized in that the anti-DR5 antibody or antigen-binding fragment thereof is improved in terms of affinity to DR5, stability, and an effect of killing cancer cells.Type: ApplicationFiled: February 8, 2018Publication date: May 4, 2023Inventors: Hyounmie DOH, Dongsop LEE, Hanyoung LEE, Yoojin KIM, Kyungmi HAN, Eunee JUNG, Donghyeon KIM, Eongsup SONG, Kum-Joo SHIN, Soyon WOO
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Publication number: 20230031471Abstract: A processor-implemented neural network method includes: generating a bit vector based on whether each of a plurality of input activations within a neural network is 0; merging the bit vector into the input activations such that bit values within the neural network included in the bit vector are most significant bits (MSBs) of multi bit expressions of the input activations; merging the bit vector into weights such that the bit values included in the bit vector are MSBs of multi bit expressions of the weights; sorting the input activations and the weights based on bits corresponding to the MSBs; and implementing the neural network, including performing operations between the sorted input activations and the sorted weights.Type: ApplicationFiled: October 12, 2022Publication date: February 2, 2023Applicants: Samsung Electronics Co., Ltd., Seoul National University R&DB FoundationInventors: Yoojin KIM, Soonhoi HA, Donghyun KANG, Jintaek KANG
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Patent number: 11501166Abstract: A processor-implemented neural network method includes: generating a bit vector based on whether each of a plurality of input activations within a neural network is 0; merging the bit vector into the input activations such that bit values within the neural network included in the bit vector are most significant bits (MSBs) of multi bit expressions of the input activations; merging the bit vector into weights such that the bit values included in the bit vector are MSBs of multi bit expressions of the weights; sorting the input activations and the weights based on bits corresponding to the MSBs; and implementing the neural network, including performing operations between the sorted input activations and the sorted weights.Type: GrantFiled: April 24, 2020Date of Patent: November 15, 2022Assignees: Samsung Electronics Co., Ltd., SEOUL NATIONAL UNIVERSITY R&DB FOUNDATIONInventors: Yoojin Kim, Soonhoi Ha, Donghyun Kang, Jintaek Kang
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Publication number: 20220342833Abstract: A data transmission method for a convolution operation, and a convolution operation apparatus including a fetcher that includes a loader, at least one sender, a buffer controller, and a reuse buffer. The method includes loading, by the loader, input data of an input feature map according to a loading order, based on input data stored in the reuse buffer, a shape of a kernel to be used for a convolution operation, and two-dimensional (2D) zero-value information of weights of the kernel; storing, by the buffer controller, the loaded input data in the reuse buffer of an address cyclically assigned according to the loading order; and selecting, by each of the at least one sender, input data corresponding to each output data of a convolution operation among the input data stored in the reuse buffer, based on one-dimensional (1D) zero-value information of the weights, and outputting the selected input data.Type: ApplicationFiled: July 6, 2022Publication date: October 27, 2022Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyunsun PARK, Jun-Woo JANG, Yoojin KIM, Channoh KIM
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Patent number: 11454749Abstract: An electronic device includes a housing including a first plate, a second plate facing away from the first plate, and a lateral member surrounding a space between the first plate and the second plate; a display visible through at least part of the first plate; and a glass construction constructing at least part of the second plate. The glass construction includes a glass plate including a first face outwardly facing the housing and a second face facing away from the first face, an inorganic layer including a first roughness and constructed on the first face, a first polymer layer disposed between the first plate and the second face, an Optically Clear Adhesive (OCA) layer disposed between the second face and the first polymer layer, and a second polymer layer disposed between the first plate and the first polymer layer and including a third face and a fourth face.Type: GrantFiled: January 3, 2020Date of Patent: September 27, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Soonho Han, Yoojin Kim, Hyunggon Lee, Jongchul Choi
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Publication number: 20220269597Abstract: A memory mapping method includes storing a feature map including a plurality of sets of data used for a neural network operation in a memory, shifting a position of a portion of the data included in the feature map that is stored in the memory based on a parameter of the neural network operation, and outputting data requested by the neural network operation from the feature map in which the position of the portion is shifted based on a memory bandwidth.Type: ApplicationFiled: June 21, 2021Publication date: August 25, 2022Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Channoh KIM, Yoojin KIM
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Publication number: 20220253692Abstract: Disclosed is a method and apparatus of operating a neural network. The neural network operation method includes receiving data for the neural network operation, verifying whether competition occurs between a first data traversal path corresponding to a first operation device and a second data traversal path corresponding to a second operation device, determining first operand data and second operand data from among the data using a result of the verifying and a priority between the first data traversal path and the second data traversal path, and performing the neural network operation based on the first operand data and the second operand data.Type: ApplicationFiled: August 12, 2021Publication date: August 11, 2022Applicant: Samsung Electronics Co., Ltd.Inventors: Hyeongseok YU, Yoojin KIM, Seongwook PARK, Hyun Sun PARK, Sehwan LEE, Jun-Woo JANG, Deokjin JOO
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Patent number: 11409675Abstract: A data transmission method for a convolution operation, and a convolution operation apparatus including a fetcher that includes a loader, at least one sender, a buffer controller, and a reuse buffer. The method includes loading, by the loader, input data of an input feature map according to a loading order, based on input data stored in the reuse buffer, a shape of a kernel to be used for a convolution operation, and two-dimensional (2D) zero-value information of weights of the kernel; storing, by the buffer controller, the loaded input data in the reuse buffer of an address cyclically assigned according to the loading order; and selecting, by each of the at least one sender, input data corresponding to each output data of a convolution operation among the input data stored in the reuse buffer, based on one-dimensional (1D) zero-value information of the weights, and outputting the selected input data.Type: GrantFiled: May 25, 2021Date of Patent: August 9, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Hyunsun Park, Jun-Woo Jang, Yoojin Kim, Channoh Kim
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Publication number: 20220197834Abstract: A data transmission method for a convolution operation, and a convolution operation apparatus including a fetcher that includes a loader, at least one sender, a buffer controller, and a reuse buffer. The method includes loading, by the loader, input data of an input feature map according to a loading order, based on input data stored in the reuse buffer, a shape of a kernel to be used for a convolution operation, and two-dimensional (2D) zero-value information of weights of the kernel; storing, by the buffer controller, the loaded input data in the reuse buffer of an address cyclically assigned according to the loading order; and selecting, by each of the at least one sender, input data corresponding to each output data of a convolution operation among the input data stored in the reuse buffer, based on one-dimensional (1D) zero-value information of the weights, and outputting the selected input data.Type: ApplicationFiled: May 25, 2021Publication date: June 23, 2022Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyunsun PARK, Jun-Woo JANG, Yoojin KIM, Channoh KIM
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Publication number: 20220164674Abstract: A neural network device includes: a memory configured to store a first feature map and a second feature map; and a neural network processor configured to operate a neural network, and comprising: a fetcher configured to fetch input data from the first feature map of the memory; a buffer configured to store the input data; an operator configured to generate output data by performing a convolution operation between the input data and a kernel; a writer configured to write the output data in the second feature map of the memory; and a controller configured to control the fetcher to fetch the input data and control the writer to write the output data, according to one or more intervals and one or more offsets determined based on a dilation rate of the kernel in multiple steps.Type: ApplicationFiled: November 10, 2021Publication date: May 26, 2022Applicant: Samsung Electronics Co., Ltd.Inventors: Jun-Woo JANG, Yoojin KIM, Channoh KIM, Hyun Sun PARK
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Publication number: 20220164289Abstract: A computing method and device with data sharing re provided. The method includes loading, by a loader, input data of an input feature map stored in a memory in loading units according to a loading order, storing, by a buffer controller, the loaded input data in a reuse buffer of an address rotationally allocated according to the loading order, and transmitting, by each of a plurality of senders, to an executer respective input data corresponding to each output data of respective convolution operations among the input data stored in the reuse buffer, wherein portions of the transmitted respective input data overlap other.Type: ApplicationFiled: May 11, 2021Publication date: May 26, 2022Applicant: Samsung Electronics Co., LtdInventors: Yoojin KIM, Channoh KIM, Hyun Sun PARK, Sehwan LEE, Jun-Woo JANG
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Patent number: 11331878Abstract: An electronic device including a housing, a display, an adhesive layer, a first decoration layer, and a second decoration layer. The housing includes a front plate, a rear plate, and a lateral member surrounding a space between the front and rear plates. The display is viewed through at least a portion of the front plate. The adhesive layer is combined with one of the front and rear plates. The first decoration layer includes a first shape-cured layer and a first color layer. The first shape-cured layer is combined with the adhesive layer, has a first three-dimensional pattern, and is cured by an external stimulus. The second decoration layer includes a second shape-cured layer and a second color layer. The second shape-cured layer is combined with the first color layer, has a second three-dimensional pattern, and is cured by an external stimulus.Type: GrantFiled: December 19, 2019Date of Patent: May 17, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Hyunggon Lee, Soonwoo Kwon, Yoojin Kim, Saehee Lee, Yunhui Cho
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Publication number: 20220024815Abstract: An electronic device according to various embodiments of the disclosure may include a housing including a first plate forming an outer face. The first plate may include a glass plate including a first surface outwardly facing the housing and a second surface inwardly facing the housing, a coating layer including an anti-reflection coating and/or an anti-finger coating above the first surface while forming the outer face, a first layer formed between the first surface of the first glass plate and the coating layer, having a first thickness, and including a first inorganic material, a second layer formed between the first layer and the coating layer, having a second thickness, and including a second inorganic material different from the first inorganic material, a third layer formed between the second layer and the coating layer, having a third thickness thicker than each of the first thickness and the second thickness, and including a third inorganic material, and an opaque layer formed on the second surface.Type: ApplicationFiled: December 3, 2019Publication date: January 27, 2022Inventors: Sejin KIM, Jinchoul PARK, Junsang PARK, Wanju SHIN, Hwanju JEON, Younggoo KANG, Yoojin KIM, Gijea PARK, Yunhui CHO