Patents by Inventor Yoon Cho

Yoon Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240132640
    Abstract: Provided are a monomer composition for producing a superabsorbent polymer film, the monomer composition comprising an acrylic acid-based monomer having acidic groups, at least part of which is neutralized, a crosslinking agent, a cellulose-based thickener, a moisturizer, a polymerization initiator, a polyvalent metal salt, and a solvent, and being capable of producing a superabsorbent polymer film showing excellent absorption performances, particularly, an improved initial absorption rate while having a thin thickness, a method of producing a superabsorbent polymer film using the same, and a superabsorbent polymer film produced therefrom.
    Type: Application
    Filed: August 11, 2022
    Publication date: April 25, 2024
    Applicant: LG Chem, Ltd.
    Inventors: Seung Wook Cho, Kiyoul Yoon, Yu Jin Kim, Seongkyun Kang, Kookhyun Choi, Gicheul Kim
  • Publication number: 20240127710
    Abstract: Disclosed are a system and method for automatically evaluating an essay. The system includes a structure analysis module configured to divide learning data and learner essay text in a predetermined structure analysis unit, generate structure tagging information for each structure analysis unit, and structure the learning data and the learner essay text by attaching the structure tagging information to the learning data and the learner essay text, a learning module configured to generate an essay evaluation model through learning by using essay text that is included in the structured learning data and the structure tagging information as an input value and using an evaluation score that is included in the structured learning data as a label, and an evaluation module configured to generate essay evaluation results using the essay evaluation model.
    Type: Application
    Filed: April 18, 2023
    Publication date: April 18, 2024
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Minsoo CHO, Oh Woog KWON, Yoon-Hyung ROH, Ki Young LEE, Yo Han LEE, Sung Kwon CHOI, Jinxia HUANG
  • Publication number: 20240113110
    Abstract: A semiconductor device includes first and second active patterns on first and second PMOS regions, two first source/drain patterns spaced apart along a first direction on the first active pattern and a first channel pattern including first semiconductor patterns between the two first source/drain patterns, and two second source/drain patterns spaced apart along the first direction on the second active pattern and a second channel pattern including second semiconductor patterns between the two second source/drain patterns. A width in a second direction of the each of the first semiconductor patterns is greater than a width of each of the second semiconductor patterns. Each of the first and second source/drain patterns includes semiconductor layers having different germanium concentrations. A number of the semiconductor layers of each of the two second source/drain patterns is greater than a number of the semiconductor layers of each of the two first source/drain patterns.
    Type: Application
    Filed: May 18, 2023
    Publication date: April 4, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyung Hee CHO, Seokhyeon YOON, Hyeongrae KIM, Jeewoong SHIN
  • Publication number: 20240098390
    Abstract: The present disclosure provides a mobile communications system line number sheet management device and method. Provided, according to one aspect of the present disclosure, is a line number sheet management device and method, for automating access network-related line number sheet management by automatically collecting and updating line number information, the line number information being collected from a mobile communications base station management server (mobile communications system management server) and a fronthaul management server. Provided, according to another aspect of the present disclosure, is a fronthaul device for: acquiring unique information of a base station by receiving an optical signal from any one of a radio unit (RU) and a digital unit (DU); and transmitting the unique information of the base station to a fronthaul management server.
    Type: Application
    Filed: November 26, 2020
    Publication date: March 21, 2024
    Inventors: Sun Ik LEE, Ka Yoon KIM, Jin Wook LEE, Sang Woo KIM, Jong Min LEE, Myung Hun SONG, Beum Geun CHO
  • Patent number: 11930468
    Abstract: A wireless communication method includes: receiving a wireless signal including a plurality of frames, wherein each of the plurality of frames includes a plurality of sub-frames and a current frame is initially a first one of the frames; a) performing a correlation calculation between each of the sub-frames of the current frame and each a plurality of reference signals to generate a plurality of current correlation values; b) respectively accumulating the current correlation values with previous correlation values to generate cumulative values respectively corresponding to the plurality of sub-frames of the current frame; determining whether an effective synchronization signal is detected, based on the current cumulative values; and setting the current frame to a next one of the frames, setting the previous correlational values to the current correlation values, and determining whether to resume to step a) based on the determination as to whether the effective synchronization signal is detected.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: March 12, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hae-Chul Lee, Sung-Yoon Cho
  • Publication number: 20240073416
    Abstract: The present invention relates to an apparatus and method for encoding and decoding an image by skip encoding. The image-encoding method by skip encoding, which performs intra-prediction, comprises: performing a filtering operation on the signal which is reconstructed prior to an encoding object signal in an encoding object image; using the filtered reconstructed signal to generate a prediction signal for the encoding object signal; setting the generated prediction signal as a reconstruction signal for the encoding object signal; and not encoding the residual signal which can be generated on the basis of the difference between the encoding object signal and the prediction signal, thereby performing skip encoding on the encoding object signal.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicants: Electronics and Telecommunications Research Institute, Kwangwoon University Industry-Academic Collaboration Foundation, Universily-lndustry Cooperation Group of Kyung Hee University
    Inventors: Sung Chang LIM, Ha Hyun LEE, Se Yoon JEONG, Hui Yong KIM, Suk Hee CHO, Jong Ho KIM, Jin Ho LEE, Jin Soo CHOI, Jin Woong KIM, Chie Teuk AHN, Dong Gyu SIM, Seoung Jun OH, Gwang Hoon PARK, Sea Nae PARK, Chan Woong JEON
  • Patent number: 11916261
    Abstract: Provided are a thermal battery system and an ignition method of the same, wherein the thermal battery system includes: a thermal battery assembly including a plurality of thermal batteries arranged in series and in parallel; an ignition circuit connected to the plurality of thermal batteries in the thermal battery assembly; and a control unit configured to control the ignition circuit such that each of the plurality of thermal batteries in the thermal battery assembly is selectively ignited, wherein the control unit is configured to selectively ignite one of the plurality of thermal batteries in an active matrix manner by controlling an ignition circuit.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: February 27, 2024
    Assignee: AGENCY FOR DEFENSE DEVELOPMENT
    Inventors: Chaenam Im, Jae In Lee, Hyunki Yoon, Yusong Choi, Jang Hyeon Cho
  • Publication number: 20230360689
    Abstract: A semiconductor memory device is provided. The semiconductor includes a data clock buffer that receives a data clock signal from a memory controller and outputs a pair of differential input signals, an edge delay controller that adjusts duty ratios of the pair of differential input signals based on a control code and outputs a pair of corrected clock signals, a first unit delay path circuit that generates four output clock signals having different phases based on the pair of corrected clock signals, a rising edge multiplexer that serially outputs data corresponding to a rising edge of each of the four output clock signals, a second unit delay path circuit that generates four duplicate clock signals having different phases based on the pair of corrected clock signals and a quadrature error correction circuit detector that detects a duty error based on the duplicate clock signals and outputs the control code.
    Type: Application
    Filed: April 26, 2023
    Publication date: November 9, 2023
    Inventors: Jun Young Park, Joo Hwan Kim, Jin Do Byun, Eun Seok Shin, Hyun Sub Rie, Hyun-Yoon Cho, Jung Hwan Choi
  • Patent number: 11795268
    Abstract: A functional resin composition comprising a biomass-derived component; an aromatic dicarboxylic acid; an alcohol component; a chain extender; and a multifunctional compound. The biomass-derived component is biomass-derived succinic acid or mixture with fossil-derived aliphatic dicarboxylic acid. The multifunctional compound is obtained by reaction of 4,4-bis(4-hydroxyphenyl)valeric acid and polyethylene glycol. The functional resin composition has excellent processability, moldability, tearing strength, tensile strength and excellent resistance to hydrolysis.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: October 24, 2023
    Assignee: ANKOR BIOPLASTICS CO., LTD.
    Inventors: Heon-Young Lim, Seung-Lyul Choi, Yoon Cho
  • Publication number: 20230299433
    Abstract: Provided is a method for welding an electrode assembly comprising stacking a plurality of electrodes to manufacture the electrode assembly, attaching a buffer tab to a surface of an outermost electrode tab of the electrode assembly, and welding a lead such that a plurality of electrode tabs and the lead are in contact with each other to dispose the buffer tab therebetween. The electrode assembly comprises the stacked plurality of electrodes comprising the lead welded to the plurality of electrode tabs, and each electrode tab of the plurality of electrode tabs protrudes in one direction from the plurality of electrodes. The buffer tab may be attached, before the welding, to the surface of the outermost electrode tab to minimize or prevent damage to the electrode tab due to pressure applied by a welding rod.
    Type: Application
    Filed: April 19, 2022
    Publication date: September 21, 2023
    Applicant: LG Energy Solution, Ltd.
    Inventors: Hee Yoon Cho, Young Seok Baek
  • Publication number: 20230280782
    Abstract: Disclosed is a clock converting circuit, which includes a first switch that is connected between a first input node for receiving a second input clock and a first node and operates in response to a first logic state of a first input clock, the second input clock delayed with respect to the first input clock as much as 90 degrees, a second switch that is connected between a second input node for receiving the first input clock and a second node and operates in response to a second logic state of the second input clock, and a third switch that is connected between the second node and a ground node and operates in response to a first logic state of the second input clock opposite to the second logic state of the second input clock.
    Type: Application
    Filed: May 11, 2023
    Publication date: September 7, 2023
    Inventors: Junyoung PARK, YOUNG-HOON SON, HYUN-YOON CHO, YOUNGDON CHOI, JUNGHWAN CHOI
  • Patent number: 11687114
    Abstract: Disclosed is a clock converting circuit, which includes a first switch that is connected between a first input node for receiving a second input clock and a first node and operates in response to a first logic state of a first input clock, the second input clock delayed with respect to the first input clock as much as 90 degrees, a second switch that is connected between a second input node for receiving the first input clock and a second node and operates in response to a second logic state of the second input clock, and a third switch that is connected between the second node and a ground node and operates in response to a first logic state of the second input clock opposite to the second logic state of the second input clock.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: June 27, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Junyoung Park, Young-Hoon Son, Hyun-Yoon Cho, Youngdon Choi, Junghwan Choi
  • Publication number: 20230143365
    Abstract: A method includes measuring a linearity of a first pull-up circuit, a second pull-up circuit, a third pull-up circuit, a first pull-down circuit, a second pull-down circuit and a third pull-down circuit using an initial pull-up code and an initial pull-down code, each of the first pull-up circuit, the second pull-up circuit and the third pull-up circuit having a respective resistance value determined based on a respective pull-up code, and each of the first pull-down circuit, the second pull-down circuit and the third pull-down circuit having a respective resistance value determined based on a respective pull-down code, and determining a calibration setting indicator based on the measurement result, the calibration setting indicator indicating a calibration method of a transmission driver including the first pull-up circuit, the second pull-up circuit, the third pull-up circuit, the first pull-down circuit, the second pull-down circuit and the third pull-down circuit.
    Type: Application
    Filed: June 29, 2022
    Publication date: May 11, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Joo Hwan KIM, Jun Young PARK, Jin Do BYUN, Kwang Seob SHIN, Eun Seok SHIN, Hyun-Yoon CHO, Young Don CHOI, Jung Hwan CHOI
  • Publication number: 20230072898
    Abstract: A method of suggesting a speech and a recording medium which may suggest an appropriate speech by determining a speech suggestion target using various information that a vehicle may obtain, includes obtaining a user image where at least one user inside the vehicle is photographed; detecting a user looking at a display inside the vehicle among the at least one user, based on the obtained user image; and determining a target user which is a target of the speech suggestion, based on a result of the detecting.
    Type: Application
    Filed: August 16, 2022
    Publication date: March 9, 2023
    Applicants: Hyundai Motor Company, KIA CORPORATION
    Inventor: Yoon A CHO
  • Publication number: 20230066632
    Abstract: A memory device includes a driver that drives a data line connected with an external device, an internal ZQ manager that generates an internal ZQ start signal, a selector that selects one of the internal ZQ start signal and a ZQ start command from the external device, based on a ZQ mode, a ZQ calibration engine that generates a ZQ code by performing ZQ calibration in response to a selection result of the selector, and a ZQ code register that loads the ZQ code onto the driver in response to a ZQ calibration command from the external device.
    Type: Application
    Filed: October 18, 2022
    Publication date: March 2, 2023
    Inventors: Donghun Lee, Daesik Moon, Young-Soo Sohn, Young-Hoon Son, Ki-Seok Oh, Changkyo Lee, Hyun-Yoon Cho, Kyung-Soo Ha, Seokhun Hyun
  • Publication number: 20230032384
    Abstract: Provided is a cooling device with which it is possible to cool a fluid to be cooled, even before maintenance work, if a fault such as a blockage or a breakage occurs in a part of a channel. The cooling device (1) is provided with four heat exchangers (1A-1D) and a plurality of heat exchanger connection parts (111-120), each of the heat exchanger connection parts allowing natural gas to flow therethrough. Each of the heat exchangers has: a drum (101, 102, 103, fourth drum 104), a refrigerant reservoir (T), a plurality of heat exchanger core parts (121, 122, 123, 124) immersed in liquid propane in the refrigerant reservoir (T), and a demister (106). A plurality of cooling channels allowing natural gas to flow therethrough are installed, independent of each other, from the first heat exchanger (1A) to the fourth heat exchanger (1D).
    Type: Application
    Filed: May 15, 2020
    Publication date: February 2, 2023
    Applicant: KABUSHIKI KAISHA KOBE SEIKO SHO (KOBE STEEL, LTD.)
    Inventors: Kenichiro MITSUHASHI, Yasuhiro MITARAI, Jong Yoon CHO
  • Patent number: 11508420
    Abstract: A memory device includes a driver that drives a data line connected with an external device, an internal ZQ manager that generates an internal ZQ start signal, a selector that selects one of the internal ZQ start signal and a ZQ start command from the external device, based on a ZQ mode, a ZQ calibration engine that generates a ZQ code by performing ZQ calibration in response to a selection result of the selector, and a ZQ code register that loads the ZQ code onto the driver in response to a ZQ calibration command from the external device.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: November 22, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Donghun Lee, Daesik Moon, Young-Soo Sohn, Young-Hoon Son, Ki-Seok Oh, Changkyo Lee, Hyun-Yoon Cho, Kyung-Soo Ha, Seokhun Hyun
  • Patent number: 11461176
    Abstract: A memory device includes a multiphase clock generator which generates a plurality of divided clock signals, a first error correction block which receives a first divided clock signal among the plurality of divided clock signals, a first data multiplexer which transmits first least significant bit data corresponding to the first divided clock signal, a second error correction block which receives the first divided clock signal, and a second data multiplexer which transmits first most significant bit data corresponding to the first divided clock signal. The first error correction block receives the first least significant bit data and corrects a toggle timing of the first least significant bit data. The second error correction block receives the first most significant bit data and corrects a toggle time of the first most significant bit data.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: October 4, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jun Young Park, Young-Hoon Son, Hyun-Yoon Cho, Young Don Choi, Jung Hwan Choi
  • Publication number: 20220243005
    Abstract: The present invention relates to a biodegradable resin composition having improved mechanical properties, formability and weatherproof, and a method for manufacturing the biodegradable resin composition. More specifically, the biodegradable resin composition according to the present invention is obtained by mixing an aliphatic dicarboxylic acid or an acid component comprising a mixture of an aliphatic dicarboxylic acid and an aromatic dicarboxylic acid, and aliphatic diol, and subjecting the mixture sequentially to esterification, transesterification, polycondensation, chain extension and solid-state polymerization reactions in the presence of a polyfunctional compound, and may have improved productivity and economic efficiency due to improved reaction rate, excellent tensile strength, elongation rate and processability. In addition, the biodegradable resin composition according to the present invention is environmentally friendly as it is biodegradable in a natural state when buried.
    Type: Application
    Filed: November 23, 2020
    Publication date: August 4, 2022
    Applicant: ANKOR BIOPLASTICSCO.,LTD.
    Inventors: Heon Young LIM, Yoon CHO, Myung Je YOU
  • Publication number: 20220138045
    Abstract: A memory device includes a multiphase clock generator which generates a plurality of divided clock signals, a first error correction block which receives a first divided clock signal among the plurality of divided clock signals, a first data multiplexer which transmits first least significant bit data corresponding to the first divided clock signal, a second error correction block which receives the first divided clock signal, and a second data multiplexer which transmits first most significant bit data corresponding to the first divided clock signal. The first error correction block receives the first least significant bit data and corrects a toggle timing of the first least significant bit data. The second error correction block receives the first most significant bit data and corrects a toggle time of the first most significant bit data.
    Type: Application
    Filed: August 10, 2021
    Publication date: May 5, 2022
    Inventors: Jun Young PARK, Young-Hoon SON, Hyun-Yoon CHO, Young Don CHOI, Jung Hwan CHOI