Patents by Inventor Yoon Cho

Yoon Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100299634
    Abstract: A method for controlling a menu in a mobile terminal is disclosed and the mobile terminal includes a display unit configured to display a menu configured to control the mobile terminal, the menu comprising first data, a memory configured to store the first data, an input unit configured to receive an input for accessing a preset website, a wireless communication module configured to access the preset website responsive to the input, and a controller configured to obtain second data related to the menu from the preset website and to display the menu comprising both the first data and the second data on the display unit.
    Type: Application
    Filed: May 21, 2010
    Publication date: November 25, 2010
    Inventors: Seong Yoon Cho, Hye Youn Cho, Byung Sang Yeo, Yee Rang Yun, Yoo Mee Song, Dong Seok Lee
  • Publication number: 20100251152
    Abstract: A mobile terminal and as associated method are provided. The method may include displaying one or more menu items on a first touch unit including a touchscreen and recognizing a rotary touch & drag input at a second touch unit as a particular command based on whether one of the one or more menu items has been touched. Accordingly, even if a minimum number of menu icons for executing diverse functions are displayed on a touchscreen, a prescribed one of the diverse functions may be easily selected and executed.
    Type: Application
    Filed: March 31, 2010
    Publication date: September 30, 2010
    Inventors: Seong Yoon Cho, Young Wun Kim, Hoi Chul Kim, Je Kwang Youn, Young Jung Yoon
  • Patent number: 7790546
    Abstract: A method for forming a capacitor in a semiconductor device comprises forming an inter-layer layer on a semi-finished substrate; etching the inter-layer insulation layer to form a plurality of first contact holes; forming a first insulation layer on sidewalls of the first contact holes; forming a plurality of storage-node contact plugs filled into the first contact holes; forming a second insulation layer with a different etch rate from the first insulation layer over the storage-node contact plugs; forming a third insulation layer on the second insulation layer; sequentially etching the third insulation layer and the second insulation layer to form a plurality of second contact holes exposing the storage-node contact plugs; and forming the storage node on each of the second contact holes.
    Type: Grant
    Filed: July 7, 2008
    Date of Patent: September 7, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jun-Hyeub Sun, Sung-Kwon Lee, Sung-Yoon Cho
  • Patent number: 7786020
    Abstract: A method for fabricating a nonvolatile memory device includes repeatedly stacking a stacked structure over a substrate to form a multi-stacked structure, wherein the stacked structure includes a conductive layer and an insulation layer, forming a photoresist pattern over the multi-stacked structure, first-etching an uppermost stacked structure of the multi-stacked structure using the photoresist pattern as an etch barrier, second-etching a resultant structure formed by the first-etching through the use of a breakthrough etching, slimming the photoresist pattern to form a slimmed photoresist pattern, and third-etching the uppermost stacked structure using the slimmed photoresist pattern as an etch barrier and, at the same time, etching a stacked structure disposed under the uppermost stacked structure and exposed by the first-etching.
    Type: Grant
    Filed: December 24, 2009
    Date of Patent: August 31, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Hye-Ran Kang, Sung-Yoon Cho
  • Publication number: 20100169397
    Abstract: A mobile terminal and its unit conversion method are disclosed. When a unit conversion function is selected through a menu manipulation by a user, the selected unit conversion function is executed, and then, when a unit conversion factor for a unit conversion is selected, a reference unit related to the selected unit conversion factor is converted into two or more different units and the converted information is displayed in the form of a unit scale. The unit conversion factor includes volume, area, distance, speed, currency, mass, weight, dimension, and the like.
    Type: Application
    Filed: May 13, 2009
    Publication date: July 1, 2010
    Inventors: Hye-Jin CHOI, Seong-Yoon CHO, Min-Soo PARK
  • Patent number: 7727889
    Abstract: In a method for forming a fine pattern, a target layer to be patterned is formed on a semiconductor substrate and a polysilicon layer is formed on the target layer. A partition is then formed on the polysilicon layer with an amorphous carbon layer pattern. A spacer is attached to a sidewall of the partition. Thereafter, the spacer is divided into bar patterns by selectively removing the partition. A polysilicon layer pattern is formed by selectively etching a portion of the poly silicon layer exposed by the divided bar patterns and then a target layer pattern is formed by selectively etching a portion of the target layer exposed by the polysilicon layer pattern.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: June 1, 2010
    Assignee: Hynix Semiconductor Inc
    Inventors: Ik Soo Choi, Sung Yoon Cho
  • Publication number: 20100099463
    Abstract: A mobile terminal having a touch sensor-equipped input device and its control method are disclosed. The mobile terminal includes: a user input unit in which a keypad-printed layer and a touch sensor overlap with each other; and a controller that controls an operation mode of the user input unit in a touch pad and/or a touch keypad mode according to whether or not a cursor is in use.
    Type: Application
    Filed: June 10, 2009
    Publication date: April 22, 2010
    Inventors: Jun-Hee KIM, Sang-Yeon LIM, Seong-Yoon CHO, Jae-Keun KIM, Hoi-Chul KIM
  • Publication number: 20100003795
    Abstract: A method for fabricating a flash memory device includes forming a control gate having a hollow donut shape over an insulation layer formed over a substrate. The method also includes forming an inter-poly dielectric of a spacer shape on an inner wall of the control gate, filling a conductive layer for a floating gate between the spacer shaped inter-poly dielectrics, and forming an interlayer insulation layer over a resulting product formed with the conductive layer for a floating gate. The method further includes removing a center portion of the conductive layer for a floating gate to form an opening, forming a tunnel insulation layer on an inner face of the opening, and filling with a semiconductor layer the opening formed with the tunnel insulation layer to form an active region.
    Type: Application
    Filed: June 30, 2009
    Publication date: January 7, 2010
    Applicant: HYNIX SEMICONDUCTOR, INC.
    Inventors: Jung Woo Park, Sung Yoon Cho
  • Publication number: 20090269924
    Abstract: In a method for forming a fine pattern, a target layer to be patterned is formed on a semiconductor substrate and a polysilicon layer is formed on the target layer. A partition is then formed on the polysilicon layer with an amorphous carbon layer pattern. A spacer is attached to a sidewall of the partition. Thereafter, the spacer is divided into bar patterns by selectively removing the partition. A polysilicon layer pattern is formed by selectively etching a portion of the poly silicon layer exposed by the divided bar patterns and then a target layer pattern is formed by selectively etching a portion of the target layer exposed by the polysilicon layer pattern.
    Type: Application
    Filed: June 30, 2008
    Publication date: October 29, 2009
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Ik Soo Choi, Sung Yoon Cho
  • Publication number: 20080293212
    Abstract: A method for forming a capacitor in a semiconductor device comprises forming an inter-layer layer on a semi-finished substrate; etching the inter-layer insulation layer to form a plurality of first contact holes; forming a first insulation layer on sidewalls of the first contact holes; forming a plurality of storage-node contact plugs filled into the first contact holes; forming a second insulation layer with a different etch rate from the first insulation layer over the storage-node contact plugs; forming a third insulation layer on the second insulation layer; sequentially etching the third insulation layer and the second insulation layer to form a plurality of second contact holes exposing the storage-node contact plugs; and forming the storage node on each of the second contact holes.
    Type: Application
    Filed: July 7, 2008
    Publication date: November 27, 2008
    Applicant: Hynix Semiconductor Inc.
    Inventors: Jun-Hyeub Sun, Sung-Kwon Lee, Sung-Yoon Cho
  • Publication number: 20080230516
    Abstract: A method for forming fine patterns in a semiconductor device includes forming a first hard mask layer and a second hard mask layer over an etch target layer, forming second hard mask patterns by etching the second hard mask layer, wherein an etching profile of the second hard mask layer has a positive slope, and etching the first hard mask layer and the etch target layer using the second hard mask patterns as an etch mask.
    Type: Application
    Filed: December 10, 2007
    Publication date: September 25, 2008
    Inventors: Sung-Yoon Cho, Hye-Ran Kang
  • Publication number: 20080233750
    Abstract: A method for forming fine patterns in a semiconductor device includes forming a first hard mask layer over an etch target layer, forming first etch mask patterns having negative slopes over the first hard mask layer, thereby forming a resultant structure, forming a first material layer for a second etch mask over the resultant structure, performing a planarization process until the first etch mask patterns are exposed to form second etch mask patterns filled in spaces between the spacers, removing the spacers, and etching the first hard mask layer and the etch target layer using the first etch mask patterns and the second etch mask patterns.
    Type: Application
    Filed: December 26, 2007
    Publication date: September 25, 2008
    Inventors: Sung-Yoon Cho, Chang-Goo Lee
  • Patent number: 7410866
    Abstract: A method for forming a capacitor in a semiconductor device comprises forming an inter-layer layer on a semi-finished substrate; etching the inter-layer insulation layer to form a plurality of first contact holes; forming a first insulation layer on sidewalls of the first contact holes; forming a plurality of storage-node contact plugs filled into the first contact holes; forming a second insulation layer with a different etch rate from the first insulation layer over the storage-node contact plugs; forming a third insulation layer on the second insulation layer; sequentially etching the third insulation layer and the second insulation layer to form a plurality of second contact holes exposing the storage-node contact plugs; and forming the storage node on each of the second contact holes.
    Type: Grant
    Filed: August 15, 2005
    Date of Patent: August 12, 2008
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jun-Hyeub Sun, Sung-Kwon Lee, Sung-Yoon Cho
  • Patent number: 7282037
    Abstract: Disclosed is a skin care appliance capable of realizing various skin care modes using an oscillator vibrating up and down in the way of a magnetic coil, conducting the galvanic massage and the iontophoresis massage based on the oscillator, and making the magnetic-color-sound therapy. The skin care appliance includes a case with a predetermined shape, and a vibration unit installed within the case and having an oscillator. The oscillator oscillates in the way of a magnetic coil upon receipt of the power from a power supply unit. An outer electrode is charged to a polarity opposite to the polarity of the oscillator, and placed at the case. A switch unit is provided at the case. A control unit controls the vibration unit in accordance with the signals from the switch unit.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: October 16, 2007
    Assignee: Doctors Tech Co., Ltd.
    Inventor: Hee-Yoon Cho
  • Publication number: 20070141561
    Abstract: A microfluidic device for concentrating or purifying a sample containing cells or viruses including a sample circulating vessel having a constant capacity; a pump connected to the sample circulating vessel and a trapping unit located in the sample circulating vessel. A method of concentration or purifying a sample containing cells or viruses including introducing the sample containing cells or viruses into a sample circulating vessel, circulating the sample within the sample circulating vessel by a pump connected to the sample circulating vessel, capturing the cells or viruses contained in the sample at a specific site inside the sample circulating vessel to concentrate or purify the sample and recovering the concentrated or purified sample from the sample circulating vessel.
    Type: Application
    Filed: November 2, 2006
    Publication date: June 21, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.,
    Inventors: Su KIM, Yoon CHO
  • Patent number: 7202174
    Abstract: A method of forming a micro pattern in a semiconductor device, wherein a first polysilicon film, a buffer oxide film, a second polysilicon film, an anti-polishing film, and a first oxide film are sequentially laminated on a semiconductor substrate having a to-be-etched layer. The first oxide film, the anti-polishing film and the second polysilicon film are patterned. After nitride film spacers are formed on the patterned lateral portions, a second oxide film is formed on the entire structure. A Chemical Mechanical Polishing (CMP) process is performed using the anti-polishing film as a stopper. Thereafter, after the nitride film spacers are removed, the second oxide film and the second polysilicon film are removed using a difference in etch selective ratio between the oxide film and the polysilicon film. A hard mask for forming a micro pattern having a structure in which the first polysilicon film and the buffer oxide film are laminated is formed.
    Type: Grant
    Filed: February 23, 2006
    Date of Patent: April 10, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventors: Woo Young Jung, Sung Yoon Cho, Choi Dong Kim, Pil Keun Song
  • Publication number: 20070059788
    Abstract: A method and apparatus for electrically measuring an adverse effect of toxic substances on prokaryotic cells includes measuring a whole intracellular change caused by the presence of toxic substances as a change in an electric signal of cell membranes of the prokaryotic cells. According to the present invention, it is possible to electrically measure the presence of toxicity and the extent of the adverse effect very easily and within a rapid period of time and also to measure the adverse effect of toxic substances regardless of their type. Thus, the method and apparatus of the present invention have wide applicability and can be easily applied to a lab-on-a-chip.
    Type: Application
    Filed: September 15, 2006
    Publication date: March 15, 2007
    Inventors: Soo Choi, Jung Han, Yoon Cho
  • Publication number: 20060199601
    Abstract: A method for transforming and presenting a message and a mobile station using the transformed message is provided. By transforming a received message, such as a voice or character message, into tactilely sensed symbols, the contents of the message can be recognized via touch or sight by a user having a visual and/or auditory disability.
    Type: Application
    Filed: March 3, 2006
    Publication date: September 7, 2006
    Inventor: Yoon Cho
  • Publication number: 20060131630
    Abstract: A method for forming a capacitor in a semiconductor device comprises forming an inter-layer layer on a semi-finished substrate; etching the inter-layer insulation layer to form a plurality of first contact holes; forming a first insulation layer on sidewalls of the first contact holes; forming a plurality of storage-node contact plugs filled into the first contact holes; forming a second insulation layer with a different etch rate from the first insulation layer over the storage-node contact plugs; forming a third insulation layer on the second insulation layer; sequentially etching the third insulation layer and the second insulation layer to form a plurality of second contact holes exposing the storage-node contact plugs; and forming the storage node on each of the second contact holes.
    Type: Application
    Filed: August 15, 2005
    Publication date: June 22, 2006
    Applicant: Hynix Semiconductor Inc.
    Inventors: Jun-Hyeub Sun, Sung-Kwon Lee, Sung-Yoon Cho
  • Publication number: 20050109631
    Abstract: A tape substrate including an insulating film, a copper foil pattern formed on the insulating film at one side of the insulating film, and provided with a connecting area where an electronic element is to be mounted, a barrier layer plated on the copper foil pattern at the connecting area, and formed with a plurality of pores, and a tin layer plated on the barrier layer, and alloyed with a portion of the copper foil pattern corresponding to the connecting area, through the pores. A method for fabricating the tape substrate is also disclosed. In accordance with the invention, it is possible to reduce the time taken for the copper foil pattern to come into contact with the electroless tin plating solution used in the tin plating process, thereby preventing the copper component of the copper foil pattern from being eluted. Accordingly, there is no open-circuit fault caused by formation of pores.
    Type: Application
    Filed: December 28, 2004
    Publication date: May 26, 2005
    Inventors: Soon Kwon, Sang Lee, Yang Moon, Ki Hong, Yoon Cho