Abstract: Provided are a DNA sequence analysis method of high precision providing improved optical limits by detecting wavelengths of lights emitted from labels in the state where a DNA is electrically tethered and completely stretch, and a nanodevice chip for automating the method. Also provided are a DNA sequence analysis method capable of removing binding errors through complementarily binding between a plurality of peptide nucleic acids (PNAs) labeled with labels emitting lights of different wavelengths and a target DNA to be sequenced, and resolving the limit in optical spatial resolution.

Abstract: Disclosed are a system and a method for artificial nerve networking capable of restoring a damaged nerve and allowing selective detection, analysis, transmission and stimulation of a signal from the damaged nerve. The artificial nerve networking system according to an embodiment of the present disclosure includes: a first nerve conduit connected at one end of a damaged nerve; a second nerve conduit connected at the other end of the damaged nerve; and an artificial nerve networking unit electrically connected to the first nerve conduit and the second nerve conduit and recovering the function of the damaged nerve by transmitting and receiving a signal to and from the damaged nerve.

Abstract: Disclosed is an apparatus and method for injecting liquid-drops of particle mixture liquid including a mixture of biological particles, affecting magnetic field, and having only positive particles, which are combined with magnetic responsive material, separated by magnetic force, and having negative particles, which are not combined with magnetic responsive material, precipitated by gravity.

Abstract: A liquid crystal display (LCD) device and a method for driving the same, which are capable of achieving an enhancement in display quality, are disclosed.

Abstract: A method for manufacturing a tape wiring board in accordance with the present invention may employ an imprinting process in forming a wiring pattern, thereby reducing the number of processes for manufacturing a tape wiring board and allowing the manufacturing process to proceed in a single production line. Therefore, the manufacturing time and cost may be reduced. A profile of the wiring pattern may be determined by the shape of an impression pattern of a mold. This may establish the top width of inner and outer leads and incorporate tine pad pitch. Although ILB and OLB process may use an NCP, connection reliability may be established due to the soft and elastic wiring pattern.

Abstract: Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component.

Abstract: A clock signal generator can include a clock signal generation unit that is configured to generate a clock signal. A clock signal control unit is configured to count a number of pulses of the clock signal during a reference time, and to compare the number of pulses with a reference value to provide a comparison result, and to generate a control signal based on the comparison result, where the clock signal generation unit increases or decreases the number of pulses of the clock signal based on the control signal.

Abstract: An encryption processor, for storing encrypted data in a memory chip of a memory card, includes a FIFO memory for sequentially outputting m-bit data in response to a first signal, and an encryption key generator for generating m-bit encrypted keys (m being a positive integer) in response to a second signal and for sequentially outputting the keys in response to a third signal. A logic operator performs a logic operation on the data from the FIFO memory with the keys from the encryption key generator during a data write operation to sequentially encrypt the data. The logic operator performs a logic operation on the encrypted data received from a memory interface with the keys output from the encryption key generator during a data read operation in order to sequentially decode the encrypted data. The second signal is simultaneously generated with one of the write command or the read command.

Abstract: An encryption processor, for storing encrypted data in a memory chip of a memory card, includes a FIFO memory for sequentially outputting m-bit data in response to a first signal, and an encryption key generator for generating m-bit encrypted keys (m being a positive integer) in response to a second signal and for sequentially outputting the keys in response to a third signal. A logic operator performs a logic operation on the data from the FIFO memory with the keys from the encryption key generator during a data write operation to sequentially encrypt the data. The logic operator performs a logic operation on the encrypted data received from a memory interface with the keys output from the encryption key generator during a data read operation in order to sequentially decode the encrypted data. The second signal is simultaneously generated with one of the write command or the read command.

Abstract: A rectangular display driver integrated circuit device adapted for use with a flat panel display (FPD) device is disclosed and comprises, a plurality of input pads arranged in a central portion of the display driver integrated circuit device, and a plurality of output pads arranged along edges of all four sides of the display driver integrated circuit device. An associated film, film package, and flat panel display (FPD) module adapted to receive the display driver integrated circuit device are also disclosed.

Abstract: Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component.

Abstract: A method for manufacturing a tape wiring board in accordance with the present invention may employ an imprinting process in forming a wiring pattern, thereby reducing the number of processes for manufacturing a tape wiring board and allowing the manufacturing process to proceed in a single production line. Therefore, the manufacturing time and cost may he reduced. A profile of the wiring pattern may be determined by the shape of an impression pattern of a mold. This may establish the top width of inner and outer leads and incorporate tine pad pitch. Although ILB and OLB process may use an NCP, connection reliability may be established due to the soft and elastic wiring pattern.

Abstract: A tape circuit substrate includes a base film with first wiring and second wiring disposed on the base film. The first wiring extends into a chip mount portion through a first side and bends within the chip mount portion toward a second side. The second wiring extends into the chip mount portion through a third side and bends within the chip mount portion toward the second side. The first, second, and third sides are different sides of the chip mount portion. Thus, size and in turn cost of the base film are minimized by arranging wirings within the chip mount portion for further miniaturization of electronic devices, such as a display panel assembly, using the tape circuit substrate.

Abstract: Disclosed is a chip-on-film (COF) type semiconductor package and a device using the same. The COF type semiconductor package may include an insulation substrate including a top surface and bottom surface, a semiconductor device on the top surface of the insulation substrate, a heat dissipating component on the bottom surface of the insulation substrate, and at least one space between the bottom surface of the insulation substrate and a top surface of the heat dissipating component.

Abstract: A device is provided in which a glass panel having beveled edge is flexibly connected to a TAB package. The outer lead portions of the TAB package include an end portion of first width connected to a connection pattern on the glass panel, a terminal portion having a second width greater than the first width, and a transition portion having a width that varies between the first and second widths. When the TAB package is connected the transition portion of the respective outer lead portions are disposed over the beveled edge of the glass panel.

Abstract: A method for manufacturing a tape wiring board in accordance with the present invention may employ an imprinting process in forming a wiring pattern thereby reducing the number of processes for manufacturing a tape wiring board and allowing the manufacturing process to proceed in a single production line. Therefore, the manufacturing time and cost may be reduced. A profile of the wiring pattern may be determined by the shape of an impression pattern of a mold. This may establish the top width of inner and outer leads and incorporate fine pad pitch. Although ILB and OLB process may use an NCP, connection reliability may be established due to the soft and elastic wiring pattern.

Abstract: In a method for controlling access to data stored on a smart card, an external request for communication with the smart card is received via a first communication interface. The external request for communication may be a request for communication over a second communication interface, for example, from a smart card reader. Private data from the smart card is transmitted via the second communication interface responsive to authentication of a user of the smart card. Related devices are also discussed.

Abstract: The present invention relates to a recombinant adenovirus capable of regulating angiogenesis, which comprises (a) an adenoviral ITR (inverted terminal repeat) nucleotide sequence; and (b) a transcription regulatory sequence for a VEGF-A (vascular endothelial growth factor-A) gene comprising (i) a nucleotide sequence encoding a DNA binding domain comprising a zinc finger domain to bind to a site in a VEGF-A promoter sequence as set forth in nucleotides 1-2362 of SEQ ID NO:1, and (ii) a transcription activation domain or a transcription inhibitory domain linked to the nucleotide sequence encoding the DNA binding domain; and a pharmaceutical composition comprising the recombinant adenovirus.

Abstract: Disclosed is a method for manufacturing a multimode optical fiber for high data rate LAN using MCVD, which includes a deposition process for forming a clad layer and a core layer, doped with an additive for controlling a refractive index, on an inner wall of a quartz tube by injecting a deposition gas into the quartz tube and applying heat to outside of the quartz tube; and a collapse process, which is repeatedly conducted N times, for filling up a gap in the quartz tube by applying heat of a temperature over a deposition temperature to the quartz tube after the core layer is completely deposited. In the method, together with an N?1th collapse process, an etching process of injecting a reaction gas for etching into the quartz tube is conducted in order to eliminate a portion of which refractive index is transformed due to evaporation of the additive.

Abstract: A tape circuit substrate includes a base film with first wiring and second wiring disposed on the base film. The first wiring extends into a chip mount portion through a first side and bends within the chip mount portion toward a second side. The second wiring extends into the chip mount portion through a third side and bends within the chip mount portion toward the second side. The first, second, and third sides are different sides of the chip mount portion. Thus, size and in turn cost of the base film are minimized by arranging wirings within the chip mount portion for further miniaturization of electronic devices, such as a display panel assembly, using the tape circuit substrate.