Patents by Inventor Yoshiaki Goto
Yoshiaki Goto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11928901Abstract: Provided is a driving evaluation device that enables evaluation of driving for the purpose of improving a driving time in a circuit racecourse. The driving evaluation device includes an evaluation section extractor 24 that detects a deceleration section and an acceleration section in cornering, a tire friction circle-load factor calculator 27 that calculates, based on a front-rear acceleration and a lateral acceleration, a tire friction circle and a tire load factor in the deceleration section and those in the acceleration section, and a skill deficiency evaluator 28 that evaluates driving based on the tire friction circle and the tire load factor in the deceleration section and those in the acceleration section.Type: GrantFiled: February 25, 2022Date of Patent: March 12, 2024Assignee: HONDA MOTOR CO., LTDInventors: Yuya Goto, Yoshiaki Kobayashi, Toshiaki Matsuzawa
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Patent number: 11715701Abstract: According to one embodiment, a semiconductor device includes a wiring board that has a first surface and a second surface opposed to the first surface, a semiconductor chip provided on the first surface, external connection terminals provided on the second surface, a sealing resin layer provided on the first surface, and a conductive shield layer that covers at least a portion of a side surface of the wiring board and the sealing resin layer. The wiring board includes a first ground wire that is electrically connected to the conductive shield layer, and a second ground wire that is electrically connected to the conductive shield layer and is electrically insulated from the first ground wire.Type: GrantFiled: April 17, 2019Date of Patent: August 1, 2023Assignee: Kioxia CorporationInventors: Yuusuke Takano, Yoshiaki Goto, Takeshi Watanabe, Takashi Imoto
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Patent number: 11688659Abstract: A lead frame includes a first outer lead portion and a second outer lead portion which is arranged to oppose to the first outer lead portion with an element-mounting region between them. An inner lead portion has first inner leads connected to the first outer leads and second inner leads connected to the second outer leads. At least either the first or second inner leads are routed in the element-mounting region. An insulation resin is filled in the gaps between the inner leads located on the element-mounting region. A semiconductor device is configured with semiconductor elements mounted on both the top and bottom surfaces of the lead frame.Type: GrantFiled: August 25, 2020Date of Patent: June 27, 2023Assignee: KIOXIA CORPORATIONInventor: Yoshiaki Goto
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Publication number: 20230022159Abstract: A semiconductor device includes: a substrate on which wiring is formed; a first semiconductor element flip-chip bonded to the substrate; a second semiconductor element provided on the first semiconductor element; a first resin provided in at least part of a region between the first semiconductor element and the substrate; a second resin provided in at least part of a region between the second semiconductor element and the substrate; and a member having a thermal conductivity higher than a thermal conductivity of the first resin and a thermal conductivity of the second resin, provided between the first resin and the second resin, having a part overlapping with an upper surface of the first semiconductor element, and having another part overlapping with a first wiring part as part of the wiring in a top view.Type: ApplicationFiled: March 10, 2022Publication date: January 26, 2023Applicant: Kioxia CorporationInventors: Keiichi NIWA, Yoshiaki GOTO
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Publication number: 20200388547Abstract: A lead frame includes a first outer lead portion and a second outer lead portion which is arranged to oppose to the first outer lead portion with an element-mounting region between them. An inner lead portion has first inner leads connected to the first outer leads and second inner leads connected to the second outer leads. At least either the first or second inner leads are routed in the element-mounting region. An insulation resin is filled in the gaps between the inner leads located on the element-mounting region. A semiconductor device is configured with semiconductor elements mounted on both the top and bottom surfaces of the lead frame.Type: ApplicationFiled: August 25, 2020Publication date: December 10, 2020Applicant: Toshiba Memory CorporationInventor: Yoshiaki Goto
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Patent number: 10840220Abstract: A semiconductor device of an embodiment includes a substrate, first, second, third, and fourth semiconductor elements, a first wiring layer, and first and second bonding wires. The third semiconductor element is on the substrate between the first resin element and the second resin element. The first wiring layer is on the first semiconductor element, is connected to the first semiconductor element, and is connected to the substrate by the first bonding wire. The fourth semiconductor element is on the first wiring layer and is connected to the first wiring layer by a second bonding wire. The first bonding wire is at a side of the first wiring layer other than a side farthest from the second wiring layer.Type: GrantFiled: August 26, 2019Date of Patent: November 17, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventor: Yoshiaki Goto
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Publication number: 20200303345Abstract: A semiconductor device of an embodiment includes a substrate, first, second, third, and fourth semiconductor elements, a first wiring layer, and first and second bonding wires. The third semiconductor element is on the substrate between the first resin element and the second resin element. The first wiring layer is on the first semiconductor element, is connected to the first semiconductor element, and is connected to the substrate by the first bonding wire. The fourth semiconductor element is on the first wiring layer and is connected to the first wiring layer by a second bonding wire. The first bonding wire is at a side of the first wiring layer other than a side farthest from the second wiring layer.Type: ApplicationFiled: August 26, 2019Publication date: September 24, 2020Inventor: Yoshiaki GOTO
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Patent number: 10777479Abstract: A lead frame includes a first outer lead portion and a second outer lead portion which is arranged to oppose to the first outer lead portion with an element-mounting region between them. An inner lead portion has first inner leads connected to the first outer leads and second inner leads connected to the second outer leads. At least either the first or second inner leads are routed in the element-mounting region. An insulation resin is filled in the gaps between the inner leads located on the element-mounting region. A semiconductor device is configured with semiconductor elements mounted on both the top and bottom surfaces of the lead frame.Type: GrantFiled: December 31, 2018Date of Patent: September 15, 2020Assignee: Toshiba Memory CorporationInventor: Yoshiaki Goto
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Patent number: 10707193Abstract: According to one embodiment, a semiconductor device of an embodiment includes a substrate, a metal plate having a main portion having a first width in a first direction and a second width in a second direction orthogonal to the first direction, a first semiconductor chip located between the metal plate and the substrate, the first semiconductor chip having a third width in the first direction and a fourth width in the second direction, and a second semiconductor chip located between the first semiconductor chip and the substrate, wherein the first width is smaller than the third width, and the second width is smaller than the fourth width.Type: GrantFiled: March 1, 2018Date of Patent: July 7, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Satoshi Tsukiyama, Hideo Aoki, Yoshiaki Goto
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Publication number: 20190244912Abstract: According to one embodiment, a semiconductor device includes a wiring board that has a first surface and a second surface opposed to the first surface, a semiconductor chip provided on the first surface, external connection terminals provided on the second surface, a sealing resin layer provided on the first surface, and a conductive shield layer that covers at least a portion of a side surface of the wiring board and the sealing resin layer. The wiring board includes a first ground wire that is electrically connected to the conductive shield layer, and a second ground wire that is electrically connected to the conductive shield layer and is electrically insulated from the first ground wire.Type: ApplicationFiled: April 17, 2019Publication date: August 8, 2019Inventors: Yuusuke TAKANO, Yoshiaki GOTO, Takeshi WATANABE, Takashi IMOTO
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Publication number: 20190139849Abstract: A lead frame includes a first outer lead portion and a second outer lead portion which is arranged to oppose to the first outer lead portion with an element-mounting region between them. An inner lead portion has first inner leads connected to the first outer leads and second inner leads connected to the second outer leads. At least either the first or second inner leads are routed in the element-mounting region. An insulation resin is filled in the gaps between the inner leads located on the element-mounting region. A semiconductor device is configured with semiconductor elements mounted on both the top and bottom surfaces of the lead frame.Type: ApplicationFiled: December 31, 2018Publication date: May 9, 2019Applicant: Toshiba Memory CorporationInventor: Yoshiaki GOTO
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Patent number: 10277006Abstract: Provided is a technology for suppressing variations in the waveform of a light emission pulse caused by various factors in a light-emitting device. A light-emitting device is provided with: a light source 101 in which relaxation oscillation occurs immediately after energization; a light source drive circuit 104 which includes a differentiation circuit 102 having a resistor and a capacitor connected in parallel, and in which a switching element 103 for voltage application is connected in series with the differentiation circuit; a power supply circuit 105; a light-reception element 107 which detects pulsed light emitted from the light source 101; and a voltage control unit 109 which controls an output voltage from the power supply circuit 105 in correspondence with the waveform of the detected pulsed light.Type: GrantFiled: April 28, 2016Date of Patent: April 30, 2019Assignee: TOPCON CORPORATIONInventors: Suguru Miyagawa, Yoshiaki Goto, Yoshikatsu Tokuda
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Publication number: 20190088632Abstract: According to one embodiment, a semiconductor device of an embodiment includes a substrate, a metal plate having a main portion having a first width in a first direction and a second width in a second direction orthogonal to the first direction, a first semiconductor chip located between the metal plate and the substrate, the first semiconductor chip having a third width in the first direction and a fourth width in the second direction, and a second semiconductor chip located between the first semiconductor chip and the substrate, wherein the first width is smaller than the third width, and the second width is smaller than the fourth width.Type: ApplicationFiled: March 1, 2018Publication date: March 21, 2019Inventors: Satoshi TSUKIYAMA, Hideo AOKI, Yoshiaki GOTO
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Patent number: 10207668Abstract: A side airbag device includes a folded-up airbag and a limitation member disposed around the airbag for constraining the airbag from protruding forward at airbag deployment. The limitation member is formed of a flexible sheet member into a band shape, and is joined to the folded-up airbag by the opposite end regions. The limitation member includes a loose region which is arranged around the folded-up airbag in such a manner as to be remote from the folded-up airbag. The loose region is disposed on a side of the folded-up airbag towards which the airbag protrudes. The loose region includes a tearable region in the region in a deployment direction of the airbag.Type: GrantFiled: July 19, 2016Date of Patent: February 19, 2019Assignee: TOYODA GOSEI CO., LTD.Inventors: Yoshiaki Goto, Kensaku Honda, Akira Suzuki, Masao Kino
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Patent number: 10199300Abstract: A lead frame includes a first outer lead portion and a second outer lead portion which is arranged to oppose to the first outer lead portion with an element-mounting region between them. An inner lead portion has first inner leads connected to the first outer leads and second inner leads connected to the second outer leads. At least either the first or second inner leads are routed in the element-mounting region. An insulation resin is filled in the gaps between the inner leads located on the element-mounting region. A semiconductor device is configured with semiconductor elements mounted on both the top and bottom surfaces of the lead frame.Type: GrantFiled: February 9, 2017Date of Patent: February 5, 2019Assignee: TOSHIBA MEMORY CORPORATIONInventor: Yoshiaki Goto
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Patent number: 9985415Abstract: Light with a short pulse width is emitted using a simple structure. A light source 101, a differentiation circuit 102, and a switch 103 are connected in series. When the switch 103 is switched on, inrush current flows in a capacitor 102b forming the differentiation circuit 102, and accordingly the light source 101 is supplied with electric current and thereby emits light. When the capacitor 102b is charged, electric current flows in a resistor 102a, and voltage drops at the resistor 102a. Then, the voltage applied to the light source 101 is decreased, whereby the light source 101 stops emitting light. By using the inrush current at the capacitor 102b, light with a short pulse width can be generated.Type: GrantFiled: July 31, 2015Date of Patent: May 29, 2018Assignee: KABUSHIKI KAISHA TOPCONInventors: Yoshikatsu Tokuda, Yoshiaki Goto
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Publication number: 20180109073Abstract: Provided is a technology for suppressing variations in the waveform of a light emission pulse caused by various factors in a light-emitting device. A light-emitting device is provided with: a light source 101 in which relaxation oscillation occurs immediately after energization; a light source drive circuit 104 which includes a differentiation circuit 102 having a resistor and a capacitor connected in parallel, and in which a switching element 103 for voltage application is connected in series with the differentiation circuit; a power supply circuit 105; a light-reception element 107 which detects pulsed light emitted from the light source 101; and a voltage control unit 109 which controls an output voltage from the power supply circuit 105 in correspondence with the waveform of the detected pulsed light.Type: ApplicationFiled: April 28, 2016Publication date: April 19, 2018Applicant: TOPCON CORPORATIONInventors: Suguru MIYAGAWA, Yoshiaki GOTO, Yoshikatsu TOKUDA
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Patent number: 9873399Abstract: An airbag in an uninflated-and-spread form includes a rear-lower inflation portion and a front-upper inflation portion. The airbag is stored in a first vehicle seat. The vehicle seat adjacent to the first vehicle seat is a second vehicle seat. The front-upper inflation portion includes at least three bend portions, which are arranged in a flowing direction of inflation gas. A form between the uninflated-and-spread form and the storage form is a transitional form. In the transitional form, the bend portions are each bent relative to the adjacent bend portion and rolled toward the second vehicle seat relative to the rear-lower inflation portion such that the closer a bend portion is to the downstream end, the more inward the bend portion is located. In the transitional form, the upper end of the most upstream bend portion is connected to the upper end of the rear-lower inflation portion.Type: GrantFiled: November 9, 2016Date of Patent: January 23, 2018Assignee: TOYODA GOSEI CO., LTD.Inventors: Yoshiaki Goto, Yuji Matsuzaki, Yasushi Masuda
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Patent number: 9701270Abstract: A side airbag system includes: an airbag; and a wrapping material that is disposed around a folded-up airbag body into which the airbag is folded so as to prevent the collapse of neatly arranged folds of the folded-up airbag body, the folded-up airbag body being configured as an elongated body having an external shape that is disposed so that a longitudinal direction thereof substantially follows an up-to-down direction, wherein: the wrapping material is disposed so as to wrap around the folded-up airbag body, including a brake planned portion capable of breaking when the airbag inflates which is provided on a front surface side of the folded-up airbag body so as to substantially follow the up-to-down direction; and the break planned portion comprises a low-strength portion where a break strength thereof is set low and a high-strength portion where the break strength is set high.Type: GrantFiled: July 12, 2016Date of Patent: July 11, 2017Assignee: TOYODA GOSEI CO., LTD.Inventors: Yoshiaki Goto, Kensaku Honda, Akira Suzuki, Masao Kino
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Publication number: 20170151923Abstract: An airbag in an uninflated-and-spread form includes a rear-lower inflation portion and a front-upper inflation portion. The airbag is stored in a first vehicle seat. The vehicle seat adjacent to the first vehicle seat is a second vehicle seat. The front-upper inflation portion includes at least three bend portions, which are arranged in a flowing direction of inflation gas. A form between the uninflated-and-spread form and the storage form is a transitional form. In the transitional form, the bend portions are each bent relative to the adjacent bend portion and rolled toward the second vehicle seat relative to the rear-lower inflation portion such that the closer a bend portion is to the downstream end, the more inward the bend portion is located. In the transitional form, the upper end of the most upstream bend portion is connected to the upper end of the rear-lower inflation portion.Type: ApplicationFiled: November 9, 2016Publication date: June 1, 2017Inventors: Yoshiaki GOTO, Yuji MATSUZAKI, Yasushi MASUDA