Patents by Inventor Yoshiaki Hasegawa
Yoshiaki Hasegawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7995674Abstract: There is a need for effectively compensating distortion when a predistortion transmitter is subject to not only a memory effect due to nonlinearity of an amplifier, but also a modulator's DC offset, IQ unbalance, or local quadrature error. A predistortor to be used is a polynomial predistortor including a polynomial basis generation portion and an inner product calculation portion. The polynomial basis generation portion delays a real part and an imaginary part of a complex input signal Sx=Ix+jQx for up to M samples to generate 2(M+1) signals, duplicately combines these signals to generate monomials having maximum degree N, and outputs, as a basis vector, all or part of the monomials depending or needs. The inner product calculation portion performs an inner product calculation using a coefficient vector, i.e., a set of complex numbers sized equally to the basis vector to find a polynomial value and outputs the value as a complex signal.Type: GrantFiled: December 29, 2010Date of Patent: August 9, 2011Assignee: Hitachi, Ltd.Inventors: Kazuyuki Hori, Shouhei Murakami, Yuji Ishida, Tomoya Uchiike, Yoshiaki Hasegawa
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Publication number: 20110175634Abstract: To permit electrical testing of a semiconductor integrated circuit device having test pads disposed at narrow pitches probes in a pyramid or trapezoidal pyramid form are formed from metal films formed by stacking a rhodium film and a nickel film successively. Via through-holes are formed in a polyimide film between interconnects and the metal films, and the interconnects are electrically connected to the metal films. A plane pattern of one of the metal films equipped with one probe and through-hole is obtained by turning a plane pattern of the other metal film equipped with the other probe and through-hole through a predetermined angle.Type: ApplicationFiled: March 30, 2011Publication date: July 21, 2011Inventors: Masayoshi Okamoto, Yoshiaki Hasegawa, Yasuhiro Motoyama, Hideyuki Matsumoto, Shingo Yorisaki, Akio Hasebe, Ryuji Shibata, Yasunori Narizuka, Akira Yabushita, Toshiyuki Majima
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Publication number: 20110176568Abstract: A nitride semiconductor laser diode includes a second conductive cladding layer formed on an active layer, and including a ridge portion having a raised cross-sectional shape, and flat portions located on both sides of the ridge portion; a light-absorbing layer formed on each of the flat portions, and having an optical absorption coefficient larger than the second conductive cladding layer. The light-absorbing layer includes a first region provided at a side of a light-emitting facet, and having a distance Di1 from a line-symmetric axis in a longitudinal direction of the ridge portion to a side surface of the light-absorbing layer; and a second region provided at a side opposite to the light-emitting facet, and having a distance Di2 from the line-symmetric axis to the side surface of the light-absorbing layer. A relationship between the Di1 and the Di2 is represented by Di1<Di2.Type: ApplicationFiled: November 17, 2010Publication date: July 21, 2011Inventors: Tomoya Satoh, Tatsuya Nakamori, Takahiro Okaguchi, Toru Takayama, Yoshiaki Hasegawa
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Publication number: 20110136272Abstract: To permit electrical testing of a semiconductor integrated circuit device having test pads disposed at narrow pitches probes in a pyramid or trapezoidal pyramid form are formed from metal films formed by stacking a rhodium film and a nickel film successively. Via through-holes are formed in a polyimide film between interconnects and the metal films, and the interconnects are electrically connected to the metal films. A plane pattern of one of the metal films equipped with one probe and through-hole is obtained by turning a plane pattern of the other metal film equipped with the other probe and through-hole through a predetermined angle.Type: ApplicationFiled: February 1, 2011Publication date: June 9, 2011Inventors: Masayoshi OKAMOTO, Yoshiaki HASEGAWA, Yasuhiro MOTOYAMA, Hideyuki MATSUMOTO, Shingo YORISAKI, Akio HASEBE, Ryuji SHIBATA, Yasunori NARIZUKA, Akira YABUSHITA, Toshiyuki MAJIMA
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Publication number: 20110096865Abstract: There is a need for effectively compensating distortion when a predistortion transmitter is subject to not only a memory effect due to nonlinearity of an amplifier, but also a modulator's DC offset, IQ unbalance, or local quadrature error. A predistortor to be used is a polynomial predistortor including a polynomial basis generation portion and an inner product calculation portion. The polynomial basis generation portion delays a real part and an imaginary part of a complex input signal Sx=Ix+jQx for up to M samples to generate 2(M+1) signals, duplicately combines these signals to generate monomials having maximum degree N, and outputs, as a basis vector, all or part of the monomials depending or needs. The inner product calculation portion performs an inner product calculation using a coefficient vector, i.e., a set of complex numbers sized equally to the basis vector to find a polynomial value and outputs the value as a complex signal.Type: ApplicationFiled: December 29, 2010Publication date: April 28, 2011Inventors: Kazuyuki Hori, Shouhei Murakami, Yuji Ishida, Tomoya Uchiike, Yoshiaki Hasegawa
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Patent number: 7907908Abstract: A reception sensitivity is measured at a high precision. An access terminal function portion includes the transmitter part and receiver part of a communication terminal in a radio communication system. A path switch part effects switching to connect the input ends of receivers to antennas or to terminate them. The path switch part switches the paths of a signal from a transmitter and signals toward the receivers. An access point controller adjusts a packet error rate into a predetermined range, and obtains the reception sensitivity based on the transmission power of the access terminal function portion after the adjustment.Type: GrantFiled: February 1, 2008Date of Patent: March 15, 2011Assignee: Hitachi, Ltd.Inventors: Akihiro Saitou, Yoshiaki Hasegawa, Masao Yamaya
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Publication number: 20110058584Abstract: A semiconductor laser device includes a semiconductor multilayer structure 12 having a stripe-shaped ridge waveguide portion 12a extending in a direction intersecting a cavity end face. A dielectric layer 16 is formed on the semiconductor multilayer structure 12 to cover at least part of both side faces of the ridge waveguide portion 12a. Light absorption layers 17 are formed on both sides of the ridge waveguide portion 12a on the semiconductor multilayer structure 12 so as to be spaced from the ridge waveguide portion 12a and the cavity end face.Type: ApplicationFiled: November 12, 2008Publication date: March 10, 2011Inventors: Hiroshi Ohno, Yoshiaki Hasegawa, Katsumi Sugiura
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Publication number: 20110057220Abstract: A nitride semiconductor light-emitting device includes a laminate structure formed of a plurality of nitride semiconductor layers including a light-emitting layer, and having cavity facets facing each other, a first protection film made of AlN, formed over a light-emitting facet of the cavity facets, and a second protection film made of Al2O3 having a refractive index of n1, formed thereon. The second protection film has a crystallized surface at least in a region facing a light-emitting region on the cavity facets; the thickness (t) of the second protection film satisfies ?/(2·n1)<t<3?/(4·n1) (where ? is a wavelength of the output light); and a second reflectance R(n2) (where n2 is a refractive index of crystallized Al2O3) of the light-emitting region in the cavity facets is lower than a first reflectance R(n1) of a region surrounding the light-emitting region in the cavity facets.Type: ApplicationFiled: May 28, 2010Publication date: March 10, 2011Inventors: Atsunori MOCHIDA, Kouji MAKITA, Yoshiaki HASEGAWA
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Patent number: 7901958Abstract: To permit electrical testing of a semiconductor integrated circuit device having test pads disposed at narrow pitches probes in a pyramid or trapezoidal pyramid form are formed from metal films formed by stacking a rhodium film and a nickel film successively. Via through-holes are formed in a polyimide film between interconnects and the metal films, and the interconnects are electrically connected to the metal films. A plane pattern of one of the metal films equipped with one probe and through-hole is obtained by turning a plane pattern of the other metal film equipped with the other probe and through-hole through a predetermined angle.Type: GrantFiled: August 10, 2010Date of Patent: March 8, 2011Assignee: Renesas Electronics CorporationInventors: Masayoshi Okamoto, Yoshiaki Hasegawa, Yasuhiro Motoyama, Hideyuki Matsumoto, Shingo Yorisaki, Akio Hasebe, Ryuji Shibata, Yasunori Narizuka, Akira Yabushita, Toshiyuki Majima
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Patent number: 7880192Abstract: A nitride semiconductor device according to the present invention includes a n-GaN substrate 10 and a semiconductor multilayer structure arranged on the principal surface of the n-GaN substrate 10 and including a p-type region, an n-type region and an active layer between them. An SiO2 layer 30 with an opening and a p-side electrode, which makes contact with a portion of the p-type region of the semiconductor multilayer structure, are arranged on the upper surface of the semiconductor multilayer structure. An n-side electrode 36 is arranged on the back surface of the substrate 10. The p-side electrode includes a p-side contact electrode 32 that contacts with the portion of the p-type region and a p-side interconnect electrode 34 that covers the p-side contact electrode 2 and the SiO2 layer 30. Part of the p-side contact electrode 32 is exposed under the p-side interconnect electrode 34.Type: GrantFiled: December 27, 2006Date of Patent: February 1, 2011Assignee: Panasonic CorporationInventors: Yoshiaki Hasegawa, Gaku Sugahara, Toshiya Yokogawa
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Patent number: 7864881Abstract: There is a need for effectively compensating distortion when a predistortion transmitter is subject to not only a memory effect due to nonlinearity of an amplifier, but also a modulator's DC offset, IQ unbalance, or local quadrature error. A predistortor to be used is a polynomial predistortor including a polynomial basis generation portion and an inner product calculation portion. The polynomial basis generation portion delays a real part and an imaginary part of a complex input signal Sx=Ix+jQx for up to M samples to generate 2(M+1) signals, duplicately combines these signals to generate monomials having maximum degree N, and outputs, as a basis vector, all or part of the monomials depending or needs. The inner product calculation portion performs an inner product calculation using a coefficient vector, i.e., a set of complex numbers sized equally to the basis vector to find a polynomial value and outputs the value as a complex signal.Type: GrantFiled: February 8, 2007Date of Patent: January 4, 2011Assignee: Hitachi, Ltd.Inventors: Kazuyuki Hori, Shouhei Murakami, Yuji Ishida, Tomoya Uchiike, Yoshiaki Hasegawa
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Patent number: 7852891Abstract: A nitride semiconductor light-emitting device is provided including: a substrate made of a nitride semiconductor; a semiconductor layer made of a nitride semiconductor containing a p-type impurity, the semiconductor layer being formed as contacting an upper surface of the substrate; a first cladding layer made of a nitride semiconductor containing an impurity of a first conductivity type, the first cladding layer being formed on the semiconductor layer; an active layer formed on the first cladding layer; and a second cladding layer made of a nitride semiconductor containing an impurity of a second conductivity type, the second cladding layer being formed on the active layer.Type: GrantFiled: October 27, 2008Date of Patent: December 14, 2010Assignee: Panasonic CorporationInventors: Yoshiaki Hasegawa, Toshiya Yokogawa, Akihiko Ishibashi
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Patent number: 7846820Abstract: A process for producing a nitride semiconductor according to the present invention includes: step (A) of provided an n-GaN substrate 101; step (B) of forming on the substrate 101 a plurality of stripe ridges having upper faces which are parallel to a principal face of the substrate 101; step (C) of selectively growing AlxGayInzN crystals (0?x, y, z?1: x+y+z=1) 104 on the upper faces of the plurality of stripe ridges, the AlxGayInzN crystals containing an n-type impurity at a first concentration; and step (D) of growing an Alx?Gay?Inz?N crystal (0?x?, y?, z??1:x?+y?+z?=1) 106 on the AlxGayInzN crystals 104, the Alx?Gay?Inz?N crystal 106 containing an n-type impurity at a second concentration which is lower than the first concentration, and linking every two adjoining AlxGayInzN crystals 104 with the Alx?Gay?Inz?N crystal 106 to form one nitride semiconductor layer 120.Type: GrantFiled: April 20, 2005Date of Patent: December 7, 2010Assignee: Panasonic CorporationInventors: Akihiko Ishibashi, Toshiya Yokogawa, Toshitaka Shimamoto, Yoshiaki Hasegawa, Yasutoshi Kawaguchi, Isao Kidoguchi
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Patent number: 7848745Abstract: The normality verification and radio characteristics test of a radio communication system are executed. RF-SWs (radio-frequency coaxial switches) change-over the paths of signals which are transmitted to and received from an access terminal function portion included in an access point. RF-SWs connect the access terminal function portion 122 with a desired one of radio analog portions. A test function controller controls the changeover operations of the RF-SWs in accordance with information designated by a maintenance apparatus (OMC). An access point controller controls in accordance with received test sort information, one or more of (1) an antenna failure test, (2) a receiver failure test, and (3) a transmitter failure.Type: GrantFiled: February 16, 2010Date of Patent: December 7, 2010Assignee: Hitachi, Ltd.Inventors: Yoshiaki Hasegawa, Shinya Oota, Yoshihiro Kanomata, Arata Nakagoshi
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Publication number: 20100304510Abstract: To permit electrical testing of a semiconductor integrated circuit device having test pads disposed at narrow pitches probes in a pyramid or trapezoidal pyramid form are formed from metal films formed by stacking a rhodium film and a nickel film successively. Via through-holes are formed in a polyimide film between interconnects and the metal films, and the interconnects are electrically connected to the metal films. A plane pattern of one of the metal films equipped with one probe and through-hole is obtained by turning a plane pattern of the other metal film equipped with the other probe and through-hole through a predetermined angle.Type: ApplicationFiled: August 10, 2010Publication date: December 2, 2010Inventors: Masayoshi OKAMOTO, Yoshiaki Hasegawa, Yasuhiro Motoyama, Hideyuki Matsumoto, Shingo Yorisaki, Akio Hasebe, Ryuji Shibata, Yasunori Narizuka, Akira Yabushita, Toshiyuki Majima
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Publication number: 20100296542Abstract: A semiconductor laser apparatus includes, on a substrate, a first-conductivity type layer, an active layer, a second-conductivity type layer having a ridge extending along an optical waveguide direction, and a current blocking layer formed on sides of the ridge. The ridge is disposed to separate the substrate into a first region having a first width, and a second region having a second width greater than the first width, in a direction perpendicular to the optical waveguide direction. The second-conductivity type layer has a shock attenuating portion having a height greater than or equal to that of the ridge, on sides of the ridge. In the second region, a trench extending from an upper surface of the shock attenuating portion, penetrating at least the active layer, and reaching the first-conductivity type layer, is formed along the optical waveguide direction.Type: ApplicationFiled: February 16, 2010Publication date: November 25, 2010Inventors: Satoshi MURASAWA, Toru TAKAYAMA, Yoshiaki HASEGAWA
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Patent number: 7816696Abstract: An nitride semiconductor device according to the present invention is a nitride semiconductor device including: an n-GaN substrate 10; a semiconductor multilayer structure 100 formed on a principal face of the n-GaN substrate 10, the semiconductor multilayer structure 100 including a p-type region and an n-type region; a p-side electrode 32 which is in contact with a portion of the p-type region included in the semiconductor multilayer structure 100; and an n-side electrode 34 provided on the rear face of the n-GaN substrate 10. The rear face of the n-GaN substrate includes a nitrogen surface, such that a carbon concentration at an interface between the rear face and the n-side electrode 34 is adjusted to 5 atom % or less.Type: GrantFiled: March 9, 2006Date of Patent: October 19, 2010Assignee: Panasonic CorporationInventors: Yoshiaki Hasegawa, Gaku Sugahara, Naomi Anzue, Akihiko Ishibashi, Toshiya Yokogawa
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Publication number: 20100230713Abstract: An object of the present invention is to obtain, with respect to a semiconductor light-emitting element using a group III nitride semiconductor substrate, a semiconductor light-emitting element having an excellent light extraction property by selecting a specific substrate dopant and controlling the concentration thereof. The semiconductor light-emitting element comprises a substrate composed of a group III nitride semiconductor comprising germanium (Ge) as a dopant, an n-type semiconductor layer composed of a group III nitride semiconductor formed on the substrate, an active layer composed of a group III nitride semiconductor formed on the n-type semiconductor layer, and a p-type semiconductor layer composed of a group III nitride semiconductor formed on the active layer in which the substrate has a germanium (Ge) concentration of 2×1017 to 2×1019 cm?3.Type: ApplicationFiled: January 19, 2007Publication date: September 16, 2010Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Hisashi Minemoto, Yasuo Kitaoka, Yasutoshi Kawaguchi, Yasuhito Takahashi, Yoshiaki Hasegawa
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Publication number: 20100226401Abstract: The present invention is directed to a production method for a nitride compound semiconductor element including a substrate and a multilayer structure 40 supported by an upper face of the substrate. First, a wafer 1 to be split into individual substrates is provided. A plurality of semiconductor layers composing the multilayer structure 40 are grown on the wafer 1. By cleaving the wafer 1 and the semiconductor layers, a cleavage plane in the multilayer structure 40 is formed. In the present invention, a plurality of voids are arranged at positions in the multilayer structure at which a cleavage plane is to be formed. Thus, cleavage can be performed with a good yield.Type: ApplicationFiled: December 20, 2006Publication date: September 9, 2010Inventors: Yoshiaki Hasegawa, Toshiya Yokogawa, Atsushi Yamada, Yoshiaki Matsuda
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Patent number: 7759684Abstract: A nitride semiconductor light emitting device includes a nitride semiconductor multilayer film. The nitride semiconductor multilayer film is formed on a substrate and made of nitride semiconductor crystals, and includes a light emitting layer. In the nitride semiconductor multilayer film, facets of a cavity are formed, and a protective film made of aluminum nitride crystals is formed on at least one of the facets. The protective film has a crystal plane whose crystal axes form an angle of 90 degrees with crystal axes of a crystal plane of the nitride semiconductor crystals constituting the facet of the cavity having the protective film formed thereon.Type: GrantFiled: March 11, 2009Date of Patent: July 20, 2010Assignee: Panasonic CorporationInventors: Atsunori Mochida, Yoshiaki Hasegawa