Abstract: The present invention relates to a polarizing film obtained by stretching a polyvinyl alcohol resin film containing iodine, an iodide a cross-linking agent and/or waterproofing agent and then treating the film with a solution containing 0.0001 to 5.0 wt % of inorganic acid except for boric acid or a salt thereof and/or organic acid and having a pH of preferably 2?pH?5, more preferably 2.2?pH?5. Said polarizing film is excellent in wet heat durability and shows less decrease in polarization characteristics in wet heat test and said polarizing film obtained in a further preferable embodiment is also excellent in dry heat durability.

Abstract: A semiconductor substrate having a shallow trench isolation (STI) structure and a method of manufacturing the same are provided, i.e., an isolation substrate in which grooves are selectively formed at predetermined locations of the semiconductor substrate and oxide films using organic silicon source as material are buried in the grooves as buried oxide films. The present invention is characterized in that the buried oxide films are annealed at a predetermined temperature within the range of 1100 to 1350° C. before or after planarization of the semiconductor substrate such that ring structures of more than 5-fold ring and ring structures of less than 4-fold ring are formed at predetermined rates in the buried oxide films. The above annealing allows stress of the oxide film buried in the grooves to be relaxed. Hence, the generation of dislocation is suppressed.

Abstract: A ceramic-coated blade of a gas turbine and a method of producing the same, in which the thickening of an Al2O3 layer at the interface between a ceramic layer and a primary layer is sufficiently prevented for a long period of time, thereby positively suppressing the separation of the ceramic layer. Using powder of MCrAlY alloy (Co—32%Ni—21%Cr—8%Al—0.5%Y), a primary layer (alloy coating layer) is formed on a surface of a substrate made of a heat-resistant Ni base alloy (Rene'-80). Further, a heat-resistant ceramic layer, comprising a mixture of ion-conductive ZrO2—8wt. %Y2O3 ceramic and insulative ceramic (e.g. Al2O3), is formed on the alloy coating layer. This mixture has a columnar structure in which columnar crystals are grown by a gas phase in a direction of a thickness of the coating, or a porous structure in which flattened particles brought about from molten particles caused to fly at high velocity are laminated.

Abstract: A ceramic-coated blade of a gas turbine and a method of producing the same, in which the thickening of an Al.sub.2 O.sub.3 layer at the interface between a ceramic layer and a primary layer is sufficiently prevented for a long period of time, thereby positively suppressing the separation of the ceramic layer. Using powder of MCrAlY alloy (Co-32% Ni-21% Cr-8% Al-0.5% Y), a primary layer (alloy coating layer) is formed on a surface of a substrate made of a heat-resistant Ni base alloy (Rene'-80). Further, a heat-resistant ceramic layer, comprising a mixture of ion-conductive ZrO.sub.2 -8 wt. % Y.sub.2 O.sub.3 ceramic and insulative ceramic (e.g. Al.sub.2 O.sub.3), is formed on the alloy coating layer. This mixture has a columnar structure in which columnar crystals are grown by a gas phase in a direction of a thickness of the coating, or a porous structure in which flattened particles brought about from molten particles caused to fly at high velocity are laminated.

Abstract: A semiconductor substrate has a support substrate formed of monocrystal silicon, an oxide film formed on the support substrate and a thin film of monocrystal silicon formed on the oxide film. The support substrate is a high-concentration P-type substrate to which boron is so doped that a resistivity of the support base is 0.1 .OMEGA..cm or less. In manufacturing: boron is into the support base so that a resistivity of the support base is 0.1 .OMEGA..cm or less; a silicon substrate on which the thin film of monocrystal silicon is formed is heated at 1100.degree. C. or higher for 30 min or longer within a reducing atmosphere; the heat treated silicon substrate is attached to the high-concentration P-type support substrate via the oxide film formed on a surface of any one of the support substrate and the P-type silicon substrate and the attached substrates are heated at 950.degree. C. or higher for 10 min or longer to bond the attached substrates together; and the bonded silicon substrate is thinned.

Abstract: A semiconductor substrate having a shallow trench isolation (STI) structure and a method of manufacturing the same are provided, i.e., an isolation substrate in which grooves are selectively formed at predetermined locations of the semiconductor substrate and oxide films using organic silicon source as material are buried in the grooves as buried oxide films. The present invention is characterized in that the buried oxide films are annealed at a predetermined temperature within the range of 1100 to 1350.degree. C. before or after planarization of the semiconductor substrate such that ring structures of more than 5-fold ring and ring structures of less than 4-fold ring are formed at predetermined rates in the buried oxide films. The above annealing allows stress of the oxide film buried in the grooves to be relaxed. Hence, the generation of dislocation is suppressed.

Abstract: A coated ceramic member includes a silicon nitride- or silicon carbide-based ceramic base material, a silicon nitride or silicon carbide film formed on the base material by CVD, and an oxide film formed on the film of CVD, and a process for producing the ceramic-coated member. This coated ceramic member maintains excellent durability under severe conditions, for example, in a high-speed combustion gas.

Abstract: Element isolation technique for LSIs having a fine pattern of sub-micron class or finer. A high strained region doped with impurities at a high concentration is formed under, and remote from, a buried insulating material (dielectrics) layer for element isolation. With this buried dielectrics element isolation (BDEI) structure, since the high strained layer exists just under the buried dielectrics layer, crystal defects generated near the buried dielectrics layer due to strain caused by a difference of thermal expansion coefficient between a semiconductor layer and the buried dielectrics layer, are moved toward the high strained layer. Accordingly, the crystal defects do not reach an active region where active elements are formed, so that leakage current in the p-n junction formed in the active layer can be advantageously reduced.

Abstract: A structure of a semiconductor device and a method of manufacturing the same is provided wherein a leakage current can be reduced while improving a drain breakdown voltage of an Insulated-Gate transistor such as a MOSFET, MOSSIT and a MISFET, and a holding characteristic of a memory cell such as a DRAM using these transistors as switching transistors can be improved, and further a reliability of a gate oxide film in a transfer gate can be improved. More particularly, a narrow band gap semiconductor region such as Si.sub.x Ge.sub.1-x, Si.sub.x Sn.sub.1-x, PbS is formed in an interior of a source region or a drain region in the SOI.IG-device. By selecting location and/or mole fraction of the narrow band gap semiconductor region in a SOI film, or selecting a kind of impurity element to compensate the crystal lattice mismatching due to the narrow-bandgap semiconductor region, the generation of crystal defects can be suppressed.

Abstract: A coated ceramic member includes a silicon nitride- or silicon carbide-based ceramic base material, a silicon nitride or silicon carbide film formed on the base material by CVD, and an oxide film formed on the film of CVD, and a process for producing the ceramic-coated member. This coated ceramic member maintains excellent durability under severe conditions, for example, in a high-speed combustion gas.

Abstract: A semiconductor device has a semiconductor substrate having a groove, and a semiconductor element formed in a surface region of the semiconductor substrate. A substance having a thermal expansion coefficient different from the semiconductor substrate is embedded in at least a portion of the groove, a crystal defect is generated from the region near the bottom of the groove in the semiconductor substrate, thereby alleviating stress and strain in other regions of the semiconductor substrate, such that such regions cannot generate crystal defects in a region necessary for a circuit operation of the semiconductor element of the surface region.

Abstract: A semiconductor apparatus has a silicon substrate sliced off from a silicon ingot produced by the pulling method or floating zone method, wherein the concentration of interstitial oxygen in a region with a depth of approximately 10 .mu.m or less from a device forming surface is minimum except for the device forming surface. According to the present invention, in the semiconductor apparatus production process, in the inner region with a depth of approximately 10 .mu.m from the device forming surface of the silicon substrate, the inner region affecting the device operation, oxygen does not precipitate. Moreover, in a more inner region, oxygen precipitates, thereby providing a gettering effect with respect to metal impurities.

Abstract: A semiconductor device includes a monocrystalline silicon substrate, an insulating film consisting of a monocrystalline silicon oxide formed on the surface of the monocrystalline silicon substrate, and a conductive film formed on the insulating film. The monocrystalline silicon substrate has a (100) plane orientation, the insulating film essentially consists of .beta.-cristobalite having a unit structure in a P4.sub.1 2.sub.1 2 structural expression in such a manner that every other silicon atoms of four silicon atoms aligned about a C-axis are arranged on two adjacent silicon atoms aligned in a 110! direction on an Si (100) plane, and that a plane including the C-axis of the .beta.-cristobalite and the 110! direction is set perpendicular to the (100) plane.

Abstract: A vapor phase growth apparatus is disclosed, which comprises a boat accommodating therein a plurality of semiconductor substrates, an inner tube surrounding the boat, an outer tube disposed outside the inner tube, a heater disposed outside the outer tube, a reaction gas injection nozzle disposed inside the inner tube and operating to eject a reaction gas against the semiconductor substrates, and a hydrogen halide gas injection nozzle disposed between the inner tube and the outer tube and operating to inject the hydrogen halide gas, wherein exhaust openings for exhausting the reaction gas are formed through a wall of the inner tube, thereby suppressing deposition of a reactant on an outer surface of the inner tube and an inner surface of the outer tube. The reaction gas injected from the reaction gas injection nozzle flows in the portion formed between the inner tube and the outer tube along with in the inner tube.

Abstract: The semiconductor device comprises a semiconductor substrate 11; a semiconductor layer 12 different in conductivity type from and lower in oxygen concentration than the semiconductor substrate, and formed uniformly on the substrate; a well region 13 different in conductivity type from the semiconductor layer and formed into an island shape in the semiconductor layer so that the bottom surface thereof is 1 to 20 .mu.m away from the surface of the substrate; and both or either of a MOS transistor or a capacitance formed in the semiconductor layer or the well region so as to be electrically insulated from the substrate.

Abstract: A system for analyzing a metal impurity at the surface of a single crystal semiconductor comprising: an incident device for allowing X-ray to be incident, at an incident angle less than a total reflection angle, onto the surface of a wafer in the form of a thin plate comprised of a single crystal semiconductor (e.g., silicon); a wafer fixing/positioning stage wherein when it is assumed that the wafer surface is partitioned by a lattice having an interval d, and that the wavelength of the X-ray from the incident device is .lambda., an angle that the X-ray and the wafer surface form is .theta., and an arbitrary integer is n, the stage is adapted to fix the crystal orientation of the wafer so as to satisfy the condition of "2d sin .theta..noteq.n.lambda.

Abstract: A semiconductor device includes a semiconductor layer, an insulating layer on the semiconductor layer, including a discontinuity therein, a monocrystalline silicon layer on a portion of semiconductor layer defined by the discontinuity, a non-monocrystalline silicon layer on the monocrystalline silicon layer, and a wiring layer on the non-monocrystalline silicon layer.

Abstract: A multi-layered insulation film of non-doped CVD SiO.sub.2 (silicon dioxide) film and BPSG (boro-phospho-silicate glass) film is formed on a silicon substrate. Films have a contact hole exposing impurity diffused region formed in silicon substrate. A semiconductor layer is formed in the contact hole. An Al (aluminum) film is formed on the semiconductor layer. The semiconductor layer contacts the BPSG film so that the contact resistance between the semiconductor layer and the Al (aluminum) film can be reduced, and a variation of the contact resistance between respective semiconductor devices can also be reduced.

Abstract: First, silicon wafers are formed by cutting silicon monocrystalline ingot into slices. Then back side and main surfaces of the wafers are subjected to lapping and etching processes. Next, the wafers are submerged into substantially pure water and ultrasonic waves are applied to the wafer surface via the water to clean at least one of the surfaces of each of the wafers and form gettering damage on the wafer surface. After this, the main surfaces of the wafers which have been subjected to the cleaning and damage-forming process and on which semiconductor elements are to be formed are polished into mirror finish.

Abstract: A semiconductor device includes a semiconductor layer, an insulating layer on the semiconductor layer, including a discontinuity therein, a monocrystalline silicon layer on a portion of semiconductor layer defined by the discontinuity, a non-monocrystalline silicon layer on the monocrystalline silicon layer, and a wiring layer on the non-monocrystalline silicon layer.