Patents by Inventor Yoshiaki Sato

Yoshiaki Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11903207
    Abstract: A nonvolatile semiconductor memory device that have a new structure are provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device of the present invention is a nonvolatile semiconductor memory device that has a plurality of the memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor; a first insulation film formed around the pillar shaped semiconductor; a charge storage layer formed around the first insulation film; the second insulation film formed around the charge storage layer; and first or nth electrodes formed around the second insulation film (n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: February 13, 2024
    Assignee: Kioxia Corporation
    Inventors: Masaru Kito, Hideaki Aochi, Ryota Katsumata, Akihiro Nitayama, Masaru Kidoh, Hiroyasu Tanaka, Yoshiaki Fukuzumi, Yasuyuki Matsuoka, Mitsuru Sato
  • Patent number: 11901647
    Abstract: To optimize space efficiency in mounting a plurality of antennas compatible with different frequencies. According to the present disclosure, provided is an antenna device including a first antenna that operates at a first frequency, and a second antenna that is provided adjacent to the first antenna, operates at a second frequency lower than the first frequency, and has a ground potential connected to a grounding wire provided at the first antenna.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: February 13, 2024
    Assignee: SONY GROUP CORPORATION
    Inventors: Yoshiaki Hiraoka, Yuichiro Suzuki, Takayoshi Ito, Tomihiro Omuro, Toru Ozone, Jin Sato
  • Patent number: 11903205
    Abstract: A nonvolatile semiconductor memory device that have a new structure are provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device of the present invention is a nonvolatile semiconductor memory device that has a plurality of the memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor; a first insulation film formed around the pillar shaped semiconductor; a charge storage layer formed around the first insulation film; the second insulation film formed around the charge storage layer; and first or nth electrodes formed around the second insulation film (n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: February 13, 2024
    Assignee: Kioxia Corporation
    Inventors: Masaru Kito, Hideaki Aochi, Ryota Katsumata, Akihiro Nitayama, Masaru Kidoh, Hiroyasu Tanaka, Yoshiaki Fukuzumi, Yasuyuki Matsuoka, Mitsuru Sato
  • Patent number: 11899478
    Abstract: A low-power semiconductor device is provided. A retention transistor is provided between a control circuit and an output transistor. An output terminal of the control circuit is electrically connected to one of a source and a drain of the retention transistor, and the other of the source and the drain of the retention transistor is electrically connected to a gate of the output transistor. A node to which the other of the source and the drain of the retention transistor and the gate of the output transistor are electrically connected is a retention node. When the retention transistor is in an on state, a potential corresponding to a potential output from the control circuit is written to the retention node. Then, when the retention transistor is in an off state, the potential of the retention node is retained. Thus, a gate potential of the output transistor can be kept at a constant value even when the control circuit is off.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: February 13, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Keita Sato, Yuto Yakubo, Yoshiaki Oikawa, Shunpei Yamazaki
  • Patent number: 11881619
    Abstract: [Problem] To prevent radiation waves from being reflected inside a casing when a plurality of antennas compatible with different frequencies are mounted. [Solution] According to the present disclosure, provided is an antenna apparatus including a first antenna that operates at a first frequency, and a second antenna that is arranged on an outer side of a casing relative to the first antenna, that operates at a second frequency lower than the first frequency, and that includes an opening in a radiation direction of the first antenna.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: January 23, 2024
    Assignee: SONY GROUP CORPORATION
    Inventors: Yoshiaki Hiraoka, Yuichiro Suzuki, Takayoshi Ito, Tomihiro Omuro, Toru Ozone, Jin Sato
  • Publication number: 20240021841
    Abstract: A positive electrode current collector plate, which is a current collector sheet for a lead-acid storage battery, includes a rolled sheet including a lead alloy in which a content ratio of tin (Sn) is between 1.0 mass % and 1.9 mass %, inclusive, a content ratio of calcium (Ca) is between 0.005 mass % and 0.028 mass %, inclusive, and a balance is lead (Pb) and inevitable impurities. A hole penetrating in a plate surface direction is not formed, and the number of crystal grains having a grain size of 10 ?m or more present in a range excluding top and bottom 10% in a thickness direction of the rolled sheet in an arbitrary cross section is between 25 and 55, inclusive, per area of 1 mm2 in the range.
    Type: Application
    Filed: September 25, 2023
    Publication date: January 18, 2024
    Inventors: Ayano Koide, Keizo Yamada, Atsushi Sato, Hiroshi Kaneko, Yoshiaki Ogiwara
  • Publication number: 20240014405
    Abstract: A current collector sheet suitable as a positive electrode current collector plate used by being attached to a resin substrate surface of a space forming member constituting a bipolar lead-acid storage battery is provided. A current collector sheet for a lead-acid storage battery has a Vickers hardness of 10 or less when measured by a micro Vickers hardness test specified in JIS Z2244:2009, has a thickness of less than 0.5 mm, and is formed of a lead alloy in which a content ratio of tin (Sn) is 1.0 mass % or more and less than 2.0 mass %, a content ratio of calcium (Ca) is 0.005 mass % or more and less than 0.030 mass %, and a balance is lead (Pb) and unavoidable impurities.
    Type: Application
    Filed: September 22, 2023
    Publication date: January 11, 2024
    Inventors: Ayano Koide, Keizo Yamada, Atsushi Sato, Hiroshi Kaneko, Yoshiaki Ogiwara
  • Patent number: 11849238
    Abstract: A photoelectric conversion apparatus includes a first substrate including a pixel array including a plurality of pixels, a second substrate layered on the first substrate and including an AD conversion portion including a plurality of AD conversion circuits configured to convert a signal output from the first substrate into a digital signal, wherein the second substrate further includes a plurality of signal processing units including a first signal processing unit and a second signal processing unit both configured to perform machine learning processing, wherein each of a plurality of sets includes a plurality of AD conversion circuits that differ between the plurality of sets, wherein the first signal processing unit is arranged to correspond to one of the plurality of sets, and wherein the second signal processing unit is arranged to correspond to another one of the plurality of sets.
    Type: Grant
    Filed: February 2, 2022
    Date of Patent: December 19, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kei Ochiai, Yoshiaki Takada, Masaki Sato, Masahiro Kobayashi, Daisuke Kobayashi, Tetsuya Itano, Nao Nakatsuji, Yasuhiro Oguro
  • Publication number: 20230382703
    Abstract: A control system configured to control a forklift to unload a transport pallet onto an unloading place includes a control device configured to control at least one of movement of the forklift and horizontal movement of a fork, the forklift including a load sensor configured to detect load of an item placed on the fork, and a lift height sensor configured to detect a lift height of the fork, control raising and lowering of the fork, acquire load information of the transport pallet placed on the fork and lift height range information, the lift height range information indicating a lift height range, the lift height range being a range of height in which the fork is able to be inserted when unloading onto the unloading place is successful, and determine whether an abnormality is present.
    Type: Application
    Filed: May 10, 2023
    Publication date: November 30, 2023
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, SHINMEI INDUSTRY CO., LTD., KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Takumi SHIGEMASA, Daisuke ASAMI, Yoshiaki SATO, Yutaka OSHIMA, Tatsuya MITA
  • Patent number: 11817836
    Abstract: A power amplifying module includes a first input terminal, a second input terminal, a first power amplifier, a stage matching circuit, a bypass line, and a second power amplifier. The first input terminal receives a first input signal in a first operation mode. The second input terminal receives a second input signal in a second operation mode which is different from the first operation mode. The first power amplifier amplifies the first input signal and outputs a first amplified signal. The stage matching circuit is disposed downstream of the first power amplifier and receives the first amplified signal. The bypass line outputs the second input signal to the inside of the stage matching circuit not through the first power amplifier. The second power amplifier is disposed downstream of the stage matching circuit, and amplifies the first amplified signal or the second input signal and outputs a second amplified signal.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: November 14, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yoshiaki Sukemori, Kenji Tahara, Hideyuki Sato, Hisanori Namie
  • Patent number: 11808901
    Abstract: A nuclear reaction detection device 100 includes a semiconductor memory 100 arranged in an environment in which radiation is incident, a position information storage unit 210 that stores spatial position information of a semiconductor element in the semiconductor memory 100, a bit position specifying unit 220 that detects that an SEU (Single Event Upset) has occurred in the semiconductor element included in the semiconductor memory 100, and specifies the semiconductor element in which the SEU has occurred, and a position calculating unit 230 that calculates a spatial position in which the SEU has occurred, based on the specified semiconductor element and the spatial position information.
    Type: Grant
    Filed: July 3, 2020
    Date of Patent: November 7, 2023
    Assignees: Nippon Telegraph and Telephone Corporation, National University Corporation Hokkaido University, National University Corporation Tokai National Higher Education and Research System
    Inventors: Hidenori Iwashita, Gentaro Funatsu, Michihiro Furusaka, Takashi Kamiyama, Hirotaka Sato, Yoshiaki Kiyanagi
  • Publication number: 20230307096
    Abstract: A non-transitory computer-readable recording medium storing a search program for causing a computer to execute processing including: obtaining a first cost value of a first potential that corresponds to interaction between coarse-grained particles, a second cost value of a second potential that corresponds to an angle and a dihedral angle between the particles, and a third cost value of a third potential that corresponds to repulsion and attraction between the particles; and instructing an Ising apparatus to search for a structure of a coarse-grained model with which a total sum of the first cost value, the second cost value, and the third cost value calculated for an entirety of the coarse-grained model that includes a plurality of particles satisfies a predetermined condition.
    Type: Application
    Filed: January 3, 2023
    Publication date: September 28, 2023
    Applicant: Fujitsu Limited
    Inventors: Toshio MANABE, Hiroyuki SATO, Yoshiaki TANIDA, Chieko TERASHIMA
  • Publication number: 20230299268
    Abstract: A lead alloy that is difficult to cause extension even when force is applied to the lead alloy is described. The half width of a (311) diffraction peak in a diffraction chart obtained by analyzing the lead alloy using an X-ray diffraction method is 1.4 or more times the half width of a (311) diffraction peak in a diffraction chart obtained by analyzing powder of pure lead using the X-ray diffraction method.
    Type: Application
    Filed: May 30, 2023
    Publication date: September 21, 2023
    Inventors: Hiroshi Kaneko, Miho Yamauchi, Yoshiaki Ogiwara, Jun Furukawa, Keizo Yamada, Ayano Koide, Atsushi Sato
  • Publication number: 20230299267
    Abstract: A lead alloy usable to manufacture a lead storage battery electrode the with easily predictable growth is described. The diffraction intensity determined by analyzing the surface of the lead alloy in a crystal orientation {211}<111> in a pole figure using an X-ray diffraction method is five or less times the diffraction intensity determined by analyzing powder of pure lead in a random orientation in a pole figure using the X-ray diffraction method.
    Type: Application
    Filed: May 30, 2023
    Publication date: September 21, 2023
    Inventors: Hiroshi Kaneko, Miho Yamauchi, Yoshiaki Ogiwara, Jun Furukawa, Keizo Yamada, Ayano Koide, Atsushi Sato
  • Patent number: 11762161
    Abstract: An optical fiber cable includes: a plurality of optical fibers or a plurality of optical fiber ribbons; a cable sheath inside which a plurality of the optical fibers or a plurality of the optical fiber ribbons are housed; and four or more tensile strength member units which are provided so as to be embedded inside the cable sheath, and in which two or more tensile strength members are paired with each other, in which the four or more tensile strength member units are respectively provided at locations facing each other with a center of the optical fiber cable interposed therebetween in a cross section in a radial direction of the optical fiber cable, and in which a cable outer diameter of the optical fiber cable is 6 mm or more and 16 mm or less.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: September 19, 2023
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Fumiaki Sato, Masakazu Takami, Tsuguo Amano, Yohei Suzuki, Yutaka Hashimoto, Yoshiaki Nagao, Naomichi Osada
  • Patent number: 11724512
    Abstract: A liquid circulation mechanism includes a first storage portion configured to store liquid to be supplied to a liquid discharging head, a second storage portion configured to store the liquid collected from the liquid discharging head, a third storage portion configured to store the liquid between the second storage portion and the first storage portion, a first check valve allowing flow of the liquid from the second storage portion to the third storage portion while regulating flow of the liquid from the third storage portion to the second storage portion, in the second collection flow path, and a second check valve allowing flow of the liquid from the third storage portion to the first storage portion while regulating flow of the liquid from the first storage portion to the third storage portion, in the third collection flow path.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: August 15, 2023
    Assignee: Seiko Epson Corporation
    Inventors: Toshio Nakata, Yuichi Urabe, Hisashi Sato, Sawako Tsujimura, Shinji Hirata, Yoshiaki Kishii
  • Publication number: 20230178712
    Abstract: A lead alloy is described that is capable of manufacturing a positive electrode for a lead storage battery with a reduced likelihood of causing growth. The lead alloy contains 0.4% by mass or more and 2% by mass or less of tin and 0.004% by mass or less of bismuth, with the balance being lead and inevitable impurities. The diffraction intensity of a Cube orientation {001} <100> in a pole figure created by analyzing the surface of the lead alloy by an X-ray diffraction method is 4 times or less the diffraction intensity of a random orientation in a pole figure created by analyzing a pure lead powder by the X-ray diffraction method.
    Type: Application
    Filed: January 31, 2023
    Publication date: June 8, 2023
    Inventors: Hiroshi Kaneko, Yoshiaki Ogiwara, Miho Yamauchi, Akira Tanaka, Hideto Nakamura, Masanobu Aragaki, Jun Furukawa, Toru Mangahara, Keizo Yamada, Ayano Koide, Atsushi Sato
  • Publication number: 20230170464
    Abstract: A lead alloy is described that is capable of manufacturing a positive electrode for a lead storage battery less likely to cause corrosion penetrating through a lead layer for the positive electrode in the thickness direction. The lead alloy contains 0.4% by mass or more and 2% by mass less of tin and 0.004% by mass or less of bismuth, with the balance being lead and inevitable impurities. When image analysis of a crystal orientation distribution map created by analyzing the surface of the lead alloy by an electron backscatter diffraction method is performed, intersection points of misorientation boundaries between crystal grains with a crystal misorientation of 5° or more and a straight line extending in one specific direction are extracted. The distances between two adjacent intersection points among the extracted intersection points are measured, and the average value of the distances is 50 ?m or less.
    Type: Application
    Filed: January 31, 2023
    Publication date: June 1, 2023
    Inventors: Hiroshi Kaneko, Yoshiaki Ogiwara, Miho Yamauchi, Akira Tanaka, Hideto Nakamura, Masanobu Aragaki, Jun Furukawa, Toru Mangahara, Keizo Yamada, Ayano Koide, Atsushi Sato
  • Publication number: 20220370510
    Abstract: The purpose of the present invention is to provide a novel medical application of pluripotent stem cells (muse cells) in regeneration medicine. The present invention provides a cell preparation and a pharmaceutical composition which are for amelioration and treatment of brain disorders resulting from fetal growth retardation, such as abnormal motor quality or abnormal neurological development, and which contain SSEA-3 positive pluripotent stem cells isolated from a mesenchymal tissue from a live body or cultured mesenchymal cells. It is assumed that this cell preparation is based on a mechanism where muse cells that are administered to objects having the disorders are engrafted on an impaired brain tissue, thereby ameliorating or treating the disorders.
    Type: Application
    Filed: July 29, 2022
    Publication date: November 24, 2022
    Applicants: National University Corporation Nagoya University, TOHOKU UNIVERSITY, NATIONAL CEREBRAL AND CARDIOVASCULAR CENTER, Life Science Institute, Inc.
    Inventors: Yoshiaki SATO, Yuma KITASE, Shinobu SHIMIZU, Masaaki MIZUNO, Masahiro HAYAKAWA, Mari DEZAWA, Masahiro TSUJI
  • Patent number: 11457158
    Abstract: In order to provide a technique for improving precision of location estimation using a video, a location estimation device includes: a video processing unit that executes video processing including location estimation of an imaging unit, based on a plurality of feature points extracted from a video captured by the imaging unit and composed of a plurality of frames; and an imaging control unit that determines, on the basis of video-related information acquired in the video processing on a first frame belonging to a first group out of the plurality of frames, an exposure condition of the imaging unit in a second frame belonging to a second group different from the first group out of the plurality of frames.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: September 27, 2022
    Assignee: NEC CORPORATION
    Inventors: Yoshiaki Sato, Noriyoshi Hiroi, Gaku Nakano