Patents by Inventor Yoshiei Hasegawa

Yoshiei Hasegawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6657448
    Abstract: An electrical connection apparatus includes a lattice having a plurality of openings arranged in each of the X- and Y-directions intersecting with each other, and a probe sheet including a plurality of probe elements provided in each opening, each probe element having a contact portion. Each probe sheet is arranged on one surface side of the lattice such that the contact portion is positioned to correspond to the opening, and further, the probe sheet is divided into a plurality of probe regions which are separated from each other by one or more boundary portions defined between adjacent opening regions, each including one or more openings.
    Type: Grant
    Filed: January 12, 2001
    Date of Patent: December 2, 2003
    Assignee: Kabushiki Kaisha Nihon Micronics
    Inventor: Yoshiei Hasegawa
  • Patent number: 6595794
    Abstract: An electrical contact technique for use in the semiconductor device inspection equipment is disclosed. There are used one or more pyramid-shaped contactors projecting toward an objective semiconductor device to be tested. The contactor is brought into contact with the projection electrode of the objective semiconductor device through the edge line or the slant surface thereof. Accordingly, only the side portion of the projection electrode is pressed by the edge line or the slant surface of the contactor, thus the projection electrode being prevented from being damaged at the tip portion thereof.
    Type: Grant
    Filed: March 5, 2001
    Date of Patent: July 22, 2003
    Assignee: Kabushiki Kaisha Nihon Micronics
    Inventor: Yoshiei Hasegawa
  • Publication number: 20010027053
    Abstract: An electrical contact technique for use in the semiconductor device inspection equipment is disclosed. There are used one or more pyramid-shaped contactors projecting toward an objective semiconductor device to be tested. The contactor is brought into contact with the projection electrode of the objective semiconductor device through the edge line or the slant surface thereof. Accordingly, only the side portion of the projection electrode is pressed by the edge line or the slant surface of the contactor, thus the projection electrode being prevented from being damaged at the tip portion thereof.
    Type: Application
    Filed: March 5, 2001
    Publication date: October 4, 2001
    Applicant: Kabushiki Kaisha Nihon Micronics
    Inventor: Yoshiei Hasegawa
  • Publication number: 20010016437
    Abstract: An electrical connection apparatus includes a lattice having a plurality of openings arranged in each of the X- and Y-directions intersecting with each other, and a probe sheet including a plurality of probe elements provided in each opening, each probe element having a contact portion Each probe sheet is arranged on one surface side of the lattice such that the contact portion is positioned to correspond to the opening, and further, the probe sheet is divided into a plurality of probe regions which are separated from each other by one or more boundary portions defined between adjacent opening regions, each including one or more openings.
    Type: Application
    Filed: January 12, 2001
    Publication date: August 23, 2001
    Applicant: Kabushiki Kaisha Nihon Micronics
    Inventor: Yoshiei Hasegawa
  • Patent number: 6271674
    Abstract: A probe card including a plurality of probe blocks can be easily put together substantially in a lattice-like form, and four chips adjoining around the intersection portion of imaginary boundary lines intersecting at right angle each other form a cross-like shape to be tested simultaneously. A plurality of probe blocks with the first and second probe group including a plurality of probes are set up on a base plate substantially in the lattice-like form by a probe set-up means. The needle points of the first and second probe groups are respectively located across the imaginary line so as to oppose to each other. A probe blocks located around the lattice intersection portion are fitted to the base plate such that the needle point parts of the probes located in the vicinity of the lattice intersection portion are positioned on the same side with respect to their needle rear part.
    Type: Grant
    Filed: July 27, 1999
    Date of Patent: August 7, 2001
    Assignee: Kabushiki Kaisha Nihon Micronics
    Inventors: Yoshiei Hasegawa, Yukihiro Hirai, Tadashi Sugiyama, Takahiko Tandai, Norie Yamaguchi, Satoshi Narita
  • Patent number: 6019612
    Abstract: The connecting apparatus has a plurality of probes, each having a deformed portion, a needle front portion with a tip end to be pressed against an electrode portion of a device to be tested and continuous with the deformed portion, and a needle tail portion continuous with the other end portion of the deformed portion, assembled in parallel into a base plate by assembling equipment with the tail end portions brought into contact with a retraction preventive portion. Thereby, when device to be tested is pressed against the probe, the probe is prevented from retracting according to the curved state of the deformed portion.
    Type: Grant
    Filed: July 14, 1998
    Date of Patent: February 1, 2000
    Assignee: Kabushiki Kaisha Nihon Micronics
    Inventors: Yoshiei Hasegawa, Eichi Osato
  • Patent number: 5982184
    Abstract: A test head is used in an electrical characteristic test of a plurality of integrated circuits formed on a semiconductor wafer. The test head includes a probe holder in a frame form for holding a plurality of first probes and supporting bodies in a plate form for supporting a plurality of second probes. The probe holder is disposed on a base plate such that the first probes are brought into contact with pads disposed at a portion corresponding to the edge portion defining an opening formed in the base plate. The supporting bodies are attached to the base plate with the direction of their thickness oriented in the lengthwise direction of the opening in the base plate in order that the second probes are brought into contact with pads existing at the boundary portions of a plurality of integrated circuits to be tested at a time and disposed at the portions corresponding to the adjoining sides of the integrated circuits.
    Type: Grant
    Filed: September 2, 1997
    Date of Patent: November 9, 1999
    Assignee: Kabushiki Kaisha Nihon Micronics
    Inventor: Yoshiei Hasegawa
  • Patent number: 5888075
    Abstract: The auxiliary apparatus comprises a base plate having a plurality of wiring portions on one face, a plurality of probes, and assembling means for assembling the probes in parallel to each other into the base plate. The assembling means presses the probes by a needle pressing portion extending in the arranging direction of the probes, bringing at least a part of deformed portions of the probes into contact with the wiring portions of the base plate, and each probe is pressed at the tip end of its needle front portion continued to one end of the deformed portion against an electrode portion of a device under inspection. Thereby, the probe is sandwiched between the base plate and the needle pressing portion to be maintained in that state and, in addition, scrapes off a film such as an oxide film existing in the electrode portion by the tip end of the needle front portion.
    Type: Grant
    Filed: November 24, 1997
    Date of Patent: March 30, 1999
    Assignee: Kabushiki Kaisha Nihon Micronics
    Inventors: Yoshiei Hasegawa, Eichi Osato
  • Patent number: 4563640
    Abstract: A fixed probe board to be used for testing semiconductor wafer chips. The probe board comprises a probe support base having four mutually tapered probe support surfaces, and a multiplicity of probes secured on the probe support surfaces with their forward contact tips lying in a common contacting plane. The four probe support surfaces are joined together along lines corresponding to extensions of two diagonal lines of a semiconductor wafer chip to be tested. The inner circumference of each probe support surface is arcuate so as to be approximately equally distanced from the corresponding side of the wafer chip. The probe surfaces have the same acute angle relative to their common contacting plane.
    Type: Grant
    Filed: May 3, 1982
    Date of Patent: January 7, 1986
    Inventor: Yoshiei Hasegawa