Patents by Inventor Yoshifumi Tanada

Yoshifumi Tanada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11387263
    Abstract: An object of the present invention is to decrease substantial resistance of art electrode such as a transparent electrode or a wiring, and furthermore, to provide a display device for which is possible to apply same voltage to light-emitting elements. In the invention, a auxiliary wiring that is formed in one layer in which a conductive, film of a semiconductor element such as an electrode, wiring, a signal line, a scanning line, or a power supply line is connected to an electrode typified by a second electrode, and a wiring. It is preferable that the auxiliary wiring is formed into a conductive film to include low resistive material, especially, formed to include lower resistive, material than the resistance of an electrode and a wiring that is required to reduce the resistance.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: July 12, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Noriko Miyagi, Masayuki Sakakura, Tatsuya Arao, Ritsuko Nagao, Yoshifumi Tanada
  • Patent number: 11316478
    Abstract: Power consumption of a signal processing circuit is reduced. Further, power consumption of a semiconductor device including the signal processing circuit is reduced. The signal processing circuit includes a reference voltage generation circuit, a voltage divider circuit, an operational amplifier, a bias circuit for supplying bias current to the operational amplifier, and first and second holding circuits. The first holding circuit is connected between the reference voltage generation circuit and the bias circuit. The second holding circuit is connected between the voltage divider circuit and a non-inverting input terminal of the operational amplifier. Reference voltage from the reference voltage generation circuit and reference voltage from the voltage divider circuit can be held in the first and second holding circuits, respectively, so that the reference voltage generation circuit can stop operating. Thus, power consumption of the reference voltage generation circuit can be reduced.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: April 26, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kei Takahashi, Yoshifumi Tanada
  • Publication number: 20220123097
    Abstract: Display irregularities in light emitting devices, which develop due to dispersions per pixel in the threshold value of TFTs for supplying electric current to light emitting elements, are obstacles to increasing the image quality of the light emitting devices. An electric potential in which the threshold voltage of a TFT (105) is either added to or subtracted from the electric potential of a reset signal line (110) is stored in capacitor means (108). A voltage, in which the corresponding threshold voltage is added to an image signal, is applied to a gate electrode of a TFT (106). TFTs within a pixel are disposed adjacently, and dispersion in the characteristics of the TFTs does not easily develop. The threshold value of to the TFT (105) is thus cancelled, even if the threshold values of the TFTs (106) differ per pixel, and a predetermined drain current can be supplied to an EL element (109).
    Type: Application
    Filed: September 7, 2021
    Publication date: April 21, 2022
    Inventors: Hajime Kimura, Yoshifumi Tanada
  • Publication number: 20220028326
    Abstract: Brightness irregularities that develop in a light emitting device due to is persion among pixels in the threshold values of TFTs used for supplying electric current to light emitting devices become obstacles to improved image quality of the light emitting device. As an image signal input to a pixel from a source signal line, a desired electric potential is applied to a gate electrode of a TFT for supplying electric current to an EL device, through a TFT having its gate and drain connected to each other. A voltage equal to the TFT threshold value is produced between the source and the drain of the TFT 105. An electric potential in which the image signal is offset by the amount of the threshold value is therefore applied to the gate electrode of the TFT. Further, TFTs are disposed in close proximity to each other within the pixel, so that dispersions in the TFT characteristics do not easily develop.
    Type: Application
    Filed: May 13, 2021
    Publication date: January 27, 2022
    Inventors: Hajime Kimura, Yoshifumi Tanada
  • Patent number: 11121203
    Abstract: Display irregularities in light emitting devices, which develop due to dispersions per pixel in the threshold value of TFTs for supplying electric current to light emitting elements, are obstacles to increasing the image quality of the light emitting devices. An electric potential in which the threshold voltage of a TFT (105) is either added to or subtracted from the electric potential of a reset signal line (110) is stored in capacitor means (108). A voltage, in which the corresponding threshold voltage is added to an image signal, is applied to a gate electrode of a TFT (106). TFTs within a pixel are disposed adjacently, and dispersion in the characteristics of the TFTs does not easily develop. The threshold value of the TFT (105) is thus canceled, even if the threshold values of the TFTs (106) differ per pixel, and a predetermined drain current can be supplied to an EL element (109).
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: September 14, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Yoshifumi Tanada
  • Patent number: 11011108
    Abstract: Brightness irregularities that develop in a light emitting device due to is persion among pixels in the threshold values of TFTs used for supplying electric current to light emitting devices become obstacles to improved image quality of the light emitting device. As an image signal input to a pixel from a source signal line, a desired electric potential is applied to a gate electrode of a TFT for supplying electric current to an EL device, through a TFT having its gate and drain connected to each other. A voltage equal to the TFT threshold value is produced between the source and the drain of the TFT 105. An electric potential in which the image signal is offset by the amount of the threshold value is therefore applied to the gate electrode of the TFT. Further, TFTs are disposed in close proximity to each other within the pixel, so that dispersions in the TFT characteristics do not easily develop.
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: May 18, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Yoshifumi Tanada
  • Patent number: 10991299
    Abstract: Brightness irregularities that develop in a light emitting device due to is persion among pixels in the threshold values of TFTs used for supplying electric current to light emitting devices become obstacles to improved image quality of the light emitting device. As an image signal input to a pixel from a source signal line, a desired electric potential is applied to a gate electrode of a TFT for supplying electric current to an EL device, through a TFT having its gate and drain connected to each other. A voltage equal to the TFT threshold value is produced between the source and the drain of the TFT 105. An electric potential in which the image signal is offset by the amount of the threshold value is therefore applied to the gate electrode of the TFT. Further, TFTs are disposed in close proximity to each other within the pixel, so that dispersions in the TFT characteristics do not easily develop.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: April 27, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Yoshifumi Tanada
  • Patent number: 10916319
    Abstract: A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node a rises. When the potential of the node ? reaches (VDD?VthN), the node ? became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: February 9, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Patent number: 10891894
    Abstract: Brightness irregularities that develop in a light emitting device due to is persion among pixels in the threshold values of TFTs used for supplying electric current to light emitting devices become obstacles to improved image quality of the light emitting device. As an image signal input to a pixel from a source signal line, a desired electric potential is applied to a gate electrode of a TFT for supplying electric current to an EL device, through a TFT having its gate and drain connected to each other. A voltage equal to the TFT threshold value is produced between the source and the drain of the TFT 105. An electric potential in which the image signal is offset by the amount of the threshold value is therefore applied to the gate electrode of the TFT. Further, TFTs are disposed in close proximity to each other within the pixel, so that dispersions in the TFT characteristics do not easily develop.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: January 12, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Yoshifumi Tanada
  • Patent number: 10762834
    Abstract: Brightness irregularities that develop in a light emitting device due to is persion among pixels in the threshold values of TFTs used for supplying electric current to light emitting devices become obstacles to improved image quality of the light emitting device. As an image signal input to a pixel from a source signal line, a desired electric potential is applied to a gate electrode of a TFT for supplying electric current to an EL device, through a TFT having its gate and drain connected to each other. A voltage equal to the TFT threshold value is produced between the source and the drain of the TFT 105. An electric potential in which the image signal is offset by the amount of the threshold value is therefore applied to the gate electrode of the TFT. Further, TFTs are disposed in close proximity to each other within the pixel, so that dispersions in the TFT characteristics do not easily develop.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: September 1, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Yoshifumi Tanada
  • Publication number: 20200177132
    Abstract: Power consumption of a signal processing circuit is reduced. Further, power consumption of a semiconductor device including the signal processing circuit is reduced. The signal processing circuit includes a reference voltage generation circuit, a voltage divider circuit, an operational amplifier, a bias circuit for supplying bias current to the operational amplifier, and first and second holding circuits. The first holding circuit is connected between the reference voltage generation circuit and the bias circuit. The second holding circuit is connected between the voltage divider circuit and a non-inverting input terminal of the operational amplifier. Reference voltage from the reference voltage generation circuit and reference voltage from the voltage divider circuit can be held in the first and second holding circuits, respectively, so that the reference voltage generation circuit can stop operating. Thus, power consumption of the reference voltage generation circuit can be reduced.
    Type: Application
    Filed: February 6, 2020
    Publication date: June 4, 2020
    Inventors: Kei TAKAHASHI, Yoshifumi TANADA
  • Patent number: 10672329
    Abstract: A light emitting device that achieves long life, and which is capable of performing high duty drive, by suppressing initial light emitting element deterioration is provided. Reverse bias application to an EL element (109) is performed one row at a time by forming a reverse bias electric power source line (112) and a reverse bias TFT (108). Reverse bias application can therefore be performed in synchronous with operations for write-in of an image signal, light emission, erasure, and the like. Reverse bias application therefore becomes possible while maintaining a duty equivalent to that of a conventional driving method.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: June 2, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitusaki Osame, Aya Anzai, Yoshifumi Tanada, Keisuke Miyagawa, Satoshi Seo, Shunpei Yamazaki
  • Publication number: 20200082895
    Abstract: A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node a rises. When the potential of the node ? reaches (VDD?VthN), the node ? became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105.
    Type: Application
    Filed: September 20, 2019
    Publication date: March 12, 2020
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Patent number: 10560056
    Abstract: Power consumption of a signal processing circuit is reduced. Further, power consumption of a semiconductor device including the signal processing circuit is reduced. The signal processing circuit includes a reference voltage generation circuit, a voltage divider circuit, an operational amplifier, a bias circuit for supplying bias current to the operational amplifier, and first and second holding circuits. The first holding circuit is connected between the reference voltage generation circuit and the bias circuit. The second holding circuit is connected between the voltage divider circuit and a non-inverting input terminal of the operational amplifier. Reference voltage from the reference voltage generation circuit and reference voltage from the voltage divider circuit can be held in the first and second holding circuits, respectively, so that the reference voltage generation circuit can stop operating. Thus, power consumption of the reference voltage generation circuit can be reduced.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: February 11, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kei Takahashi, Yoshifumi Tanada
  • Publication number: 20200035708
    Abstract: An object of the present invention is to decrease substantial resistance of art electrode such as a transparent electrode or a wiring, and furthermore, to provide a display device for which is possible to apply same voltage to light-emitting elements. In the invention, a auxiliary wiring that is formed in one layer in which a conductive, film of a semiconductor element such as an electrode, wiring, a signal line, a scanning line, or a power supply line is connected to an electrode typified by a second electrode, and a wiring. It is preferable that the auxiliary wiring is formed into a conductive film to include low resistive material, especially, formed to include lower resistive, material than the resistance of an electrode and a wiring that is required to reduce the resistance.
    Type: Application
    Filed: August 7, 2019
    Publication date: January 30, 2020
    Inventors: Noriko Miyagi, Masayuki Sakakura, Tatsuya Arao, Ritsuko Nagao, Yoshifumi Tanada
  • Publication number: 20200013847
    Abstract: Display irregularities in light emitting devices, which develop due to dispersions per pixel in the threshold value of TFTs for supplying electric current to light emitting elements, are obstacles to increasing the image quality of the light emitting devices. An electric potential in which the threshold voltage of a TFT (105) is either added to or subtracted from the electric potential of a reset signal line (110) is stored in capacitor means (108). A voltage, in which the corresponding threshold voltage is added to an image signal, is applied to a gate electrode of a TFT (106). TFTs within a pixel are disposed adjacently, and dispersion in the characteristics of the TFTs does not easily develop. The threshold value of the TFT (105) is thus canceled, even if the threshold values of the TFTs (106) differ per pixel, and a predetermined drain current can be supplied to an EL element (109).
    Type: Application
    Filed: July 15, 2019
    Publication date: January 9, 2020
    Inventors: Hajime Kimura, Yoshifumi Tanada
  • Publication number: 20190355297
    Abstract: A light emitting device that achieves long life, and which is capable of performing high duty drive, by suppressing initial light emitting element deterioration is provided. Reverse bias application to an EL element (109) is performed one row at a time by forming a reverse bias electric power source line (112) and a reverse bias TFT (108). Reverse bias application can therefore be performed in synchronous with operations for write-in of an image signal, light emission, erasure, and the like. Reverse bias application therefore becomes possible while maintaining a duty equivalent to that of a conventional driving method.
    Type: Application
    Filed: August 2, 2019
    Publication date: November 21, 2019
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitusaki Osame, Aya Anzai, Yoshifumi Tanada, Keisuke Miyagawa, Satoshi Seo, Shunpei Yamazaki
  • Publication number: 20190340976
    Abstract: Brightness irregularities that develop in a light emitting device due to is persion among pixels in the threshold values of TFTs used for supplying electric current to light emitting devices become obstacles to improved image quality of the light emitting device. As an image signal input to a pixel from a source signal line, a desired electric potential is applied to a gate electrode of a TFT for supplying electric current to an EL device, through a TFT having its gate and drain connected to each other. A voltage equal to the TFT threshold value is produced between the source and the drain of the TFT 105. An electric potential in which the image signal is offset by the amount of the threshold value is therefore applied to the gate electrode of the TFT. Further, TFTs are disposed in close proximity to each other within the pixel, so that dispersions in the TFT characteristics do not easily develop.
    Type: Application
    Filed: July 15, 2019
    Publication date: November 7, 2019
    Inventors: Hajime Kimura, Yoshifumi Tanada
  • Publication number: 20190295465
    Abstract: Brightness irregularities that develop in a light emitting device due to is persion among pixels in the threshold values of TFTs used for supplying electric current to light emitting devices become obstacles to improved image quality of the light emitting device. As an image signal input to a pixel from a source signal line, a desired electric potential is applied to a gate electrode of a TFT for supplying electric current to an EL device, through a TFT having its gate and drain connected to each other. A voltage equal to the TFT threshold value is produced between the source and the drain of the TFT 105. An electric potential in which the image signal is offset by the amount of the threshold value is therefore applied to the gate electrode of the TFT. Further, TFTs are disposed in close proximity to each other within the pixel, so that dispersions in the TFT characteristics do not easily develop.
    Type: Application
    Filed: April 2, 2019
    Publication date: September 26, 2019
    Inventors: Hajime Kimura, Yoshifumi Tanada
  • Patent number: 10424390
    Abstract: A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node ? rises. When the potential of the node ? reaches (VDD?VthN), the node ? became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: September 24, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada