Patents by Inventor Yoshifumi Tanada

Yoshifumi Tanada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8988324
    Abstract: A light emitting device that achieves long life, and which is capable of performing high duty drive, by suppressing initial light emitting element deterioration is provided. Reverse bias application to an EL element (109) is performed one row at a time by forming a reverse bias electric power source line (112) and a reverse bias TFT (108). Reverse bias application can therefore be performed in synchronous with operations for write-in of an image signal, light emission, erasure, and the like. Reverse bias application therefore becomes possible while maintaining a duty equivalent to that of a conventional driving method.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: March 24, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuaki Osame, Aya Anzai, Yoshifumi Tanada, Keisuke Miyagawa, Satoshi Seo, Shunpei Yamazaki
  • Patent number: 8980733
    Abstract: The semiconductor device has a semiconductor layer, a gate electrode which covers an end portion of the semiconductor layer, and an insulating layer for insulating the semiconductor layer and the gate electrode. The film thickness of the insulating layer which insulates a region where an end portion of the semiconductor layer and the gate electrode overlap each other is thicker than the film thickness of the insulating layer which covers the central portion of the semiconductor layer.
    Type: Grant
    Filed: October 14, 2010
    Date of Patent: March 17, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yukie Suzuki, Yasuyuki Arai, Yoshitaka Moriya, Kazuko Ikeda, Yoshifumi Tanada, Shuhei Takahashi
  • Patent number: 8975632
    Abstract: Semiconductor elements deteriorate or are destroyed due to electrostatic discharge damage. The present invention provides a semiconductor device in which a protecting means is formed in each pixel. The protecting means is provided with one or a plurality of elements selected from the group consisting of resistor elements, capacitor elements, and rectifying elements. Sudden changes in the electric potential of a source electrode or a drain electrode of a transistor due to electric charge that builds up in a pixel electrode is relieved by disposing the protecting means between the pixel electrode of the light-emitting element and the source electrode or the drain electrode of the transistor. Deterioration or destruction of the semiconductor element due to electrostatic discharge damage is thus prevented.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: March 10, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masahiko Hayakawa, Yoshifumi Tanada, Mitsuaki Osame, Aya Anzai, Ryota Fukumoto
  • Patent number: 8928011
    Abstract: A highly reliable light-emitting device or lighting device is provided. Further, a light-emitting device or lighting device with a high manufacturing yield is provided. Provided is a light-emitting device having a contact structure which includes a separation layer having a shape typified by a reverse tapered shape in which an outline of the bottom portion is inside an outline of an upper portion and which utilizes the difference between an amount of a light-emitting layer extending inside the outline and that of an upper electrode extending inside the outline. Further, when the outline of the separation layer which forms the contact portion has a depression and a projection, the length of the contact portion can be increased, and thus, contact resistance can be reduced.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: January 6, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshifumi Tanada, Hidenori Mori
  • Patent number: 8896506
    Abstract: Brightness irregularities that develop in a light emitting device due to is persion among pixels in the threshold values of TFTs used for supplying electric current to light emitting devices become obstacles to improved image quality of the light emitting device. As an image signal input to a pixel from a source signal line, a desired electric potential is applied to a gate electrode of a TFT for supplying electric current to an EL device, through a TFT having its gate and drain connected to each other. A voltage equal to the TFT threshold value is produced between the source and the drain of the TFT 105. An electric potential in which the image signal is offset by the amount of the threshold value is therefore applied to the gate electrode of the TFT. Further, TFTs are disposed in close proximity to each other within the pixel, so that dispersions in the TFT characteristics do not easily develop.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: November 25, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Yoshifumi Tanada
  • Publication number: 20140327008
    Abstract: A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node ? rises. When the potential of the node ? reaches (VDD?VthN), the node ? became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105.
    Type: Application
    Filed: July 16, 2014
    Publication date: November 6, 2014
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Publication number: 20140293207
    Abstract: An object of the present invention is to decrease substantial resistance of an electrode such as a transparent electrode or a wiring, and furthermore, to provide a display device for which is possible to apply same voltage to light-emitting elements. In the invention, a auxiliary wiring that is formed in one layer in which a conductive film of a semiconductor element such as an electrode, wiring, a signal line, a scanning line, or a power supply line is connected to an electrode typified by a second electrode, and a wiring. It is preferable that the auxiliary wiring is formed into a conductive film to include low resistive material, especially, formed to include lower resistive material than the resistance of an electrode and a wiring that is required to reduce the resistance.
    Type: Application
    Filed: June 17, 2014
    Publication date: October 2, 2014
    Inventors: Noriko Miyagi, Masayuki Sakakura, Tatsuya Arao, Ritsuko Nagao, Yoshifumi Tanada
  • Publication number: 20140285410
    Abstract: A display device in which the current load of wirings are distributed and display variations due to voltage drop are suppressed. An active matrix display device of the invention comprises a first current input terminal, a second current input terminal, and a plurality of current supply lines extending parallel to each other. Each current supply line is connected to a plurality of driving transistors in a line. One end of each current supply line is connected to the first current input terminal via a first wiring intersecting with the current supply lines, and the other end thereof is connected to the second current input terminal via a second wiring intersecting with the current supply lines. Accordingly, a current is supplied to each current supply line from both the first and. the second current input terminals. The first and the second current input terminals are provided separately from each other.
    Type: Application
    Filed: June 6, 2014
    Publication date: September 25, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshifumi Tanada
  • Publication number: 20140253419
    Abstract: To provide a display device which can achieve a reduced frame width and of which the shape of the frame is the same as or similar to the shape of a display region even in the case where the display region has a non-rectangular shape. The display device includes a non-rectangular display region and a driver circuit portion on the periphery of the display region. The driver circuit portion includes at least two gate drivers and at least two source drivers. One of the gate drivers and the other of the gate drivers are arranged to be apart from each other, and one of the source drivers and the other of the source drivers are arranged to be apart from each other.
    Type: Application
    Filed: February 27, 2014
    Publication date: September 11, 2014
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Yoshifumi TANADA
  • Patent number: 8798226
    Abstract: A driver circuit of a display device, which includes TFTs of a single conductivity type and outputs an output signal with normal amplitude. A pulse is inputted to TFTs 101 and 104 to turn ON the TFTs and a potential of a node ? is raised. When the potential of the node ? reaches (VDD?VthN), the node ? becomes in a floating state. Accordingly, a TFT 105 is turned ON and a potential of an output node is raised as a clock signal becomes High level. On the other hand, a potential of a gate electrode of the TFT 105 is further raised due to an operation of a capacitance means 107 as the potential of the output node is raised, so that the potential of the gate electrode of the TFT 105 becomes higher than (VDD+VthN). Thus, the potential of the output node is raised to VDD without causing a voltage drop due to a threshold voltage of the TFT 105.
    Type: Grant
    Filed: February 6, 2013
    Date of Patent: August 5, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Sho Nagao, Yoshifumi Tanada, Yutaka Shionoiri, Hiroyuki Miyake
  • Patent number: 8786533
    Abstract: A pulse is input to first and second TFTs to turn ON the first and second TFTs so that the potential of a node a rises. When the potential of the node a reaches (VDD?VthN), the node ? enters a floating state. Accordingly, a third TFT then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the third TFT further rises due to an operation of capacitance as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the third TFT.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: July 22, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Patent number: 8779348
    Abstract: Objects are to suppress reduction in current output from a photoelectric conversion device and to prevent ESD from occurring in the photoelectric conversion device without greatly increasing the number of steps for manufacturing the photoelectric conversion device. The photoelectric conversion device includes a photodiode generating current by light irradiation; an amplifier circuit including at least one MOS transistor for amplifying the current; and at least one diode which is connected in series with the photodiode in a path of the current generated in the photodiode or a path of the current amplified by at least one MOS transistor so that a bias direction of the diode is opposite to that of the photodiode. Each of the photodiode and the diode includes a stack of a plurality of semiconductor films.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: July 15, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshifumi Tanada, Hajime Kimura
  • Publication number: 20140192098
    Abstract: Brightness irregularities that develop in a light emitting device due to is persion among pixels in the threshold values of TFTs used for supplying electric current to light emitting devices become obstacles to improved image quality of the light emitting device. As an image signal input to a pixel from a source signal line, a desired electric potential is applied to a gate electrode of a TFT for supplying electric current to an EL device, through a TFT having its gate and drain connected to each other. A voltage equal to the TFT threshold value is produced between the source and the drain of the TFT 105. An electric potential in which the image signal is offset by the amount of the threshold value is therefore applied to the gate electrode of the TFT. Further, TFTs are disposed in close proximity to each other within the pixel, so that dispersions in the TFT characteristics do not easily develop.
    Type: Application
    Filed: January 15, 2014
    Publication date: July 10, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Yoshifumi Tanada
  • Patent number: 8772795
    Abstract: To provide a light-emitting device including the plurality of light-emitting elements having a structure in which a light-emitting area is large and defects in patterning of light-emitting elements are suppressed. To provide a lighting device including the light-emitting device. The light-emitting device includes a first wiring provided over a substrate having an insulating surface, an insulating film provided over the first wiring, a second wiring provided over the insulating film, and a light-emitting element unit including a plurality of light-emitting elements provided over the first wiring with the insulating film provided therebetween. The plurality of light-emitting elements each include a first electrode layer having a light-blocking property, a layer containing an organic compound in contact with the first electrode layer, and a second electrode layer having a light-transmitting property in contact with the layer containing an organic compound.
    Type: Grant
    Filed: February 7, 2012
    Date of Patent: July 8, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Koji Ono, Yoshifumi Tanada
  • Patent number: 8759835
    Abstract: An object of the present invention is to decrease substantial resistance of an electrode such as a transparent electrode or a wiring, and furthermore, to provide a display device for which is possible to apply same voltage to light-emitting elements. In the invention, a auxiliary wiring that is formed in one layer in which a conductive film of a semiconductor element such as an electrode, wiring, a signal line, a scanning line, or a power supply line is connected to an electrode typified by a second electrode, and a wiring. It is preferable that the auxiliary wiring is formed into a conductive film to include low resistive material, especially, formed to include lower resistive material than the resistance of an electrode and a wiring that is required to reduce the resistance.
    Type: Grant
    Filed: May 10, 2011
    Date of Patent: June 24, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Noriko Miyagi, Masayuki Sakakura, Tatsuya Arao, Ritsuko Nagao, Yoshifumi Tanada
  • Publication number: 20140168196
    Abstract: A light emitting device that achieves long life, and which is capable of performing high duty drive, by suppressing initial light emitting element deterioration is provided. Reverse bias application to an EL element (109) is performed one row at a time by forming a reverse bias electric power source line (112) and a reverse bias TFT (108). Reverse bias application can therefore be performed in synchronous with operations for write-in of an image signal, light emission, erasure, and the like. Reverse bias application therefore becomes possible while maintaining a duty equivalent to that of a conventional driving method.
    Type: Application
    Filed: February 21, 2014
    Publication date: June 19, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuaki Osame, Aya Anzai, Yoshifumi Tanada, Keisuke Miyagawa, Satoshi Seo, Shunpei Yamazaki
  • Publication number: 20140159045
    Abstract: There is provided a semiconductor device in which fabrication steps can be reduced by constructing a circuit using only TFTs of one conductivity type and in which a voltage amplitude of an output signal can be normally obtained. A capacitance (205) is provided between a gate and a source of a TFT (203) connected to an output node, and a circuit formed of TFTs (201) and (202) has a function to bring a node ? into a floating state. When the node ? is in the floating state, a potential of the node ? is caused higher than VDD by using gate-source capacitance coupling of the TFT (203) through the capacitance (205), thus an output signal having an amplitude of VDD?GND can be normally obtained without causing amplitude attenuation due to the threshold value of the TFT.
    Type: Application
    Filed: February 14, 2014
    Publication date: June 12, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Patent number: 8749464
    Abstract: It is an object of the invention to provide a display device which performs high grayscale display in accordance with display contents and a game machine with an improved realistic sensation. The invention is a display device characterized by including a pixel portion which performs display based on a video signal and a driver circuit portion inputted with the video signal, wherein the driver circuit portion has a unit for controlling a grayscale in accordance with display of the pixel portion. In a liquid crystal display device, luminance of a lighting unit is controlled based on a signal from the unit for controlling a grayscale whereas a current supplied to a light emitting element is controlled in a light emitting device. By applying such a display device to a game machine, a realistic sensation can be improved.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: June 10, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yu Kojima, Yuko Tachimura, Shunpei Yamazaki, Yoshifumi Tanada
  • Patent number: 8749461
    Abstract: A display device in which the current load of wirings are distributed and display variations due to voltage drop are suppressed. An active matrix display device of the invention comprises a first current input terminal, a second current input terminal, and a plurality of current supply lines extending parallel to each other. Each current supply line is connected to a plurality of driving transistors in a line. One end of each current supply line is connected to the first current input terminal via a first wiring intersecting with the current supply lines, and the other end thereof is connected to the second current input terminal via a second wiring intersecting with the current supply lines. Accordingly, a current is supplied to each current supply line from both the first and. the second current input terminals. The first and the second current input terminals are provided separately from each other.
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: June 10, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshifumi Tanada
  • Publication number: 20140139775
    Abstract: A semiconductor device includes: a transistor including a gate electrode, a gate insulating film over the gate electrode, a semiconductor layer over the gate insulating film, and a source electrode and a drain electrode over the semiconductor layer; a first insulating film comprising an inorganic material over the transistor; a second insulating film comprising an organic material over the first insulating film; a first conductive film over the second insulating film and in a region overlapping with the semiconductor layer; a third insulating film comprising an inorganic material over the first conductive film; and a second conductive film over the third insulating film and in a region overlapping with the first conductive film. The absolute value of a first potential applied to the first conductive film is greater than the absolute value of a second potential applied to the second conductive film.
    Type: Application
    Filed: November 12, 2013
    Publication date: May 22, 2014
    Inventors: Hiroyuki MIYAKE, Shunpei YAMAZAKI, Yoshifumi TANADA, Manabu SATO, Toshinari SASAKI, Kenichi OKAZAKI, Junichi KOEZUKA, Takuya MATSUO, Hiroshi MATSUKIZONO, Yosuke KANZAKI, Shigeyasu MORI