Patents by Inventor Yoshifumi Tanada

Yoshifumi Tanada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7977678
    Abstract: A semiconductor display device using a light-emitting element, which can suppress luminance unevenness among pixels due to the potential drop of a wiring, is provided. Power supply lines to which a power supply potential is supplied are electrically connected to each other in a display region where a plurality of pixels are arranged. Further, an interlayer insulating film is formed over a wiring (an auxiliary power supply line) for electrically connecting the power supply lines to each other in the display region and a gate electrode of a transistor included in a pixel; and the power supply lines are formed over the interlayer insulating film which is formed over the auxiliary power supply line and the gate electrode. Furthermore, a wiring (an auxiliary wiring) formed over the interlayer insulating film is electrically or directly connected to the auxiliary power supply line.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: July 12, 2011
    Assignee: Semiconductor Energy laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Yoshifumi Tanada, Hiroyuki Miyake, Kei Takahashi
  • Publication number: 20110149189
    Abstract: There is provided a semiconductor device in which fabrication steps can be reduced by constructing a circuit using only TFTs of one conductivity type and in which a voltage amplitude of an output signal can be normally obtained. A capacitance (205) is provided between a gate and a source of a TFT (203) connected to an output node, and a circuit formed of TFTs (201) and (202) has a function to bring a node ? into a floating state. When the node ? is in the floating state, a potential of the node ? is caused higher than VDD by using gate-source capacitance coupling of the TFT (203) through the capacitance (205), thus an output signal having an amplitude of VDD-GND can be normally obtained without causing amplitude attenuation due to the threshold value of the TFT.
    Type: Application
    Filed: March 3, 2011
    Publication date: June 23, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Publication number: 20110148208
    Abstract: In order to increase the continuous operating time of a display device driven by a battery or the like, and a portable information terminal using the same, the volume and weight of the battery are increased. Thus, there arises a trade-off between the increased capacity of the battery and the portability of the device/terminal. Therefore, the invention provides a display device with portability ensured, which is capable of operating continuously for long periods and a portable information terminal using the same. In the display device, TFTs and an RFID tag are formed over the same insulating substrate. The RFID tag detects signals from a reader/writer, and generates DC power based on the signals. While the RFID tag is detecting signals, the display device is driven by the DC power generated in the RFID tag.
    Type: Application
    Filed: February 28, 2011
    Publication date: June 23, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yoshifumi TANADA, Shunpei YAMAZAKI
  • Publication number: 20110129987
    Abstract: To provide a structure and a manufacturing method for efficiently forming a transistor to which tensile strain is preferably applied and a transistor to which compressive strain is preferably applied over the same substrate when stress is applied to a semiconductor layer in order to improve mobility of the transistors in a semiconductor device. Plural kinds of transistors which are separated from a single-crystal semiconductor substrate and include single-crystal semiconductor layers bonded to a substrate having an insulating surface with a bonding layer interposed therebetween are provided over the same substrate. One of the transistors uses a single-crystal semiconductor layer as an active layer, to which tensile strain is applied. The other transistors use single-crystal semiconductor layers as active layers, to which compressive strain using part of heat shrink generated by heat treatment of the base substrate after bonding is applied.
    Type: Application
    Filed: February 10, 2011
    Publication date: June 2, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Yoshifumi TANADA
  • Publication number: 20110122121
    Abstract: The present invention provides a semiconductor device in which a power line is not affected by noise due to a voltage drop caused by instantaneous high-current consumption in the buffer portion and that has no possibility that a logic portion malfunctions. In a case where the same potential is supplied to a logic portion and a buffer portion, by a method in which separate FPC terminals are used for the logic portion and the buffer portion, or by a method in which the FPC terminal is shared but a power line is branched for the logic portion and the buffer portion at a point close to the FPC terminal, a problem that the logic portion is affected by noise generated by a voltage drop of the power line due to instantaneous high-current consumption in the buffer portion can be prevented.
    Type: Application
    Filed: January 31, 2011
    Publication date: May 26, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Ryota Fukumoto, Mitsuaki Osame, Hiroyuki Miyake, Yoshifumi Tanada, Seiko AMANO
  • Publication number: 20110115758
    Abstract: Display irregularities in light emitting devices, which develop due to dispersions per pixel in the threshold value of TFTs for supplying electric current to light emitting elements, are obstacles to increasing the image quality of the light emitting devices. An electric potential in which the threshold voltage of a TFT (105) is either added to or subtracted from the electric potential of a reset signal line (110) is stored in capacitor means (108). A voltage, in which the corresponding threshold voltage is added to an image signal, is applied to a gate electrode of a TFT (106). TFTs within a pixel are disposed adjacently, and dispersion in the characteristics of the TFTs does not easily develop. The threshold value of the TFT (105) is thus cancelled, even if the threshold values of the TFTs (106) differ per pixel, and a predetermined drain current can be supplied to an EL element (109).
    Type: Application
    Filed: November 2, 2010
    Publication date: May 19, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hajime Kimura, Yoshifumi Tanada
  • Patent number: 7943938
    Abstract: An object of the present invention is to decrease substantial resistance of an electrode such as a transparent electrode or a wiring, and furthermore, to provide a display device for which is possible to apply same voltage to light-emitting elements. In the invention, a auxiliary wiring that is formed in one layer in which a conductive film of a semiconductor element such as an electrode, wiring, a signal line, a scanning line, or a power supply line is connected to an electrode typified by a second electrode, and a wiring. It is preferable that the auxiliary wiring is formed into a conductive film to include low resistive material, especially, formed to include lower resistive material than the resistance of an electrode and a wiring that is required to reduce the resistance.
    Type: Grant
    Filed: January 5, 2007
    Date of Patent: May 17, 2011
    Assignee: Semiconductor Energy Laboratory
    Inventors: Noriko Miyagi, Masayuki Sakakura, Tatsuya Arao, Ritsuko Nagao, Yoshifumi Tanada
  • Patent number: 7932877
    Abstract: The invention provides a display device and an electronic apparatus which can reduce power consumption in the case of being driven by using a digital time grayscale method. According to the invention, a row in which all the pixels display black is focused on in a plurality of pixels arranged in matrix, and sampling of data which is to be inputted to the pixels arranged in the row is not performed. Then, in a period during which the data sampling is not performed, the operation of a shift register in a source driver and sampling operation of a video signal in a first latch circuit are stopped. The invention which has the aforementioned characteristics can temporally stop operation of the source driver to reduce power consumption. In particular, the invention can stop operation of the source driver which consumes much power in the display device, leading to dramatic reduction in power consumption.
    Type: Grant
    Filed: November 17, 2005
    Date of Patent: April 26, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshifumi Tanada, Tadafumi Ozaki
  • Patent number: 7924244
    Abstract: Display irregularities in light emitting devices, which develop due to dispersions per pixel in the threshold value of TFTs for supplying electric current to light emitting elements, are obstacles to increasing the image quality of the light emitting devices. An electric potential in which the threshold voltage of a TFT (105) is either added to or subtracted from the electric potential of a reset signal line (110) is stored in capacitor means (108). A voltage, in which the corresponding threshold voltage is added to an image signal, is applied to a gate electrode of a TFT (106). TFTs within a pixel are disposed adjacently, and dispersion in the characteristics of the TFTs does not easily develop. The threshold value of the TFT (105) is thus cancelled, even if the threshold values of the TFTs (106) differ per pixel, and a predetermined drain current can be supplied to an EL element (109).
    Type: Grant
    Filed: January 24, 2003
    Date of Patent: April 12, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Yoshifumi Tanada
  • Patent number: 7915684
    Abstract: To provide a structure and a manufacturing method for efficiently forming a transistor to which tensile strain is preferably applied and a transistor to which compressive strain is preferably applied over the same substrate when stress is applied to a semiconductor layer in order to improve mobility of the transistors in a semiconductor device. Plural kinds of transistors which are separated from a single-crystal semiconductor substrate and include single-crystal semiconductor layers bonded to a substrate having an insulating surface with a bonding layer interposed therebetween are provided over the same substrate. One of the transistors uses a single-crystal semiconductor layer as an active layer, to which tensile strain is applied. The other transistors use single-crystal semiconductor layers as active layers, to which compressive strain using part of heat shrink generated by heat treatment of the base substrate after bonding is applied.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: March 29, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshifumi Tanada
  • Patent number: 7903079
    Abstract: There is provided a semiconductor device in which fabrication steps can be reduced by constructing a circuit using only TFTs of one conductivity type and in which a voltage amplitude of an output signal can be normally obtained. A capacitance (205) is provided between a gate and a source of a TFT (203) connected to an output node, and a circuit formed of TFTs (201) and (202) has a function to bring a node ? into a floating state. When the node ? is in the floating state, a potential of the node ? is caused higher than VDD by using gate-source capacitance coupling of the TFT (203) through the capacitance (205), thus an output signal having an amplitude of VDD-GND can be normally obtained without causing amplitude attenuation due to the threshold value of the TFT.
    Type: Grant
    Filed: September 2, 2009
    Date of Patent: March 8, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Patent number: 7898537
    Abstract: In order to increase the continuous operating time of a display device driven by a battery or the like, and a portable information terminal using the same, the volume and weight of the battery are increased. Thus, there arises a trade-off between the increased capacity of the battery and the portability of the device/terminal. Therefore, the invention provides a display device with portability ensured, which is capable of operating continuously for long periods and a portable information terminal using the same. In the display device, TFTs and an RFID tag are formed over the same insulating substrate. The RFID tag detects signals from a reader/writer, and generates DC power based on the signals. While the RFID tag is detecting signals, the display device is driven by the DC power generated in the RFID tag.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: March 1, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshifumi Tanada, Shunpei Yamazaki
  • Publication number: 20110043098
    Abstract: In a display device with a pixel constituted using an EL element or the like, leak light from a monitoring element that is provided for correcting changes in the properties of the element due to the temperature change, deterioration, or the like is effectively suppressed. The display device has a structure in which an insulating layer is formed over a substrate and a plurality of light emitting elements each of which has a light emitting layer interposed between a first electrode and a second electrode are formed over the insulating layer. Furthermore, at least part of the plurality of light emitting elements has a structure in which an opening is formed in the insulating layer, and the light emitting layer is formed in the opening region of the insulating layer.
    Type: Application
    Filed: November 1, 2010
    Publication date: February 24, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Yoshifumi Tanada
  • Patent number: 7893913
    Abstract: Power consumption is reduced in a driving circuit of a display device capable of handling a low voltage amplitude input signal by employing level shifters that utilize a differential amplifier. The driving circuit is divided into a plurality of units and each unit is provided with a constant current source. In addition to a usual scanning circuit, there is provided a sub-scanning circuit for controlling ON/OFF of the constant current source arranged in each unit. The sub-scanning circuit turns ON only the constant current sources in the unit that is being scanned. A current thus can be supplied efficiently.
    Type: Grant
    Filed: July 5, 2005
    Date of Patent: February 22, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Yoshifumi Tanada
  • Publication number: 20110027980
    Abstract: The semiconductor device has a semiconductor layer, a gate electrode which covers an end portion of the semiconductor layer, and an insulating layer for insulating the semiconductor layer and the gate electrode. The film thickness of the insulating layer which insulates a region where an end portion of the semiconductor layer and the gate electrode overlap each other is thicker than the film thickness of the insulating layer which covers the central portion of the semiconductor layer.
    Type: Application
    Filed: October 14, 2010
    Publication date: February 3, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Yukie SUZUKI, Yasuyuki ARAI, Yoshitaka MORIYA, Kazuko IKEDA, Yoshifumi TANADA, Shuhei TAKAHASHI
  • Publication number: 20100321420
    Abstract: The invention provides a light emitting device which can suppress the reduction of luminance in accordance with the light emission time and light emission at a high luminance. Moreover, the invention relates to a driving method which can suppress the reduction of luminance in accordance with the light emission time and light emission at a high luminance. The light emitting device of the invention can display a plurality of colors of which brightness and chromaticity are different by visually mixing light emission of a plurality of light emitting elements of which light emission colors are different. When a visually mixed display color is formed, a white light emission is exhibited.
    Type: Application
    Filed: September 1, 2010
    Publication date: December 23, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hisashi Ohtani, Yoshifumi Tanada, Aya Anzai
  • Patent number: 7830080
    Abstract: In a display device with a pixel constituted using an EL element or the like, leak light from a monitoring element that is provided for correcting changes in the properties of the element due to the temperature change, deterioration, or the like is effectively suppressed. The display device has a structure in which an insulating layer is formed over a substrate and a plurality of light emitting elements each of which has a light emitting layer interposed between a first electrode and a second electrode are formed over the insulating layer. Furthermore, at least part of the plurality of light emitting elements has a structure in which an opening is formed in the insulating layer, and the light emitting layer is formed in the opening region of the insulating layer.
    Type: Grant
    Filed: January 5, 2007
    Date of Patent: November 9, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshifumi Tanada
  • Patent number: 7821002
    Abstract: The semiconductor device has a semiconductor layer, a gate electrode which covers an end portion of the semiconductor layer, and an insulating layer for insulating the semiconductor layer and the gate electrode. The film thickness of the insulating layer which insulates a region where an end portion of the semiconductor layer and the gate electrode overlap each other is thicker than the film thickness of the insulating layer which covers the central portion of the semiconductor layer.
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: October 26, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yukie Suzuki, Yasuyuki Arai, Yoshitaka Moriya, Kazuko Ikeda, Yoshifumi Tanada, Shuhei Takahashi
  • Patent number: 7791571
    Abstract: The invention provides a light emitting device which can suppress the reduction of luminance in accordance with the light emission time and light emission at a high luminance. Moreover, the invention relates to a driving method which can suppress the reduction of luminance in accordance with the light emission time and light emission at a high luminance. The light emitting device of the invention can display a plurality of colors of which brightness and chromaticity are different by visually mixing light emission of a plurality of light emitting elements of which light emission colors are different. When a visually mixed display color is formed, a white light emission is exhibited.
    Type: Grant
    Filed: April 14, 2005
    Date of Patent: September 7, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisashi Ohtani, Yoshifumi Tanada, Aya Anzai
  • Patent number: 7750345
    Abstract: An object is to provide a structure for forming a circuit for which high-speed operation and low-voltage operation are required and a circuit for which sufficient reliability is required at the time of high voltage application in a circuit group provided over one substrate in a semiconductor device, and a manufacturing method thereof. A semiconductor device is provided with a plurality of kinds of transistors which include single-crystal semiconductor layers with different thicknesses, which are separated from a single-crystal semiconductor substrate and bonded, over one substrate. The single-crystal semiconductor layer of a transistor for which high-speed operation is required is formed thinner than that of a transistor for which high resistance to a voltage is required, so that the thickness of the single-crystal semiconductor layer is made to be thin.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: July 6, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshifumi Tanada