Abstract: A semiconductor device includes a die pad, which includes an upper surface and a lower surface opposite to the upper surface, the upper surface forming a rectangular shape in plain view; a plurality of support pins that support the die pad; a plurality of inner leads arranged around the die pad; a plurality of outer leads connected to each of the inner leads; a semiconductor chip which includes a main surface and a back surface opposite to the main surface and in which a plurality of electrode pads is formed in the main surface. The die pad includes a first side, a second side opposite to the first side, and a third side and a fourth side, which intersect the first and second sides.

Abstract: A method of manufacturing a semiconductor device includes preparing a lead frame provided with a die pad having an upper surface and a plurality of leads being arranged so as to be aligned on a side of the die pad and each including a wire joint part at a distal end on the side of the die pad, after the preparing the lead frame, mounting a semiconductor chip having a main surface and a plurality of electrode pads formed on the main surface, on the upper surface of the die pad, and after the mounting the semiconductor chip, electrically connecting a first electrode pad among the plurality of electrode pads of the semiconductor chip and a first lead among the plurality of leads to each other via a first wire.

Abstract: The invention is related to a device for detecting insulation degradation in an inverter-driven load device, in particular a motor, the device including: zero-phase current measuring means for measuring a zero-phase current in power-feed lines, provided in the power-feed lines between an inverter device and the motor; and command control means for putting rotation of the motor on standby; wherein the zero-phase current measuring means measures the total of phase currents fed into respective phases so as not to rotate a shaft even when an external force is applied to the shaft during the rotation being on standby, whereby allowing regular detection of insulation degradation without switching over the power-feed lines connected with the load device.

Abstract: A method of manufacturing a semiconductor device includes preparing a lead frame provided with a die pad having an upper surface and a plurality of leads being arranged so as to be aligned on a side of the die pad and each including a wire joint part at a distal end on the side of the die pad, after the preparing the lead frame, mounting a semiconductor chip having a main surface and a plurality of electrode pads formed on the main surface, on the upper surface of the die pad, and after the mounting the semiconductor chip, electrically connecting a first electrode pad among the plurality of electrode pads of the semiconductor chip and a first lead among the plurality of leads to each other via a first wire.

Abstract: A semiconductor device includes a die pad having an upper surface and a lower surface opposite to the upper surface, a semiconductor chip having a main surface and a back surface opposite to the main surface so that a plurality of electrode pads are formed on the main surface and being mounted on the die pad so that the back surface is opposite to the upper surface of the die pad, a plurality of leads arranged to be aligned on a side of the die pad, a first wire electrically connecting between a first electrode pad among the plurality of electrode pads of the semiconductor chip and a first lead among the plurality of leads, and a second wire having a diameter thicker than a diameter of the first wire and electrically connecting between a second electrode pad among the plurality of electrode pads of the semiconductor chip.

Abstract: A semiconductor device includes a die pad having an upper surface and a lower surface opposite to the upper surface, a semiconductor chip having a main surface and a back surface opposite to the main surface so that a plurality of electrode pads are formed on the main surface and being mounted on the die pad so that the back surface is opposite to the upper surface of the die pad, a plurality of leads arranged to be aligned on a side of the die pad, a first wire electrically connecting between a first electrode pad among the plurality of electrode pads of the semiconductor chip and a first lead among the plurality of leads, and a second wire having a diameter thicker than a diameter of the first wire and electrically connecting between a second electrode pad among the plurality of electrode pads of the semiconductor chip.

Abstract: Each stitch part of a plurality of leads of a package has a first region having the most outer surface on which Ag plating is applied and a second region having the most outer surface on which Ni plating is applied. Further, the second region is arranged on a die pad side, and the first region is arranged on a periphery side of a sealer. Therefore, in each stitch part, types of plating applied on the most outer surfaces of the first region and the second region can be differentiated from each other, a thick Al wire can be connected to the second region of the second lead, and a thin Au wire can be connected to the first region of the first lead. As a result, usage of only Au plating can be avoided, so that the cost of the package is reduced.

Abstract: A semiconductor device includes a die pad, which includes an upper surface and a lower surface opposite to the upper surface, the upper surface forming a rectangular shape in plain view; a plurality of support pins that support the die pad; a plurality of inner leads arranged around the die pad; a plurality of outer leads connected to each of the inner leads; a semiconductor chip which includes a main surface and a back surface opposite to the main surface and in which a plurality of electrode pads is formed in the main surface. The die pad includes a first side, a second side opposite to the first side, and a third side and a fourth side, which intersect the first and second sides.

Abstract: A semiconductor device includes a die pad, which includes an upper surface and a lower surface, the upper surface forming a rectangular shape in plan view; a plurality of support pins that support the die pad; a plurality of inner leads arranged around the die pad; a plurality of outer leads connected to each of the inner leads; a semiconductor chip which includes a main surface and a back surface and in which a plurality of electrode pads is formed in the main surface; a plurality of wires which electrically couple the electrode pads of the semiconductor chip to the inner leads respectively; and a sealing body that seals the support pins, the inner leads, the semiconductor chip, and the wires. A first support pin of the plurality of support pins is integrally formed together with the die pad. The first support pin is terminated inside the sealing body.

Abstract: The invention is related to an insulation deterioration diagnostic apparatus for an electric path connected between an inverter device and an inverter-driven load device, including: a zero-phase current transformer having an annular magnetic core, a magnetizing coil wound around the magnetic core, and a detecting coil wound around the magnetic core, the transformer being for detecting a zero-phase current of an electric path; a magnetization control circuit for supplying an alternating current having a frequency at least twice as high as a drive frequency of the load device to the magnetizing coil to magnetize the magnetic core; and a frequency extracting circuit for extracting a frequency component identical to the drive frequency fd, from the output signal of the detecting coil, whereby precisely measuring a current leaking from an inverter-driven load device over a wide range of frequencies.

Abstract: A semiconductor device includes a die pad, which includes an upper surface and a lower surface, the upper surface forming a rectangular shape in plan view; a plurality of support pins that support the die pad; a plurality of inner leads arranged around the die pad; a plurality of outer leads connected to each of the inner leads; a semiconductor chip which includes a main surface and a back surface and in which a plurality of electrode pads is formed in the main surface; a plurality of wires which electrically couple the electrode pads of the semiconductor chip to the inner leads respectively; and a sealing body that seals the support pins, the inner leads, the semiconductor chip, and the wires. A first support pin of the plurality of support pins is integrally formed together with the die pad. The first support pin is terminated inside the sealing body.

Abstract: To enhance the reliability of a semiconductor device. The semiconductor device includes die pads, over which a first semiconductor chip and a second semiconductor chip are mounted respectively, a plurality of support pins that support each of the die pads, a plurality of inner leads and outer leads arranged around the die pads, a plurality of wires that electrically couple the semiconductor chips to the inner leads, and a sealing body that seals the semiconductor chips, the inner leads, and the wires. Each of the die pads is supported by three support pins integrally formed together with the die pad, and each of second support pins of each pair of the three support pins is arranged between the inner leads adjacent to each other.

Abstract: Each stitch part of a plurality of leads of a package has a first region having the most outer surface on which Ag plating is applied and a second region having the most outer surface on which Ni plating is applied. Further, the second region is arranged on a die pad side, and the first region is arranged on a periphery side of a sealer. Therefore, in each stitch part, types of plating applied on the most outer surfaces of the first region and the second region can be differentiated from each other, a thick Al wire can be connected to the second region of the second lead, and a thin Au wire can be connected to the first region of the first lead. As a result, usage of only Au plating can be avoided, so that the cost of the package is reduced.

Abstract: To enhance the reliability of a semiconductor device. The semiconductor device includes die pads, over which a first semiconductor chip and a second semiconductor chip are mounted respectively, a plurality of support pins that support each of the die pads, a plurality of inner leads and outer leads arranged around the die pads, a plurality of wires that electrically couple the semiconductor chips to the inner leads, and a sealing body that seals the semiconductor chips, the inner leads, and the wires. Each of the die pads is supported by three support pins integrally formed together with the die pad, and each of second support pins of each pair of the three support pins is arranged between the inner leads adjacent to each other.

Abstract: The invention is related to an insulation deterioration diagnostic apparatus for an electric path connected between an inverter device and an inverter-driven load device, including: a zero-phase current transformer having an annular magnetic core, a magnetizing coil wound around the magnetic core, and a detecting coil wound around the magnetic core, the transformer being for detecting a zero-phase current of an electric path; a magnetization control circuit for supplying an alternating current having a frequency at least twice as high as a drive frequency of the load device to the magnetizing coil to magnetize the magnetic core; and a frequency extracting circuit for extracting a frequency component identical to the drive frequency fd, from the output signal of the detecting coil, whereby precisely measuring a current leaking from an inverter-driven load device over a wide range of frequencies.

Abstract: The invention is related to a device for detecting insulation degradation in an inverter-driven load device, in particular a motor, the device including: zero-phase current measuring means for measuring a zero-phase current in power-feed lines, provided in the power-feed lines between an inverter device and the motor; and command control means for putting rotation of the motor on standby; wherein the zero-phase current measuring means measures the total of phase currents fed into respective phases so as not to rotate a shaft even when an external force is applied to the shaft during the rotation being on standby, whereby allowing regular detection of insulation degradation without switching over the power-feed lines connected with the load device.

Abstract: A partly finished product of a semiconductor device includes a resin body encapsulating a semiconductor chip, first and second leads extended outwardly from the resin body, a dam bar connected between said first and second leads, and an excess resin portion protruding from the resin body between the first and second leads and the dam bar. The excess resin portion is cut off at two limited portions, and thereby two groove portions are formed in the excess resin portion. An apparatus for cutting the dam bar includes a punch having a cutting edge for cutting connection portions between the first and second leads and the dam bar and for cutting off the two limited portions of the excess resin portion. Since the cut region of the excess resin portion becomes smaller, a stress imparted to the resin body and/or the semiconductor chip through the excess resin portion can be smaller.

Abstract: Provided is a method of manufacturing a semiconductor device including: arranging multiple dies planarly between a first lead frame plate and a second lead frame plate, which face each other, to connect the multiple semiconductor chips to each of the first lead frame plate and the second lead frame plate; filling a resin between the first lead frame plate and the second lead frame plate to seal the multiple dies; performing a first dicing on a laminated body including the first lead frame plate, the resin, and the second lead frame plate, between the adjacent dies, to separate at least the first lead frame plate by cutting; applying plating to the laminated body with at least the first lead frame plate being separated by cutting; and performing a second dicing on a remainder of the laminated body between the adjacent dies, to separate the laminated body into individual semiconductor devices.

Abstract: A structure to be plated includes a body to be plated 11 on which plating is formed, and plated film thickness determining member 16 opposed to and electrically isolated from the body to be plated 11 through a slit portion 12. The plated film thickness determining member 16 has an islands-shape and is conductive. It is possible to instantly determine whether or not the plating formed on the body to be plated 11 has been formed to a thickness larger than the width W of the slit portion 12 on the spot by determining whether or not plating has grown from the surface of the body to be plated 11 to the plated film thickness determining member 16 through the slit portion 21.

Abstract: A lead frame according to one aspect of the present invention is used for a resin-sealed-type semiconductor device and includes a first lead frame having a frame body part and a lead part, and a second lead frame having a frame body part and a lead part. The lead part of the first lead frame and the lead part of the second lead frame do not contact with each other and an inner lead part formed in the lead part of the first lead frame and an inner lead part formed in the lead part of the second lead frame are provided in substantially the same plane when the frame body part of the first lead frame and the frame body part of the second lead frame are laminated together.