Patents by Inventor Yoshihide Tada

Yoshihide Tada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6897149
    Abstract: A process for producing an electronic device material of a high quality MOS-type semiconductor having an insulating layer and a semiconductor layer with excellent electrical characteristics. A substrate incorporating single-crystal silicon as a main component is CVD-treated to form an insulating layer. The substrate is then exposed to a plasma generated from a process gas by microwave radiation from a plane antenna having a plurality of slots, to thereby modify the insulating film.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: May 24, 2005
    Assignee: Tokyo Electron Limited
    Inventors: Takuya Sugawara, Toshio Nakanishi, Shigenori Ozaki, Seiji Matsuyama, Shigemi Murakawa, Yoshihide Tada
  • Publication number: 20040253839
    Abstract: A heat treatment apparatus selectively heats an object material to be heated so as to achieve energy saving and low-temperature heating. A light source irradiates a light onto a heating material through a transparent window of a process chamber. A controller controls an output of the light source. The heating material is a material to form a layer formed in a wiring process after a semiconductor structure is formed in a semiconductor manufacturing process. The light irradiated by the light source has a specific wavelength at which an optical absorption factor of the heating material is larger than at other wavelengths. The transparent window is formed of a material that passes therethrough the light having the specific wavelength.
    Type: Application
    Filed: June 10, 2004
    Publication date: December 16, 2004
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masahiro Shimizu, Yusaku Kashiwagi, Gishi Chung, Yoshihide Tada, Genji Nakamura
  • Patent number: 6821566
    Abstract: A method of forming an insulating film containing silicon oxy-nitride includes a loading step, temperature raising step, oxidation step, cycle purge step, and annealing step, in this order. The temperature raising step is performed while supplying nitrogen gas and oxygen gas for preventing a silicon layer surface from being nitrided, at a supply ratio 100:1 to 1000:1. The oxidation step is performed at a temperature of 700 to 950° C. while supplying a gas that contains 1 to 5 vol % of water vapor and 95 to 99 vol % of nitrogen gas, to form a silicon oxide film. The annealing step is performed at a temperature of 800 to 950° C. while supplying a gas that contains 10 to 100 vol % of nitrogen monoxide gas, to convert a portion of the silicon oxide film into silicon oxy-nitride.
    Type: Grant
    Filed: November 20, 2002
    Date of Patent: November 23, 2004
    Assignee: Tokyo Electron Limited
    Inventors: Genji Nakamura, Yoshihide Tada, Masayuki Imai, Asami Suemura, Shingo Hishiya
  • Publication number: 20040152339
    Abstract: A manufacturing method for semiconductor devices that can improve uniformity in the surface of a silicon nitride film or a nitride film to be formed and improve production efficiency is provided. A step of forming a first film that is a silicon oxide film or a silicon oxynitride film on a silicon substrate, a step of forming a second film that is a tetrachlorosilane monomolecular layer, and a step of forming a third film that is a silicon nitride monomolecular layer by performing a nitriding process on the second film are included. A silicon nitride film having a predetermined film thickness is formed by repeating the step of forming the second film and the step of forming the third film for a predetermined number of times. In a manufacturing apparatus, a plurality of silicon substrates are arranged on a stair-like wafer boat, and a process gas is supplied toward the upper side of a reaction tube from a process gas supply pipe.
    Type: Application
    Filed: November 26, 2003
    Publication date: August 5, 2004
    Inventors: Shin Yokoyama, Anri Nakajima, Yoshihide Tada, Genji Nakamura, Masayuki Imai, Tsukasa Yonekawa
  • Publication number: 20040142577
    Abstract: A process for producing electronic device (for example, high-performance MOS-type semiconductor device) structure having a good electric characteristic, wherein an SiO2 film or SiON film is used as an insulating film having an extremely thin (2.5 nm or less, for example) film thickness, and poly-silicon, amorphous-silicon, or SiGe is used as an electrode. In the presence of process gas comprising oxygen and an inert gas, plasma including oxygen and the inert gas (or plasma comprising nitrogen and an inert gas, or plasma comprising nitrogen, an inert gas and hydrogen) is generated by irradiating a wafer W including Si as a main component with microwave via a plane antenna member SPA. An oxide film (or oxynitride film) is formed on the wafer surface by using the thus generated plasma, and as desired, an electrode of poly-silicon, amorphous-silicon, or SiGe is formed, to thereby form an electronic device structure.
    Type: Application
    Filed: July 18, 2003
    Publication date: July 22, 2004
    Inventors: Takuya Sugawara, Toshio Nakanishi, Shigenori Ozaki, Seiji Matsuyama, Shigemi Murakawa, Yoshihide Tada
  • Publication number: 20040048452
    Abstract: A process for producing an electronic device material of a high quality MOS-type semiconductor comprising an insulating layer and a semiconductor layer excellent in the electrical characteristic. The process includes: a step of CVD-treating a substrate to be processed comprising single-crystal silicon as a main component, to thereby form an insulating layer; and a step of exposing the substrate to be processed to a plasma which has been generated from a process gas on the basis of microwave irradiation via a plane antenna member having a plurality of slots, to thereby modify the insulating film by using the thus generated plasma.
    Type: Application
    Filed: July 25, 2003
    Publication date: March 11, 2004
    Inventors: Takuya Sugawara, Toshio Nakanishi, Shigenori Ozaki, Seiji Matsuyama, Shigemi Murakawa, Yoshihide Tada
  • Publication number: 20030068437
    Abstract: A method of forming an insulating film containing silicon oxy-nitride first forms a silicon oxide film on the surface of a silicon wafer by oxidizing the water. In this oxidation, the atmosphere in a process chamber accommodating the silicon wafer is set at a first temperature of from 700 to 950° C. and a first pressure of from 0.7 to a value of [atmospheric pressure −0.375] Torr for a first processing time of from 0.5 to 30 min, and a first processing gas for oxidation is supplied into the process chamber. This first processing gas contains 1 to 5 vol % of water vapor and 95 to 99 vol % of nitrogen gas. After the silicon oxide film is formed, annealing is performed to convert at least a portion of the silicon oxide film into silicon oxy-nitride. In this annealing, the atmosphere in the process chamber is set at a second heating temperature of from 800 to 950° C. and a second pressure of from 0.
    Type: Application
    Filed: November 20, 2002
    Publication date: April 10, 2003
    Inventors: Genji Nakamura, Yoshihide Tada, Masayuki Imai, Asami Suemura, Shingo Hishiya
  • Patent number: 5391506
    Abstract: A projection is formed in a substrate by anisotropic etching and a transistor is contained in the projection. The central portion of the projection covered with a gate electrode is formed as a channel region, and drain and source regions are formed on both sides of the projection by oblique ion implantation with the gate electrode as a mask. Formed below the drain, source, and channel regions is an element isolation section having the composition of the substrate intact. This eliminates the need for an oxide insulating layer below the transistor for easy manufacturing. Carriers generated in the channel region by ionization by collision can also be discharged to the substrate.
    Type: Grant
    Filed: January 27, 1993
    Date of Patent: February 21, 1995
    Assignee: Kawasaki Steel Corporation
    Inventors: Yoshihide Tada, Hiroyasu Kunitomo
  • Patent number: 5365083
    Abstract: A semiconductor device of band-to-band tunneling type including a silicon substrate, a first gate electrode formed by a highly doped surface region of the silicon substrate, a first silicon oxide film formed on a surface of the surface region, a silicon thin film formed on the first silicon oxide film, a second silicon oxide film formed on a surface of the thin silicon film, and a second gate electrode formed by a metal film applied on a surface of the second silicon oxide film. In the thin silicon film, there are formed P and N type regions side by side to constitute a PN junction. When a gate bias voltage is applied across the first and second gate electrodes, a band bend having a large height and inclination in a direction perpendicular to the thin silicon film is produced in the depletion region in the vicinity of the PN junction.
    Type: Grant
    Filed: February 8, 1994
    Date of Patent: November 15, 1994
    Assignee: Kawasaki Steel Corporation
    Inventor: Yoshihide Tada