Patents by Inventor Yoshihiko Hayashi

Yoshihiko Hayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6625554
    Abstract: The present invention provides a magnetic field measuring method and system for determining the magnetic field of an integrated circuit (IC) inside the IC package, including the pre-packaged IC. In one embodiment, induced voltages due only to the magnetic field are determined at measurement heights on the order of the line spacings in an integrated circuit. A magnetic probe is used; the probe has a loop of wire parallel to the current, for measuring the induced voltage of the horizontal component of the magnetic field. The induced voltage due to the electric field is removed by using a calculation including the difference of two measurements. The magnetic field distribution for the integrated circuit may be determined by using the above procedure on a grid like pattern above the IC.
    Type: Grant
    Filed: June 22, 2001
    Date of Patent: September 23, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Suga, Kouichi Uesaka, Satoshi Nakamura, Yoshihiko Hayashi
  • Patent number: 6608550
    Abstract: A reader and/or writer apparatus having an antenna lying substantially in a plane for generating an electromagnetic field to supply power to an IC card and a conductor member to be disposed in a plane substantially parallel to the plane of the antenna, wherein the distance between the antenna and the conductor member is no greater than 20 mm. A power supplying system supplies power using electromagnetic waves from the reader and/or writer apparatus to the IC card. The IC card includes a circuit for converting the supplied power to a D.C. voltage and for supplying the D.C. voltage to an internal circuit of the IC card.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: August 19, 2003
    Assignees: Hitachi, Ltd., Kokusai Electric Co., Ltd.
    Inventors: Yoshihiko Hayashi, Takashi Suga, Kouichi Uesaka, Ryouzou Yoshino, Keisuke Igarashi
  • Patent number: 6606177
    Abstract: A driver circuit comprises a first differential-amplifier circuit having a pair of first transistors with emitters thereof connected to each other and a first resistor provided between an emitter connection point of the first transistors and a first power supply. Different electric potentials are applied to the bases of the pair of the first transistors to set a ratio of a current flowing through one of the pair of the first transistors to a current flowing through the other first transistor at about {fraction (1/100)} or smaller. An amplitude of an output current is controlled by the higher of the electric potentials applied to the base of one of the first transistors.
    Type: Grant
    Filed: September 9, 1999
    Date of Patent: August 12, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Norio Chujo, Yoshihiko Hayashi, Akio Osaki, Naohiko Baba
  • Publication number: 20030001596
    Abstract: The present invention provides a magnetic field measuring method and system for determining the magnetic field of an integrated circuit (IC) inside the IC package, including the pre-packaged IC. In one embodiment, induced voltages due only to the magnetic field are determined at measurement heights on the order of the line spacings in an integrated circuit. A magnetic probe is used; the probe has a loop of wire parallel to the current, for measuring the induced voltage of the horizontal component of the magnetic field. The induced voltage due to the electric field is removed by using a calculation including the difference of two measurements. The magnetic field distribution for the integrated circuit may be determined by using the above procedure on a grid like pattern above the IC.
    Type: Application
    Filed: June 22, 2001
    Publication date: January 2, 2003
    Inventors: Takashi Suga, Kouichi Uesaka, Satoshi Nakamura, Yoshihiko Hayashi
  • Publication number: 20020191092
    Abstract: The present invention has an object of realizing highly reliable search with high precision by obtaining a clear view image over a wide view. In particular, a reflection mirror is formed so as to correspond to an image pick-up element at a focus surface of a converging lens of an image pick-up camera and the image pick-up camera is arranged to be capable of freely performing scanning by a scanning mechanism portion. As a result, with the image pick-up camera kept performing linear scanning, the reflection mirror performs triangular scanning in a direction opposite to the scanning direction of the image pick-up camera for every frame cycle T and a light wave taken in by the converging lens is introduced to the image pick-up element for every one frame, thereby to obtain a static view image. The desired object is thus achieved.
    Type: Application
    Filed: July 15, 2002
    Publication date: December 19, 2002
    Inventors: Yoshihiko Hayashi, Keizo Fujibayashi, Naoki Hosaka, Tetsuo Sado
  • Publication number: 20020176017
    Abstract: The present invention has an object of realizing highly reliable search with high precision by obtaining a clear view image over a wide view. In particular, a reflection mirror is formed so as to correspond to an image pick-up element at a focus surface of a converging lens of an image pick-up camera and the image pick-up camera is arranged to be capable of freely performing scanning by a scanning mechanism portion. As a result, with the image pick-up camera kept performing linear scanning, the reflection mirror performs triangular scanning in a direction opposite to the scanning direction of the image pick-up camera for every frame cycle T and a light wave taken in by the converging lens is introduced to the image pick-up element for every one frame, thereby to obtain a static view image. The desired object is thus achieved.
    Type: Application
    Filed: July 12, 2002
    Publication date: November 28, 2002
    Inventors: Yoshihiko Hayashi, Keizo Fujibayashi, Naoki Hosaka, Tetsuo Sado
  • Publication number: 20020171446
    Abstract: A driver circuit integrated with a load current output circuit has a function as a driver for applying a predetermined test waveform to a device under test (DUT), and a function as a load current output for reproducing an actual use situation by receiving the load current to the DUT to judge a response waveform by receiving the response waveform from the DUT. Both functions are made up on a common circuit, operate as the driver circuit when applying the test waveform, and operate as the load current output circuit when judging the response waveform.
    Type: Application
    Filed: December 27, 2001
    Publication date: November 21, 2002
    Applicant: Hitachi Electronics Engineering Co., Ltd
    Inventors: Keizo Takechi, Akio Ohsaki, Yoshihiko Hayashi, Kazuhiko Murata
  • Patent number: 6449012
    Abstract: The present invention has an object of realizing highly reliable search with high precision by obtaining a clear view image over a wide view. In particular, a reflection mirror is formed so as to correspond to an image pick-up element at a focus surface of a converging lens of an image pick-up camera and the image pick-up camera is arranged to be capable of freely performing scanning by a scanning mechanism portion. As a result, with the image pick-up camera kept performing linear scanning, the reflection mirror performs triangular scanning in a direction opposite to the scanning direction of the image pick-up camera for every frame cycle T and a light wave taken in by the converging lens is introduced to the image pick-up element for every one frame, thereby to obtain a static view image. The desired object is thus achieved.
    Type: Grant
    Filed: November 17, 1997
    Date of Patent: September 10, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshihiko Hayashi, Keizo Fujibayashi, Naoki Hosaka, Tetsuo Sado
  • Patent number: 6448800
    Abstract: An IC tester includes a detection circuit for detecting a voltage level on a portion of a transmission line on a side thereof, which receives the output signal from an electronic device under test through the transmission line. A predetermined current is pulled in from the transmission line when the voltage level detected by the detection circuit is at a low level and a predetermined current equal to or different from the predetermined current to be pulled in is supplied to the transmission line when the detected voltage level detected by the detection circuit is at a high level.
    Type: Grant
    Filed: June 22, 2000
    Date of Patent: September 10, 2002
    Assignee: Hitachi Electronics Engineering Co., Ltd.
    Inventors: Keiichi Yamamoto, Yoshihiko Hayashi, Akio Oosaki
  • Patent number: 6427065
    Abstract: The present invention comprises a power transmission system, an IC card, and an information communication system using an IC card. In the power transmission system, power is transmitted by radio from the power transmission device to the IC card. In the IC card, the transmitted induced power is converted into a DC voltage, the transmitted induced power or a voltage corresponding to the induced power is detected, and a desired DC voltage to be suppled to the internal circuit is obtained in controlling resistance the detected induced power or the voltage corresponding to the induced power.
    Type: Grant
    Filed: August 16, 2000
    Date of Patent: July 30, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Suga, Yoshihiko Hayashi, Ryouzou Yoshino, Kenji Nagai
  • Patent number: 6424201
    Abstract: A diode element circuit uses a junction between the base and collector of a vertical type PNP transistor as a diode, and is further designed that a reverse bias voltage is applied between base and emitter of a parasitic PNP transistor in the vertical type PNP transistor, thereby, a diode having a small leakage current and a high break down voltage is realized without necessitating an additional manufacturing process.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: July 23, 2002
    Assignee: Hitachi Electronics Engineering Co., Ltd.
    Inventors: Keiichi Yamamoto, Akio Oosaki, Yoshihiko Hayashi
  • Publication number: 20020011662
    Abstract: A low-impedance connection is provided between an LSI and a capacitor (for example, existing internal capacitance of an electronic part) in the power supply path to limit power supply noise, which can be a factor in high-speed logic circuit malfunctions. For example, a packaging substrate and a semiconductor device using the same are provided which reduce power supply path inductance, which is a major factor in impedance.
    Type: Application
    Filed: April 23, 2001
    Publication date: January 31, 2002
    Inventors: Yasumoto Komiya, Takashi Suga, Yoshihiko Hayashi
  • Publication number: 20010048337
    Abstract: A diode element circuit uses a junction between the base and collector of a vertical type PNP transistor as a diode, and is further designed that a reverse bias voltage is applied between base and emitter of a parasitic PNP transistor in the vertical type PNP transistor, thereby, a diode having a small leakage current and a high break down voltage is realized without necessitating an additional manufacturing process.
    Type: Application
    Filed: May 29, 2001
    Publication date: December 6, 2001
    Inventors: Keiichi Yamamoto, Akio Oosaki, Yoshihiko Hayashi
  • Patent number: 6321067
    Abstract: The present invention comprises a power transmission system, an IC card, and an information communication system using an IC card. In the power transmission system, power is transmitted by radio from the power transmission device to the IC card. In the IC card, the transmitted induced power is converted into a DC voltage, the transmitted induced power or a voltage corresponding to the induced power is detected, and a desired DC voltage to be suppled to the internal circuit is obtained in controlling resistance the detected induced power or the voltage corresponding to the induced power.
    Type: Grant
    Filed: September 15, 1997
    Date of Patent: November 20, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Suga, Yoshihiko Hayashi, Ryouzou Yoshino, Kenji Nagai
  • Patent number: 6275023
    Abstract: A semiconductor device according to the present invention comprises a first switch circuit connected between a transmission line and an input terminal of a comparator and adapted to be turned ON according to a change of a response waveform from High level to Low level to connect an impedance substantially equal to a characteristic impedance of the transmission line to the transmission line, a second switch circuit connected between the transmission line and the input terminal of the comparator and adapted to be turned ON according to a change of the response waveform from Low level to High level to connect an impedance substantially equal to the characteristic impedance of the transmission line to the transmission line, a first voltage generator circuit connected to the first switch circuit for generating a voltage for clamping the level of the response waveform at a certain Low level and a second voltage generator circuit connected to the second switch circuit for generating a voltage for clamping the level
    Type: Grant
    Filed: February 2, 2000
    Date of Patent: August 14, 2001
    Assignee: Hitachi Electronics Engineering Co., Ltd.
    Inventors: Akio Oosaki, Yoshihiko Hayashi
  • Publication number: 20010000659
    Abstract: A reader and/or writer apparatus having an antenna lying substantially in a plane for generating an electromagnetic field to supply power to an IC card and a conductor member to be disposed in a plane substantially parallel to the plane of the antenna, wherein the distance between the antenna and the conductor member is no greater than 20 mm. A power supplying system supplies power using electromagnetic waves from the reader and/or writer apparatus to the IC card. The IC card includes a circuit for converting the supplied power to a D.C. voltage and for supplying the D.C. voltage to an internal circuit of the IC card.
    Type: Application
    Filed: December 22, 2000
    Publication date: May 3, 2001
    Inventors: Yoshihiko Hayashi, Takashi Suga, Kouichi Uesaka, Ryouzou Yoshino, Keisuke Igarashi
  • Patent number: 6194993
    Abstract: A reader and/or writer apparatus, a power feeding system and a power feeding and communication transmission and/or reception system in a proximate wireless card system arranged so that power which satisfies the requirement of the Radio Law (500 &mgr;V/m at a distance of 3 m from the reader and/or writer apparatus) regarding the radiated electric field is supplied sufficiently from the reader and/or writer apparatus to the proximate wireless card (IC card). The reader and/or writer apparatus has a spirally shaped or coil-shaped antenna for generating electromagnetic fields both to supply operational power to an IC card and to perform transmission and/or reception of signals for communication to and/or from the IC card and a conductor member for forming a mirror image of the antenna on its back side.
    Type: Grant
    Filed: June 19, 1998
    Date of Patent: February 27, 2001
    Assignees: Hitachi, Ltd., Kokusai Electric Co., Ltd.
    Inventors: Yoshihiko Hayashi, Takashi Suga, Kouichi Uesaka, Ryouzou Yoshino, Keisuke Igarashi
  • Patent number: 6176433
    Abstract: The present invention provides a reader and/or writer for performing both the supply of operating power to an IC card and transmission of a communication signal to the IC card or transmission and reception thereof to and from the IC card, wherein a main coil or a spiral antenna for generating an electromagnetic field for the two or at least power supply, and auxiliary coils or spiral antennas for generating magnetic fields opposite in phase to the electromagnetic field generated by the main coil or spiral antenna to thereby restrain the intensity of the electromagnetic field in the distance are provided side by side.
    Type: Grant
    Filed: May 15, 1998
    Date of Patent: January 23, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Kouichi Uesaka, Yoshihiko Hayashi, Takashi Suga, Masami Makuuchi, Ryozo Yoshino
  • Patent number: 6164532
    Abstract: The present invention provides a power transmission/communication system for transmitting power from a reader and/or writer to an IC card by an electromagnetic wave and performing transmission or transmission and reception of a communication signal between the reader and/or writer and the IC card by an electromagnetic wave, wherein the intensity of a magnetic field induced by the electromagnetic wave outputted from the reader and/or writer, i.e., the magnitude of power induced thereby and the time required to transmit the power are controlled.
    Type: Grant
    Filed: May 5, 1998
    Date of Patent: December 26, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Suga, Yoshihiko Hayashi, Kouichi Uesaka, Masami Makuuchi, Ryozo Yoshino
  • Patent number: 5949823
    Abstract: An arrangement to realize the functions of a radio card system in which power is transmitted to perform data communication. According to such arrangement, a delay line and a clock regenerating circuit such as PLL circuit which are previously necessary for demodulation by PSK are not necessary, and thus functions of data communication are realized by minimum hardware construction, size, cost and power consumption. Further, in a data communication system in which electric power transmission using a signal of a frequency fp and digital data communication using a carrier wave of a frequency fs are performed by radio, fs and fp are in the relationship of fs=fp/N (where N is an integer) and a phase shift P when the phase of the carrier wave is modulated by PSK is (M.times.360.degree.)/N (where M, N are integers and P is preferably not equal to 180.degree.).
    Type: Grant
    Filed: September 12, 1997
    Date of Patent: September 7, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Suga, Yoshihiko Hayashi, Ryouzou Yoshino, Kenji Nagai